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    246 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 14, NO. 2, MARCH 1999

    A Simple Snubber Configuration forThree-Level GTO Inverters

    Jeong-Hyoun Sung, Student Member, IEEE, and Kwanghee Nam, Member, IEEE

    AbstractA simple snubber configuration for three-level gateturn-off thyristor (GTO) inverters is proposed. The proposedsnubber has a single resistor per arm for stored energy dissipa-tion, while the conventional RLD/RCD snubber contains six. Thisimplies that the proposed snubber needs only one chopper circuitper arm for snubber energy recovery. This helps reduce the size,cost, and number of components. Besides the single resistor, theproposed snubber requires two less diodes per arm than theRLD/RCD snubber. Furthermore, the proposed snubber resolvesthe voltage imbalance problem between inner and outer GTOswithout additional components. We have analyzed the proposedcircuits and proven its performance through simulations andexperiments.

    Index TermsEnergy recovery circuit, snubber circuit, three-level GTO inverter.

    I. INTRODUCTION

    IN HIGH-POWER systems, such as a steel mill drive, gate

    turn-off thyristors (GTOs) are widely used. Due to the

    high-power rating (6 kV, 6 kA) and the turn-off capability,

    GTOs are much more attractive than conventional thyristors

    for sophisticated applications. GTOs, however, require a

    snubber circuit which limits the current and voltage rising rate

    at the time of turning on and off, respectively. When turning on

    a GTO, the current rising rate must be restricted below a

    specified value to prevent an excessive initial current loading.When turning off a GTO, the voltage rising rate also

    must be restricted below a specified value to avoid a sudden

    heat pulse generation and to prevent retriggering by an internal

    capacitance.

    A number of snubber configurations have been proposed for

    two-level GTO voltage source inverters [1][3]: the RLD/RCD

    snubber, Undeland snubber, and McMurray snubber [1], [2].

    The Undeland and McMurray snubbers are modified from

    the RLD/RCD snubber, minimizing the number of snubber

    circuit components. Specifically, they have a single resistor

    per arm for energy dissipation. This is particularly useful in

    constructing an energy recovery circuit. Holtz has investigated

    an energy recovery circuit for the McMurray snubber that didnot employ a chopper [3].

    The three-level inverter, often called a neutral point clamped

    (NPC) inverter, is suitable for high-voltage applications since

    it guarantees equal voltage sharing between serially connected

    Manuscript received July 10, 1997; revised July 17, 1998. Recommendedby Associate Editor, L. Xu.

    The authors are with the Department of Electrical Engineering, POSTECHUniversity, Pohang 790-784, Korea.

    Publisher Item Identifier S 0885-8993(99)01825-6.

    power devices. Furthermore, the three-level configuration con-

    tributes to reducing voltage harmonics [4][8].

    For the three-level system, the RLD/RCD snubber could be

    constructed as shown in Fig. 1(a), but is impractical for energy

    recovery, since it requires six discharging resistors in separate

    locations on each arm. Furthermore, such a snubber would

    cause a voltage imbalance between serially connected GTOs

    when either or turns off, since the middle snubber

    capacitors do not find their discharging paths due to

    the blocking action of the clamping diodes This

    imbalance imposes higher voltage stress on the inner GTOs

    and may lead to a destruction of inner GTOs. Okayama et

    al. [6] proposed a snubber circuit which is able to locate

    energy recovery choppers at points of fixed voltage, such as

    at the dc-link side or the neutral point. Hence, the chopper

    bank capacitors can be connected in parallel among armsyielding a suitable structure for energy recovery. It also has

    some noticeable characteristics such as a guaranteed voltage

    balancing mechanism between serially connected GTOs and

    a reduced capacitance of turn-off snubbers. However, it has

    more components, compared with the RLD/RCD snubber. On

    the other hand, Suh et al. extended the Undeland snubber to

    the three-level system with overvoltage clamping capability.

    This paper presents a new and efficient snubber configu-

    ration for three-level GTO inverters. The proposed snubberconfiguration can be regarded as an extension of the Mc-

    Murray snubber [1] to the three-level system. Advantages

    of the proposed scheme are: 1) small number of parts; 2)

    suitable structure for snubber energy recovery; 3) second-

    order current dynamics in the period of the snubber capacitor

    discharging; and 4) no voltage imbalance between serially

    connected GTOs. We have analyzed the proposed circuit, and

    proven its performance through simulations and experiments.

    II. NEW SNUBBER CONFIGURATION

    FOR THREE-LEVEL GTO ARM

    A. Structure

    The RLD/RCD snubber and the proposed snubber circuits

    for a single arm appear in Fig. 1. The proposed snubber circuit

    includes four shunt capacitors ( ), two se-

    ries inductors ( ), four diodes ( ),

    and a single resistor ( ). Table I compares the number of

    components for the RLD/RCD snubber and the proposed

    snubber. The proposed snubber includes a single resistor, while

    the RLD/RCD snubber has six resistors. When a need to

    construct an energy recovery system occurs, the advantage

    08858993/99$10.00 1999 IEEE

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    SUNG AND NAM: SIMPLE SNUBBER CONFIRMATION FOR THREE-LEVEL GTO INVERTERS 251

    (a) (b) (c) (d)

    Fig. 6. Commutation paths during the transition from S0

    to S0 1

    : (a) Initial state. (b) Step 1. (c) Step 2. (d) Step 3.

    (a) (b)

    (c)

    Fig. 7. Equivalent circuits during the transition from S0

    to S0 1

    :

    limit the voltage rising rate of At the final state,

    the load current flows through the freewheeling diodes

    and Commutation sequences and the equivalent circuits

    are shown in Figs. 6 and 7.

    Step 1): When is turned off, the load current rejected

    by is absorbed by both and as shown in Fig. 6(b).

    During the turn-off operation, the voltage over remains

    while the voltage over increases. In Step 1,

    decreases linearly from to zero during the period, i.e,

    We obtain from Fig. 7(a) that

    (32)

    (33)

    Note that the derivation process of (33) is similar to that of

    (20). We obtain from (32) and (33) that

    (34)

    which is identical to (22). Hence, its solution is the same

    as (24). This step ends at when reduces to zero.

    Step 2): The equivalent circuit of Step 2 is shown in

    Fig. 7(b). Note that this equivalent circuit is identical to

    Fig. 5(b), since is assumed to be constant. Therefore,

    the solution is given by

    which is the same as (28). This step ends at

    when reaches

    Step 3): Due to the current flowing through , a voltage

    overshoot is generated over This voltage overshoot will

    disappear soon in the current loop We obtain

    from Fig. 7(c) that

    (35)

    For simplicity, we assume that is equal to zero. Then, we

    obtain from (35) that

    (36)

    (37)

    Applying KCL at point P in Fig. 7(c) and using (36), (37), and

    obtained from ,

    we obtain

    (38)

    With the initial conditions and

    , the solution and corresponding values

    are obtained such that

    (39)

    (40)

    where

    IV. ENERGY RECOVERY CIRCUITS

    In high-power inverter systems, it is common to recover the

    energy stored in the snubber circuits [6], [12], [13]. To recover

    the energy into the dc-link capacitor, a chopper circuit is used

    in place of a dissipation resistor. Note again that our proposed

    snubber has only one dissipation resistor on each arm. Thus

    only one chopper per arm can handle the energy recovery as

    shown in Fig. 8(a). Note that the number of choppers can be

    reduced further to one for an inverter by using the isolation

    transformers as shown in Fig. 8(b). In Fig. 8(a), the snubber

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    252 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 14, NO. 2, MARCH 1999

    (a) (b)

    Fig. 8. Energy recovery circuit. (a) For an arm. (b) Three-arm integration to a single chopper.

    resistor is replaced by a capacitor to which chargesstored in are transferred whenever the

    discharging paths are formed. If the capacitance of is

    sufficiently larger than (for example, 100 times), can

    be regarded as a voltage source. If the voltage level over

    exceeds a threshold level, then the two insulated gate bipolar

    transistors (IGBTs) begin to switch alternately. Energy can

    then be delivered to the dc link during both turn-on and turn-

    off periods. Energy transfer during the on period, however, is

    undesirable because the current may go beyond the limits of

    IGBT or diode rating. Hence, the turn ratio of the transformer

    is chosen such that the energy is transferred during the turn-

    off period (flyback chopper) [10], [11]. Using the two IGBTs

    prevents the magnetization of the transformer [1], [3].We calculate the total energy transfer from the snubber

    inductors and capacitors to storage capacitor in a

    pulsewidth modulation (PWM) cycle. The stored energy in

    inductor is transferred to the storage capacitor when

    turns off from a conducting state [see Figs. 4(d) and 10]

    and is equal to

    (41)

    In calculating the transferred energy from the snubber

    capacitors to , we neglect since they are small

    compared with There are two operations in the

    change: when changes from to zero

    and when changes from to The

    amount of transferred energy for the two cases is different. In

    the first case, the transferred energy is equal to

    (42)

    In the second case, the transferred energy is equal to

    (43)

    Therefore, for the PWM sequence

    , neglecting the diode recovery current, the total energy

    transferred to per arm is equal to

    (44)

    Thus, the chopper size or the power rating of dissipation

    resistor must be estimated based on (44).

    V. DESIGN PROCEDURE AND SIMULATION RESULTS

    Based on the circuit analysis, we may summarize the design

    procedure of the proposed snubber components.

    A. Design Procedure

    We assume that a proper GTO is selected for an inverter,

    with a specified dc-link voltage and maximum load current

    From the GTO manufacturers specification, we obtain

    the critical rate of rise of off-state voltage and a

    maximum rate of rise of on-state current

    Step 1) (Capacitor): Choose capacitance such thatand

    The voltage rating of capacitors

    should meet and

    Step 2) (Inductor): Choose inductance such that

    Obviously, current rating of inductor

    should be larger than

    Step 3) (Resistor): To ensure safe discharging during

    turn-on period, it is normal to choose such that

    , where is the minimum

    turn-on time of the GTO. The power rating of the resistor

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    SUNG AND NAM: SIMPLE SNUBBER CONFIRMATION FOR THREE-LEVEL GTO INVERTERS 253

    Fig. 9. Simulation results ( S0

    to S1

    ) : (a) iL S 1

    ; i

    D C 1

    ; (b) vL S 1

    ; (c)v

    C S 1

    ; v

    C S 2

    ; and (d) vC S 3

    ; v

    C S 4

    :

    must be larger than , where

    is the PWM switching frequency [see (44)].

    For the experiment, we chose a GTO (ABB 5SGA

    1028F0001) with the following ratings: A,

    V, V/ s, and

    A/ s, where is the repetitive peak off-state voltage and

    is the maximum controllable turn-off current. For a

    safe turn off, we limit V/ s. Additionally, the

    maximum load current is assumed to be A.

    We then obtain from Step 1) that F. Hence,

    we choose F and F. For

    a safe turn-on, we choose A/ s. Conforming

    to Step 2), we choose H. Since s,

    we let according to the inequality in Step 3).

    B. Simulation Results

    All the simulations were carried out for a three-level single

    arm using the commercial simulation tool SABER with exam-

    ple parameters which are described in the previous subsection.

    We further assume that V and

    A. Voltage and current transitions in the three basic

    commutations are shown inFigs. 911. Fig. 9 shows the inductor current clamping

    diode current inductor voltage and capacitor

    voltages during the commutation from

    to off, on). One can notice from Fig. 9(a) and

    (b) that the presence of inductor helps reduce the current

    growing rate of Note from Fig. 9(a) that is 260

    A/ s, and the peak turn-on current of is almost 1000 A

    while the load current is 300 A. This relatively large current

    overshoot is caused, in part, by the charging current of

    and and results in a voltage overshoot over as

    shown in Fig. 9(d).

    Fig. 10. Simulation results(

    S

    1

    toS

    0

    ) :

    (a)i

    L S

    1

    ; i

    D C

    1

    ;

    (b)v

    G

    1

    ;

    (c)v

    C S 1

    ; v

    C S 2

    ; and (d) vC S 3

    ; v

    C S 4

    :

    Fig. 11. Simulation results( S

    0 toS

    0 1

    ) :

    (a)i

    L S 2

    ; i

    D C 1

    ;

    (b)v

    G 2

    ;

    (c)v

    C S 1

    ; v

    C S 2

    ; and (d) vC S 3

    ; v

    C S 4

    :

    TABLE IIICOMPARISON OF DATA OBTAINED FROM ANALYSIS AND

    SIMULATION ( ED

    = 2 6 0 0 V, IL O A D

    = 3 0 0 A)

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    SUNG AND NAM: SIMPLE SNUBBER CONFIRMATION FOR THREE-LEVEL GTO INVERTERS 255

    (a) (b)

    Fig. 13. Experimental plots during the transition from S0

    to S1

    : (a) iL S 1

    ; v

    C S 1

    ; v

    C S 2

    : (b) vL S 1

    ; v

    G 1

    :

    (a) (b)

    Fig. 14. Experimental plots during the transition from S1

    to S0

    : (a) iL S 1

    ; v

    C S 1

    ; v

    C S 2

    : (b) vC S 1

    ; v

    G 1

    :

    Fig. 14(a) shows and when is turning

    off during the transition from to The current decreasing

    rate of is 15 A/ s under 85-A load current. Fig. 14(b)

    shows the capacitor voltage and the corresponding

    anodecathode voltage of Fig. 14(b) shows that the

    rising rate of is controlled at 38 V/ s by the action of

    The corresponding simulation result, although in different

    condition, is shown in Fig. 10.

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    256 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 14, NO. 2, MARCH 1999

    (a) (b)

    Fig. 15. Experimental plots during the transition from S0

    to S0 1

    : (a) iL S 2

    ; v

    C S 1

    ; v

    C S 2

    : (b) vC S 2

    ; v

    G 2

    :

    TABLE IVCOMPARISON OF DATA OBTAINED FROM ANALYSIS AND

    EXPERIMENTS ( ED

    = 1 0 0 0 V, IL O A D

    = 8 5 A)

    Fig. 15(a) shows and when is turning

    off during the transition from to Fig. 15(b) also shows

    and the anodecathode voltage of The rising rate

    of is about 42 V/ s, which is about the same value as that

    of shown in Fig. 14(b). Note further that from Fig. 15(b),

    the anodecathode voltage of reaches V after

    overshoot, but in the RLD/RCD snubber circuit, it can stay at

    the maximum overshoot value, without returning to , due

    to the blocking action of The corresponding simulation

    result, although in a different condition, is shown in Fig. 11.

    From all experimental figures, we can see that the voltage

    rising rates of are the same, which verifies (2).Table IV shows data obtained from analytical solutions and

    experimental results. We can see that both results agree, within

    a small range for error or minor adjustments.

    VII. CONCLUDING REMARKS

    A simple snubber circuit is proposed for a three-level GTO

    inverter/converter. In the proposed snubber circuit, all snubber

    capacitors in an arm participate in limiting the voltage rising

    rate of a GTO. Furthermore, an inductor is also integrated into

    the capacitor circuit, thus there is no extra inductor energy

    discharging circuit. From these facts, the proposed snubber

    can be looked upon as an extended version of the McMurray

    snubber for the three-level system. The characteristics of the

    proposed snubber are:

    1) small number of parts, especially a reduced number of

    resistors;

    2) suitable structure for snubber energy recovery;

    3) second-order current discharging dynamics relieving the

    large initial current loading to GTOs;4) guaranteed voltage balancing mechanism between seri-

    ally connected GTOs;

    5) reduced capacitance of snubber capacitors.

    Simulation and experimental works have demonstrated the

    validity of the proposed snubber.

    REFERENCES

    [1] W. McMurray, Efficient snubbers for voltage-source GTO inverters,IEEE Trans. Power Electron., vol. PEL-2, pp. 264272, July 1987.

    [2] T. Undeland, F. Jenset, A. Steinbakk, T. Rogne, and M. Hernes,A snubber configuration for both power transistor and GTO PWMinverters, in IEEE PESC Rec., 1984, pp. 4253.

    [3] J. Holtz and K. H. Werner, A nondissipative snubber circuit for high-power GTO inverters, IEEE Trans. Ind. Applicat., vol. 25, no. 4, pp.620626, 1989.

    [4] A. Nabae, I. Takahashi, and H. Akagi, A new neutral-point-clampedPWM inverter, IEEE Trans. Ind. Applicat., vol. 17, no. 5, pp. 518523,1981.

    [5] S. Tamai et al., 3 level GTO converter-inverter pair system for largecapacity induction motor drive, in EPE Annu. Meeting Conf. Rec., vol.13, Sept. 1993, pp. 4550.

    [6] H. Okayama, M. Koyama, S. Tamai, and T. Fuji, Large capacity highperformance 3-level GTO inverter system for steel main rolling milldrives, in Conf. Rec. IAS Annu. Meeting, 96, pp. 174179.

    [7] J. H. Suh, B. S. Suh, and D. S. Hyun, A new snubber circuit forhigh efficiency and overvoltage limitation in three-level GTO inverters,

    IEEE Trans. Ind. Applicat., vol. 44, no. 2, pp. 145156, 1997.[8] B. S. Suh and D. S. Hyun, A circuit design for clamping an over-voltage

    in three-level GTO inverters, in IECON 94, pp. 651656.

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    SUNG AND NAM: SIMPLE SNUBBER CONFIRMATION FOR THREE-LEVEL GTO INVERTERS 257

    [9] G. Seguier and F. Labrique, Power Electronic Converters. New York:Springer-Verlag, 1993.

    [10] J. G. Kassakian, M. F. Schlecht, and G. C. Verghese, Principles of PowerElectronics. Reading, MA: Addison-Wesley, 1991.

    [11] N. Mohan, T. M. Undeland, and W. P. Robbins, Power Electronics.New York: Wiley, 1995.

    [12] J. A. Taufiq and Y. Shakweh, New snubber energy recovery schemefor high power traction drive, in IPEC-Yokohama 95, pp. 825830.

    [13] S. Irokawa, T. Kitahara, F. Kchikawa, and T. Nakajima, A new snubberenergy recovery method for voltage source self-commutated converters,

    in IPEC-Yokohama 95, pp. 15721577.

    Jeong-Hyoun Sung (S96) was born in Pusan,Korea, on August 6, 1970. He received the B.S.and M.S. degrees in electrical engineering fromPOSTECH University, Pohang, Korea, in 1995 and1997, respectively. He is currently working to-wards the Ph.D. degree in electrical engineering atPOSTECH University.

    His main interests are ac motor control and powerinverter/converter systems.

    Kwanghee Nam (S83M86) was born in Seoul,Korea, on September 26, 1956. He received theB.S. degree in chemical technology and the M.S.degree in control and instrumentation engineering,both from Seoul National University, Seoul, in1980 and 1982, respectively, and the M.A. degreein mathematics and the Ph.D. degree in electricalengineering from the University of Texas, Austin,in 1986.

    He is currently an Associate Professor in the

    Department of Electrical Engineering, POSTECHUniversity, Pohang, Korea. His main interests are ac motor control, high-power drives, power converters, and nonlinear systems analysis.