International Conference on Applied Energy 2019 Aug 12-15, 2019, Västerås, Sweden

Paper ID: 599

A SIMPLIFIED FAULT-TOLERANT SCHEME FOR CASCADE H-BRIDGE STATCOM OF DISTRIBUTED ENERGY SYSTEM BASED ON VIRTUAL CAPACITOR VOLTAGE

Jia Si1, Qian Xiao1,4*, Yunfei Mu1, Jinyu Wang2,Yu Jin3,4, Pengfei Hu5, Xinyu Wang 6, Yimei Zhang1, Hongjie Jia1 1 Key Laboratory of Smart Grid of Ministry of Education, Tianjin University, China. 2 School of electrical and electronic engineering, Nanyang Technological University, Singapore. 3 Department of Electrical Engineering and Automation, Harbin Institute of Technology, China. 4 Department of Energy Technology, Aalborg University, Aalborg, Denmark. 5 School of Mechanical and Electrical Engineering, University of Electronic Science and Technology of China, China. 6 Sungrow Power Supply Co., Ltd., Hefei, China.

Corresponding author: Qian Xiao (e-mail: xiaoqian@tju.edu.cn).

ABSTRACT Static synchronous compensator (STATCOM) can

effectively improve the power quality in the medium-voltage distributed energy system (DES). In order to keep the system stable operation, fault-tolerant ability should be maintained to improve the reliability of STATCOM. With the idea of virtual capacitor voltage, a simplified fault-tolerant control scheme is proposed for popular cascaded H-bridge (CHB) based STATCOM. First, an improved modulation method is adopted to significantly reduce these carrier waves. Then, based on the virtual capacitor voltage, the control scheme during the cell fault can be further simplified. Finally, the detailed post-fault operation principle is presented according to different operation conditions of STATCOM, where the capacitor voltages in the faulty phase can remain unchanged in certain cases. Validation results verify the effectiveness of the proposed fault-tolerant scheme. Keywords: distributed energy system (DES), static synchronous compensator (STATCOM), fault-tolerant, bridge cell fault, virtual voltage

1. INTRODUCTION Due to the arising power quality issue in the

distributed energy system (DES), flexible ac transmission systems (FACTs) is gaining more attention. With the voltage level increasing in the DES, static synchronous compensator (STATCOM) based on multilevel converters

have been widely applied in various applications [1]. In the medium voltage DES, the STATCOM can effectively compensate the reactive power, improve the power factor, and save more energy on the transmission lines. Cascade H-bridge STATCOM is one of the most popular topologies due to the modularity, simplified control structure, and continuous and smooth compensation of reactive power [2]-[4].

CHB converters consist of a large number of bridge cells, and the potential cell fault will lead to the overmodulation and even the divergency of the capacitor voltages. Hence, it is necessary to add fault-tolerant control in the overall control system [5]. Generally, the fault-tolerant method can be divided into two categories, redundant unit approaches and software fault-tolerant approaches [6].

For redundant unit approaches, cold-reserved H-bridge cells can be added in each leg of the converter [7]. In [8], an additional isolated DC source in the CHB converter is added for fault-tolerant operation. Besides, an auxiliary three-phase two-level bridge converter, including six switches and one DC capacitor is added in the CHB converter for fault-tolerant operation in [9]. However, these methods increase the cost of the system with rewards only in cell fault conditions. Besides it is difficult to add the additional DC sources or two level bridge converter in the industrial application considering its unavailability to additional DC source and control complexity.

For the software fault-tolerant approaches, several fault-tolerant methods have been proposed in [10]-[12]. In these methods, in order to get a desired maximum line-line output voltage, the different common-mode voltage signals are added to voltage reference of each phase, leading to the voltage shift in the neutral point of the converter. Although the neutral voltage drift has no effect on the line-line output characteristics, it lowers the voltage utilization and causes the unequal distribution of the active power between three phases. In addition, another fault-tolerant method can be realized by bypassing the faulty cell and relevant one faulty cell in the other two phase [7]. This methods generate a symmetric output voltages for the line-line voltage. However, it lower the utilization of the healthy cells and require reconfiguration of the carriers.

This paper proposes a simplified fault-tolerant control scheme for CHB based STATCOM. First, an improved modulation method is presented with significantly reduced carriers. Then, based on the idea of virtual capacitor voltage, a simplified fault-tolerant scheme is proposed. At last, the post-fault operation principle is further discussed according to different operation conditions of STATCOM.

The rest of this paper is organized as follows. In section 2, the topology and overall control method during normal operation is introduced. The proposed fault-tolerant method and the corresponding post-fault configurations are discussed in section 3. Simulation results in section 4 verify the effectiveness of the proposed fault-tolerant scheme. Section 5 gives the conclusion of this paper.

2. OVERALL CONTROL SYSTEM OF CHB BASED STATCOM

In this section, the overall control system of CHB based STATCOM is presented first. Then, the control details during normal operation are introduced in detail.

2.1 Overall control method

The topology of CHB based STATCOM is shown as Fig. 1. The CHB converter includes three identical phase clusters, each of which is composed of N bridge cells. Each bridge cell consists of four IGBTs in H-bridge configuration and one capacitor, as shown in Fig. 1. The output terminal of each phase is connected to the grid through a filter inductor. The voltage difference between the output terminals of CHB and the grid determines the output current of the CHB converter.

As is shown in Fig. 2, the control of CHB STATCOM can be divided into 4 parts. Overall capacitor voltage control, output current control, cluster voltage balancing control, and modulation.

2.2 Detailed control during normal operation

The overall capacitor voltage is designed to generate the active current reference, which is used to control the sum of all capacitor voltages in every cell.

The output current control is adopted to control the active and reactive current reference, thus accurately compensating the reactive power in the distributed energy system. It is realized with decoupled PI controllers under dq frame, and the feed-forward signal of grid voltages is adopted to get better dynamic performance.

The cluster voltage balancing control is implemented with zero-sequence voltage injection calculated under αβ frame. The detailed injection principle is presented as follows. Based on the voltage deviation of the cluster voltage, three PI controllers are used to calculate the power to be injected in each phase. The derivation process of the injected zero-sequence voltage is shown as follows.

Define the injected zero-sequence voltage as

ci

bi

ai

iLa iLb iLc

scU

saU

sbU

isc

isb

isa

Load

Cell1

Cell2

CellN

Cell1

Cell2

CellNPh

ase

clu

ster

Cell1

Cell2

CellN

acL

acL

acL

S1

S2C

Cell

S3

S4

Fig 1 Topology of CHB STATCOM

id

---

+

---

+

iqiLq

PI

PI ---

+

--+

+

ωL

ωL

vd

vqabc

dqvj

output current control

3

3

Σ

Usq

Usd+

+

3Σ

+-

-+

Udcsum*

Udcsum

Udcjk

id*

overall voltagecontrol

j=a,b,c;

c0Pb0Pa0P+

-+

- PI

+-

+- PI

+-

+- PI

abc

αβ

Pα0

Pβ0

Udc*

Udca

Udcb

Udcc

Zero-

sequence

voltage

calculation

OMv

modulation

PI

Udcj

k=1,2,...N; 3ij

3 abc

dq

abc

dq

iLj

θ

iLd

iLq

iq

id

j=a,b,c;

12Nvj--++

OMv

Fault-

tolerant

Udcjk *Udcjk

Improved PD-LSPWM

& Sorting

j=a,b,c; k=1,2,...N;

cluster voltage balancing control

Fig 2 Overall control of CHB STATCOM

0sin( )OMv U t (1)

The output current of the converter is as

sin( )

2sin( )3

2sin( )3

a

b

c

i I t

i I t

i I t

(2)

The power flow caused by the zero-sequence voltage should be

0

0

0

2

0 0

2

0 0

2

0 0

sin( ) sin( )

2sin( ) sin( )3

2sin( ) sin( )3

v a

v b

v c

P U t I t dt

P U t I t dt

P U t I t dt

(3)

The power flow can be further expressed as

0

0

0

0

0

0

(cos cos sin sin )

2 2(cos cos( ) sin sin( ))3 3

2 2(cos cos( ) sin sin( ))3 3

v a

v b

v c

P U I

P U I

P U I

(4)

With the transformation from abc to αβ, it can be derived

0

0

cos

sin

d q

q d

I IP U

P I I U

(5)

Therefore, the d axis and q axis components of the zero-sequence voltage vOM can be expressed as

0

2 2

0

cos 1

sin

d q

q dd q

I I PU

PU I II I

(6)

As a result, the injected zero-sequence voltage can be finalized as

0 0cos sin sin cosOMv U t U t (7)

The cluster voltage of each phase is thus balanced.

In addition, an improved phase disposition level-shifted (PD-LS) PWM is adopted during both the normal and fault-tolerant operation. The modulation process can adapt to the different operation conditions and provide better dynamic performance, and it will be introduced in detail in the next section. It should be noted that the sort and select algorithm will keep the individual capacitor voltage balanced within each phase.

3. FAULT-TOLERANT CONTROL SCHEME In this section, the improved modulation method is

introduced first. Then, the simplified fault-tolerant control method is presented. At last, two operation conditions are discussed to design the post-fault configurations.

3.1 The improved modulation method

Fig. 3 gives the conventional PD-LS PWM method and the improved PD-LS PWM. The traditional PD-LS PWM has N carriers in each ram and requires N comparisons between the modulation wave and the carriers. As is shown in Fig. 3 (a), the N carriers with the same phase are shifted with the amplitude of 1/N. The total calculation amount in unit sampling period should be 2N times, N for carrier generations, and N for comparisons with modulation wave. In addition, it increases dramatically with SM number.

This paper proposed an improved PD-LS PWM, which only adopts 1 carrier and require only 1 comparison between modulation wave and the carrier. As is shown in Fig. 3 (b), there is only one carrier in each arm, and the total calculation amount in unit sampling period should be 3 times, 2 for carrier generation and 1 for comparison with modulation wave. It is clearly shown that the calculation amount in each arm descends from 2N to 3.

3.2 Fault-tolerant control method

Conventionally, phase-shifted carrier (PSC) PWM is adopted, and there are mainly two kinds of fault-tolerant methods. Zero-sequence voltage injection method [13] or raised capacitor voltages in the remaining cells [14] are adopted. In [14], with the fault cell bypassed, all the rest carriers need to be adjusted. If CPS-PWM is adopted, the phase-shifted angles need to be reconfigured. If PD-LCS PWM is adopted, the level-shifted amplitude should be reconfigured.

This section presents an improved fault tolerant control method without reconfiguration of the carriers. The basic principle is shown in Fig. 4. Normally, if the carrier remains the same, the physically bypassed cell is involved in the sort and select algorithm. The curtail issue

(a)

(b)

0 2π/ωt π

0 2π/ωt π

-1

0

1

-1

0

1

Fig. 3 Conventional PD-LS PWM and improved PD-LS PWM. (a) Conventional PD-LS PWM. (b) Improved PD-LS PWM.

lies in the method to unselect the faulty cell. The virtual capacitor voltage is adopted by the faulty cell to keep it unselected in the sort and select algorithm. The virtual capacitor voltage of the faulty cell can be expressed as

lim

lim

* 0;

* 0;

up

cap j outj

dcf low

cap j outj

U i NU

U i N

(8)

where Udcf is the virtual capacitor voltage of the fault cell, and f is the order number of the faulty cells. ij is the output current, and Noutj is the inserted cell number of the faulty phase. Uuplim

cap and Ulowlim cap are the upper limit and

the lower limit of the capacitor voltage, which will not trigger the alarm.

3.3 Post-fault operation principle

For post-fault operation, the output characteristic should be the same as that of the normal operation. However, for different operation conditions of CHB based STATCOM, there can be different post-fault operation modes. The overall post-fault configuration principle is exhibited in Fig.5.

Situation 1. (N - Nf) /N > Ug/Udc: For CHB based STATCOM with N bridge cells, the maximum output voltage should be approximated as

max{| |}outj g

U U (9)

where Ug is the amplitude of the grid voltage. Then, the insert index of each phase should be

max{| |} { }g

outj

dc

UN ceil N

U (10)

where ceil is the round function to the bigger integer. If Nf, the number of the faulty cell, satisfies the above

constraint, it means that the number of the rest normal bridge cells is larger than the maximum output number in this phase. In this situation, there is no necessity to adjust the capacitor voltage in this faulty phase, and only

the virtual capacitor voltage is used to unselect the faulty cells.

It should be noted that under Situation 1, the measured DC voltage of the faulty phase should be modified to effectively realize the cluster voltage balancing and overall voltage control. The measured DC voltage in the faulty phase is modified as

,*

1,

N

dcj dck f dckk k f

U U N U

(11)

where f is the order number of the faulty cell. Situation 2. (N - Nf) /N < Ug/Udc: According to

equation (8) to (10), if Nf, the number of the faulty cell, satisfies the above constraint, it means that the number of the rest normal bridge cells is smaller than the maximum output number in this phase. In this situation, capacitor voltages of the normal cells have to be adjusted to get the desired output characteristic in this faulty phase, and the virtual capacitor voltage is also used to unselect the faulty cells.

It is noted that under Situation 2, the measured DC voltage in the faulty phase should be modified as

,

1,

N

dcj dckk k f

U U

(12)

4. SIMULATION AND EXPERIMENT RESULTS

A three-phase MMC model is established in MATLAB/SIMULINK environment. The structure of the model is as Fig. 1, and the overall control method is as Fig. 2. Table I gives the simulation parameters. Two cases under the above two situations are studied to verify the effectiveness of the proposed control method.

Case1: Fig. 6 shows the simulation results of fault tolerant control with one cell fault at 0.5s. In this case, the number of the faulty cell satisfies the constraint that (N - Nf) /N > Ug/Udc. Fig. 6 (a) exhibits the capacitor voltages during the fault-tolerant process, showing that the capacitor voltage remains the same while the ripples become larger. At the same time, the dynamic response performance is excellent without any obvious fluctuation. This phenomenon is due to the unchanged

Table I Simulation Parameters Items Symbols Values

Grid line voltage Us 10 kV

Rated frequency fg 50 Hz

Rated direct voltage Udc 12 kV

AC filter inductor Lac 20 mH

Carrier frequency fcarrier 1kHz

Cell number per arm N 6

Rated capacitor voltage Usm 2 kV

SM capacitance C 3 mF

PD-LS

PWM

Vref

NSort&

Select

Udck

Udcf

k=1,2,..N

k≠f

cell1

cellf

cellN

10-1

10-1

Fig 4 Proposed PD-LS PWM and sort&selelct algorithm.

Nf < N(1− )Ug

Udc

Udc

NUdck = *

Udc

N-NfUdck = *

Udcj = equ. (11)

Udcj = equ. (12)

Y

Nfault

Y

N

normal configuration

start

Fig 5 The post-fault configuration principle

power consumed by reduced cells with unchanged cell voltage. The output current and the grid current of phase A are shown in Fig. 6 (b) and Fig. 6 (c) individually, indicating that the output current is still smooth when the cell fault occurs, and the reactive power compensation is realized with excellent dynamic performance. In addition, the inserted cell number of phase A is given in Fig. 6 (d), where the maximum absolute value is 5 before and after the fault occurs, meaning that the faulty cell is bypassed and there is no necessity to change the capacitor voltage of each cell. Fig. 6 (e) gives the output voltage of phase A, where the maximum output voltage is about 8600V, approximately equal to the grid voltage.

Case2: Fig. 7 exhibits the simulation results when two cells fault at 0.5s. In this situation, the number of the faulty cells satisfy the constraint that (N - Nf) /N < Ug/Udc,

meaning that the cell voltage has to be adjusted to generate the desired output waveform. Fig. 7 (a) shows the capacitor voltages of the two faulty cells situation, indicating that the capacitor voltages are adjusted to the desired value, about 3000V, at after 0.12s of the fault occurs. At the same time, the dynamic response performance is good with smooth fluctuation. The output current and the grid current of phase A are shown in Fig. 7 (b) and Fig. 7 (c) individually, showing that the output current recovers within about 0.12s when the fault occurs, and the reactive power compensation goes normal when the capacitor voltage reaches its reference. In addition, the inserted cell number of phase A is given in Fig. 7 (d), where the maximum absolute value change from 5 to 4 when two cells fault occurs, meaning that the faulty SMs are bypassed. Fig. 7 (e) gives the output voltage of phase A, where the output voltage sees minor

Volt

age(

V) Udca1 Udca6

1900

1950

2000

2050

2100

Nu

mber

-8

-4

0

4

8Nouta

0.3 0.4 0.5 0.6 0.7 0.8

Uouta

1 faulty cell in phase A

(a)

(d)

Time(sec)(e)

-15

-7.5

0

7.5

15

Usa

Voltage Scaling 1:40Ica

0

-400

-200

200

400

(b)

Usa

Voltage Scaling 1:40Isa

0

-400

-200

200

400

(c)

Volt

age(V

)

Cu

rren

t(A

)

Volt

age(V

)

Cu

rren

t(A

)V

olt

age(k

V)

Fig. 6 Simulation results of case 1 in phase A. (a) Capacitor voltages. (b) The output current. (c) Grid current. (d). Inserted cell number. (e). The output voltage.

Volt

age(

V)

Udca1 Udca6

1900

2200

2500

2800

3100

Nu

mber

-8

-4

0

4

8Nouta

0.3 0.4 0.5 0.6 0.7 0.8

Uouta

2 faulty cells in phase A

(a)

(d)

Time(sec)(e)

-15

-7.5

0

7.5

15

Usa

Voltage Scaling 1:40Ica

0

-400

-200

200

400

(b)

Usa

Voltage Scaling 1:40Isa

0

-400

-200

200

400

(c)

Volt

age(V

)

Cu

rren

t(A

)

Volt

age(V

)

Cu

rren

t(A

)V

olt

age(k

V)

Fig. 7 Simulation results of case 2 in phase A. (a) Capacitor voltages. (b) The output current. (c) Grid current. (d). Inserted cell number. (e). The output voltage.

distortion during the fault-tolerant process. However, it recovers fast as of the capacitor voltage changes in the healthy cells.

Both cases verify the effectiveness of the proposed fault-tolerant control method in capacitor voltage regulation and reactive power compensation during both the pre-fault and post-fault operations.

5. CONCLUSIONS

This paper proposes a simplified fault-tolerant scheme for CHB based STCTOM of the distributed energy system. The main advantages of the proposed fault-tolerant scheme are listed as follows.

1) The number of the carrier is dramatically reduced from N to 1, lowering the calculation burden for carrier generation and relevant voltage reference comparison process.

2) Based on the idea of virtual voltage, the used carriers remain unchanged when bridge cell fault occurs, further simplifying the fault-tolerant process.

3) In different operation cases, STATCOM can always achieve good dynamic performance during the fault-tolerant process by regulating capacitor voltage values of the remaining healthy cells.

It is noted that further experiments results can be added later, due to the limitation of the paper pages.

ACKNOWLEDGEMENT This work was supported in part by the National

Natural Science Foundation of China under Grant (U1766210, 51625702, and 51807135), and in part by the National Key Research and Development Foundation of China under Grant (2017YFB0903300).

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