additional notes on the flipped voltage follower - …s-sanchez/607 lect 5 bb fvf.pdf · additional...

ECEN 607 (ESS)

Additional notes on the Flipped Voltage Follower

Courtesy of Prof. Jaime Ramirez‐Angulo

Analog and Mixed‐Signal Center, TAMU

Local Feedback Loops

Basic Idea

T i f f i l t i t

V. Ivanov, J. Zhou and I.M. Filanovsky, "A 100‐dB CMRR CMOS Operational AmplifierWith Single‐Supply Capability," IEEE Transactions on Circuits and Systems II: ExpressBriefs, vol. 54, no. 5, May 2007, pp.397‐401

• To improve performance of simple transistors:

» By adding local feedback loops to:

» Decrease/increase impedance levels at certain nodes.Decrease/increase impedance levels at certain nodes.

» Decrease/increase signal swing at certain nodes.• Drawbacks:

» Feedback always implies stability problems• Advantages:

» Local Feedback is faster and does not require» Local Feedback is faster and does not requirecompensation if properly designed.

» It allows easy Class AB implementation

2


A possible Implementation

IM2

Vo

I b

XMV i

Iout

2X

o

Vi M1

MV i 1

I b

Flipped Voltage Follower(FVF)Voltage Follower 3


Flipped Voltage Follower (FVF)

● VX is defined by the value of Viand Ib and follows the

i ti f V

YVDS,sat

variations of Vi

• The circuit is able to source (Iout) currents much larger than

XVTHP + VDS,sat

(Iout) currents much larger than Ib

• Low impedance at node X RX=1/(gm2 gm1 ro1)

VDD,min = |VTHP| + 2VDS,sat 4


Flipped Voltage Follower (FVF)

• It is able to operate with Low‐Voltage supplyVDD

MIN=|VTP|+2VDS,sat

• It features a low impedance node: RX≈1/(gm2 gm1 ro1)

• And a high impedance nodeg pRi ≈∞

• There are no stability problems [*]i bl id l d i h h l• It is able to provide a load with currents much larger

than the bias current Class‐AB

[*] R.G. Carvajal, J. Ramírez‐Angulo, A. López‐Martin, A. Torralba, J. Galán, A. Carlosena and F. Muñoz,“The Flipped Voltage Follower: A useful cell for low‐voltage low‐power circuit design,” IEEE Trans. onCircuits and Systems‐I, vol 52, no. 7, Julio 2005. 5

LFL: Basic CellsLFL: Basic CellsLocal Feedback Loops: Class‐AB operation

b ll f f l b hObjective: Design cells for VDD<VDDmin featuring Class‐AB behavior

M 2X

IM1

Y

Iin Vb

II b

6



50

75

(uA

)

M 2X

I

M 5M 2

0

25

-5 0 5

I b

I

I out

(

( A)

M1Y

Iin Vb

I

Iout

C t S i

Iin (uA)I bIout=Iin + Ib

Current Sensing

7



10.0

12.5

VE

S(u

A)

Ib

X

M3I(D1P)I(D2P)

I(D1) I(D2)2.5

5.0

7.5

DC

TRA

NS

FER

CU

RV

M1 M2V1 V2

X

M1 M2V1 V2

X

MaVa

Cl A Cl AB d

0-400 -200 0 200 400

VIN (mV)

D

iD1 iD2 iD1 iD2Ib

I(D2P)I(D1P)

Class-A differential pair

Class-AB pseudo differential pair

Comparison

8



Quiescent Current in Class‐A based SC circuits:

Limits Slew‐RateLimits GBW

Depending on clock freq :Depending on clock freq.:One of them sets IQ

For low freq. SR limits.

G Giustolisi and G Palumbo "A novel 1 V class ABG. Giustolisi and G. Palumbo, A novel 1‐V class‐ABtransconductor for improving speed performance in SCapplications,". ISCAS 2003, vol. 1, 25‐28 May 2003 pp.153‐156

9



• Adaptive biasing+LCMFB = Super Class AB

• Improvements: – Slew rate

– Gain‐Bandwidth productGain Bandwidth product

– Current efficiency

• Applicationspp– Low‐voltage low‐power SC circuits

– Buffers for large load caps and testing

10



Slew Rate: BIBIAS/CLConventional Class A OTA

M3 M4

IIBIAS

BIAS/ L

GB: Bgm1,2 /(2πCL)Iout

M1 M2

I1 I2

Vin- Vin+ Current Efficiency: B/(B+1)

M5 M6 M7 M8

1:BB:1

Larger B increases all this but also increases power consumption and decreases phase margin 11



Super Class‐AB OTA

M3 M4

Adaptive Biasing

Adpatative biasing:↑ Slew rate

LCMFB:

R R

M1 M2

I I

Vin- Vin+Iout

↑↑ Slew rate↑ GBW↑ Current

R1 R2

M5 M6 M7 M8

I1 I2 Efficiency

1:11:1LCMFB

12



Local Common‐Mode Feedback (I)

R1 R2

X Y

I1 I2I8

IRI5Quiescent conditions

ZM5 M6 M7 M8

7,6

2β

BTHZYX

IVVVV +===

IB: Quiescent value of I1 and I2Low quiescent power consumption 13



Local Common‐Mode Feedback (II)

R1 R2

X Y

I1 I2I8

IRI5

Dynamic conditions

ZM5 M6 M7 M8

2I 2⎞⎛

2

2

1

7,6

dZX

cmTHZ

IRVV

IVV

+=

+=β

2

1

7,6

55 2

22 ⎟

⎟⎠

⎞⎜⎜⎝

⎛+= dcm IRI

Iβ

β

If I1>I2:I I I I

where Icm = (I1 + I2)/2 and Id = I1 ‐ I22

22 d

ZYIRVV −=

Iout=I5‐I8 ≈ I5

14



Local Common‐Mode Feedback (III)

R1 R2

X Y

I1 I2I8

IRI5Dynamic conditions

ZM5 M6 M7 M8

2 cmIVV += 2⎞⎛β

21

7,6

dZX

THZ

IRVV

VV

+=

+=β

If I1<I2:

I =I I ≈ I

2

7,6

88 2

22 ⎟

⎟⎠

⎞⎜⎜⎝

⎛−= dcm IRI

Iβ

β

where Icm = (I1 + I2)/2 and Id = I1 ‐ I22

22 d

ZYIRVV −=

Iout=I5‐I8 ≈ ‐I8

15



I

Local Common‐Mode Feedback (IV)

R1 R2

X Y

M M M M

I1 I2I8

IRI5Dynamic conditions

ZM5 M6 M7 M8

General expression for I ≠ I :General expression for I1 ≠ I2:2

2,18,585 2

22 ⎟

⎟⎠

⎞⎜⎜⎝

⎛+±≈−= dcm

out

IRIIII

ββ

Quadratic boosting of differential current Id

7,6 22 ⎟⎠

⎜⎝ β

16



Adaptive Biasing+LCMFB

RgkgM3 M4

YXRkg 85

GB product:L

YXmm

CRgkg

GBπ2

,8,52,1=

⇒ Increase ofM1

M2

Adaptive Biasing

Vin- Vin+Iout

YXm Rkg ,8,5

2

221212185 ⎟⎞

⎜⎛ R βββ

Large‐signal output current:⇒ Increase ofR1 R2

X

Z

Y

M5 M6 M7 M8

I1 I2

1 11 1 22,12,1

7,6

2,18,5

42 ⎟⎟⎠

⎜⎜⎝

+±≈ ididout VVIβ

βββ

Phase margin:

( ) ⎤⎡⎟⎞

⎜⎛ GSCGBW 852ºº

1:11:1

( ) ⎥⎦

⎤⎢⎣

⎡−≈⎟

⎟⎠

⎞⎜⎜⎝

⎛−≈

L

GSoomm

YX CC

rrRgkgarctgf

GBWarctgPM 8,522,17,62,18,52,1

º

,

º ||||9090

High SR with low R1,2 ⇒ stability 17


Adaptive Biasing of Input Pair: SIM2A

M1A

IB

VBVB

IB

M1B

M2B

Vin Vin+ V V 2

02

22

21

2

2

2,1

2,11

⎟⎞

⎜⎛

><⎟⎟⎠

⎞⎜⎜⎝

⎛+= idBid

B

I

VIIVI

I

β

ββ

(a)

M1M2

I1 I2

M1 M2

I1 I2

M

(b)

Vcm+VB

in- in+ Vin- Vin+

V V

02

2 12,1

2,12 <<⎟

⎟⎠

⎞⎜⎜⎝

⎛−= idBid

B VIIVI

Iβ

β

022

2,1 ><⎟⎞

⎜⎛

+ idB VIIVIIβ

M1M2

Vcm

VB

IB

M1 M2

M2A

M1AVcm

CMS

(c) (d)

I1 I2I1 I2

Vin- Vin+Vin- Vin+

02

22

022

1

2

2,1

2,12

22,1

2,11

<<⎟⎟⎠

⎞⎜⎜⎝

⎛−=

><⎟⎟⎠

⎜⎜⎝

+=

idBidB

idBidB

VIIVII

VIII

ββ

β

M1M2

Vmax

VBI1 I2

Vmax+VB

IB IB

Vin- Vin+

V V

NM2A

M1A M1B

M2B

2

022

2

2

2

2,1

2,11

⎟⎞

⎜⎛

>=⎟⎟⎠

⎞⎜⎜⎝

⎛+= idBid

B

I

VIIVII

β

ββ

Strong inversion: Quadratic boosting of Vid not limited by IB

WTA

(e)

M1M2

I1 I2

(f)

Vin- Vin+ 022 1

2,1

2,12 <=⎟

⎟⎠

⎞⎜⎜⎝

⎛−= idBid

B VIIVIIβ

β

18


Adaptive Biasing of Input Pair: WIM2A

M1A

IB

VBVB

IB

M1B

M2B

Vin Vin+ V VT

id

T

id

nUV

BnUV

B eIIeII−

== 21

(a)

M1M2

I1 I2

M1 M2

I1 I2

M2A

(b)

Vcm+VB

in- in+ Vin- Vin+

V V

BB 21

VVM1

M2

Vcm

VB

IB

M1 M2

M2A

M1AVcm

CMS

(c) (d)

I1 I2I1 I2

Vin- Vin+Vin- Vin+

T

id

T

id

nUV

BnUV

B eIIeII 22

21

−

==

M1M2

Vmax

VBI1 I2

Vmax+VB

IB IB

Vin- Vin+

V V

NM2A

M1A M1B

M2B

⎟⎟⎠

⎞⎜⎜⎝

⎛=⎟

⎟⎠

⎞⎜⎜⎝

⎛=

−

BnUV

BBnUV

B IeIIIeII T

id

T

id

,max,max 21

Weak inversion: Exponential boosting of Vid not limited by IB

WTA

(e)

M1M2

I1 I2

(f)

Vin- Vin+ ⎠⎝⎠⎝

19


M3 M4 M3 M43 4

Vout

IBIBIBIB

Vout

M2A

M1AM1B

M2B M2A

M1AM1B

M2B

3 4

Super Class AB OTA Topologies

R1

M5

M1

M6 M7 M8

M2R2

( ) (b)

Vin-Vin+

R1

M1 M2R2

Vin- Vin+

M5 M6 M7 M8

OTA Topologies

M

M10

M

M12R3 R4

(a) (b)

AM10

M

M12

MM M

R3 R4M14 M16A

M3 M4M3 M4

M M

IB

M11M9

IB

M2A

-+

Vout

Vin- Vin+M M

M9

IB

M2A

M1A

M11

IB

M13

IB

M15

IB

Vout

Vin- Vin+

R1

M1 M2R2

(c) (d)

M1 M2IB

R1 R2M5 M6 M7 M8M5 M6 M7 M8

20


M t R lt (I) Technology:Measurement Results (I) Technology:0.5 μm CMOSDouble PolyV 0 96VVTHP ≈ ‐0.96V VTHN ≈ 0.67V

OTA Fig. (b)

OTA Fig. (d) Meas. conditions:VDD = ‐VSS = 1 VIB = 10 μAC = 80pFOTA Fig. (a)

600 μm

CL= 80pF

21


1.5

2

40

OTA Fig. (a)

0

0.5

1

Cur

rent

(mA

)

OTA Fig. (d)20

30

itude

(dB

)

OTA Fig. (a)

OTA Fig. (d)

1 5

-1

-0.5

Out

put C

Class A OTAOTA Fig. (b) 0

10Mag

n O g (d)

OTA Fig. (b)

-0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4-2

-1.5

Vid (V)

OTA Fig. (a)

M d d

102 103 104 105 106-10

Freq (Hz)

M d l fMeasured dc output characteristics of the OTAs

Measured open‐loop frequency response of the OTAs

22


-0.5

0

Vol

tage

(V)

Class A OTA

OTA Fig. (a)

0 0.5 1 1.5 2 2.5-1

V

0 5

0

ge (V

)

Class A OTA

OTA Fig. (d)

0 0.5 1 1.5 2 2.5-1

-0.5

Vol

tag

0

V)

Class A OTA

0 0 5 1 1 5 2 2 5-1

-0.5

Vol

tage

(V

Class A OTA

OTA Fig. (b)

0 0.5 1 1.5 2 2.5Time (us)

Transient response of the OTAs in unity‐gain configuration 23

LFL: Basic CellsLFL: Basic CellsLocal Feedback Loops: Super Class‐AB operation

PARAMETER Class A OTA OTA OTA PARAMETER OTA Fig. 3(a) Fig. 3(b) Fig. 3(d)

Slew Rate (positive) 0.35 V/μs 100 V/μs 92 V/μs 42 V/μs

Slew Rate (negative) -0.4 V/μs -78 V/μs -76 V/μs -80 V/μs

Pos. settling (1%) 3.1 μs 29 ns 66 ns 100 ns Performanceg ( ) μ

Neg. settling (1%) 3.6 μs 57 ns 62 ns 33 ns

GBW 200 kHz 725 kHz 410 kHz 470 kHz

Equ. Input Noise (1 MHz) 223 μVrms 230 μVrms 230 μVrms 252 μVrms

THD @ 100 kH 0 9V 40 dB 56 dB 43 dB 41 dB

Performance parameters of the OTAs

THD @ 100 kHz, 0.9Vpp -40 dB -56 dB -43 dB -41 dB

Dynamic range 63 dB 66 dB 63.7 dB 62.5 dB

DC gain 30 dB 43 dB 37.5 dB 37.5 dB

CMRR 54 dB 68 dB 70 dB 69 dB

PSRR+ (dc) 48 dB 55 dB 50 dB 57 dB

PSRR- (dc) 44 dB 58 dB 53 dB 46 dB

Static power consumption 80 μW 120 μW 120 μW 140 μW

Die area 0 011 mm2 0 024 mm2 0 024 mm2 0 042 mm2Die area 0.011 mm2 0.024 mm2 0.024 mm2 0.042 mm2

Antonio J. López Martín, Sushmita Baswa, Jaime Ramírez Angulo, R.G. Carvajal, “Low‐Voltage Power‐EfficientSuper Class AB CMOS OTA Cells with Very High Slew Rate and Power Efficiency,” IEEE Journal of Solid‐StateCircuits, vol. 40, no. 5, pp. 1068‐1077, Mayo de 2005

24

LFL: Basic Cells

Local Feedback Loops: Super Class‐AB operation

Proposed Circuit Topology

NonLinear Active Load25

LFL: Basic Cells


Class‐AB Input Stage

02

22

2

2

2,1

2,11

⎞⎛

><⎟⎟⎠

⎞⎜⎜⎝

⎛+= idBid

B VIIVI

Iβ

β

02

2 1

2

2,1

2,12 <<⎟

⎟⎠

⎞⎜⎜⎝

⎛−= idBid

B VIIVI

Iβ

β

Local Feedback26

LFL: Basic Cells


Class AB current mirror

25

50

75

I out

(uA

)

1st d OTA0

25

-5 0 5

I b

Iin

I

(uA)

1st proposed OTA

27

LFL: Basic Cells


Non‐linear current mirror

2nd proposed OTA28

LFL: Basic Cells


Non‐linear source degenerated current mirror

Iin Iout

M

M10

VbM8

M7b

3rd proposed OTA29

LFL: Basic Cells


VDD=±1VI =10μAIB=10μACL=80pF

AMI 0.5 μm CMOS Technology Frequency Response30

LFL: Basic Cells


OTA based on FVF OTA based on FVFCSOTA based on FVF OTA based on FVFCS

0.8

0.9

1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

OTA deg. de fuente Class A OTA

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 20

0.1

us

31

LFL: Basic Cells

d f f h f b d


PARAMETER OTAclase-A OTA 1 OTA 2 OTA 3

Measured performance of the fabricated OTAs



GBW 200 kHz 3.27 MHz 3.46 MHz 2.3 MHz

Phase margin 90º 56º 58º 71º



GBW 200 kHz 3.27 MHz 3.46 MHz 2.3 MHz

THD @ 100 kHz, 0.9Vpp -40 dB -37 dB -41 dB -40 dB

DC gain 30 dB 37 dB 39 dB 41 dB

CMRR 54 dB 85 dB 70 dB 75 dB

PSRR+ (dc) 48 dB 41 dB 37 dB 56 dBPSRR+ (dc) 48 dB 41 dB 37 dB 56 dB

PSRR- (dc) 44 dB 52 dB 70 dB 51 dB


Die area 0.011 mm2 0.054 mm2 0.054 mm2 0.054 mm2


32

additional notes on the flipped voltage follower - …s-sanchez/607 lect 5 bb fvf.pdf · additional...

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