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AF3: Seamless Model Based Development
FB1
- From Theory to Practice -
08.11.2011© fortiss GmbH 2011
Seamless what?
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Seamless MBD is the pervasive use of models
throughout all development phases
Higher Productivity
Higher Analyzability
Higher Quality
Tool framework for seamless model-based development» http://af3.fortiss.org/
Open Source, Apache 2.0 License
Specification languages Basic: components architecture, state machines, technical platform, deployment, ...
Analyses Basic: simulation, on-the-fly verification of constraints
Generators Basic: code generation – e.g. embedded C, Java, ...
AF3 at a Glance
Tool framework for seamless model-based development» http://af3.fortiss.org/
Open Source, Apache 2.0 License
Specification languages Basic: components architecture, state machines, technical platform, deployment, ...
Advanced: modes, temporal logics, ... Analyses
Basic: simulation, on-the-fly verification of constraints
Advanced: » test cases generation (random, state/transition coverage)» model checking using verification patterns
Generators Basic: code generation – e.g. embedded C, Java, ...
Advanced: scheduling synthesis, FPGA code generation, ...
AF3 at a Glance
08.11.2011© fortiss GmbH 2011
Modular Framework Architecture
EMF, GEF, …
Generic Toolingframework
Application
Design
AdequateBehavior
Specifications
HardwareEnvironme
nt
SystemDeployme
nt
RequirementsEditors
Metamodel
Generators
08.11.2011© fortiss GmbH 2011
Todays AF3 Topics
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Model-based Integrated Requirements Analysis
Automatic Testcase Generation
Model Checking for the Masses
Pervasive Deployment, Code Synthesis and Rollout
Optimized Realtime Schedule Generation
FPGA Code Generation and Deployment
Model-based Integrated Requirements Analysis
Dongyue Mou, Sabine Teufl
08.11.2011© fortiss GmbH 2011
Model-based RE?
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Extend AF3 to support Requirements Engineering
Capture informal requirements
Refine requirements into formal system specifications
Front-loadingEarly Analyses
Complete Traceability
https://projects.fortiss.org/redmine/public/projects/re-for-af3
08.11.2011© fortiss GmbH 2011
Features
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Template for general requirements and use cases Generation of requirement documents Verification of completeness, correctness and
consistency Visual presentation of requirement hierarchy Integration of requirements and logical architecture Support of Message Sequence Chart
08.11.2011© fortiss GmbH 2011
Future Works
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Introduction of functional architecture Integration of testing Automatic verification of refinement Support more requirement types
Non-Functional Requirements Timing Constraints …
Automatic Testcase Generation
Christian Pfaller, Dongyue Mou, Bernhard Schätz
08.11.2011© fortiss GmbH 2011
Focus
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Methods and tool support for the automatic generation of testcases from (partially) executable models
Automatic Qualilty Assurance
BMBF Project IMES (BMW, Itemis, …) Technology Transfer in industrial Applications
08.11.2011© fortiss GmbH 2011
Ecosystem
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Competencies: Constraint-Logic Programming
Cross-references: RACE
Model Checking for the Masses with AF3
Daniel Ratiu
08.11.2011© fortiss GmbH 2011
... for the Masses?
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Usability challenges of doing model checking» Model the system» Write temporal logics specifications» Interpret the counterexample
Process Support
Continuous Quality Assurance
08.11.2011© fortiss GmbH 2011
Goals
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Transfer model checking technology to practitioners
» Bring formal verification closer to common developers
Make them „get the idea“ in less than 10 minutes
Wrap the theory such that it is „ready to use“
» Research on pragmatic aspects of formal verification (model checking)
Integrate formal verification in a more agile process
» Continuously write, save and check properties
Defining a verification condition should take less than one minute
08.11.2011© fortiss GmbH 2011
Deeply integrate Cadence SMV in AF3
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Specification of verification conditions with the help of TL patterns
Basic, ready to use patterns
Advanced patterns
Simulate counterexamples in the IDE
... or present them as MSCs
Support for black-box temporal-logics based specifications
Can be checked against the implementation continuously in the process
08.11.2011© fortiss GmbH 2011
AF3 Model Checking at a Glance
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A Pervasive Approach toDeployment, Code Synthesis and Rollout
Florian Hölzl, Andreas Wandinger, Christoph Döbber
08.11.2011© fortiss GmbH 2011
Pervasive Deployment?
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Decouple Application Logic from Execution Platform
Parallelization of Application and Platform Development
Automatic Code Synthesis and System Integration
Separation of ConcernsIndependent Reuse of Application and Platform
Automatized System Rollout
08.11.2011© fortiss GmbH 2011
Deployment and Rollout
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08.11.2011© fortiss GmbH 2011
Code Synthesis
08.11.2011© fortiss GmbH 2011
Future Work
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Multi – Criteria Synthesis for Efficient Deployment
Sebastian Voss
08.11.2011© fortiss GmbH 2011
Multi-Criteria Synthesis?
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Integrate Application Logic on Execution Platform
Semi-automatic Design Space Exploration Methods
Multi-Criteria Trade-off Analysis (Timing, Energy-Efficiency, Memory Consumption, …)
Efficient DeploymentOptimized Partitioning and Mapping
08.11.2011© fortiss GmbH 2011
Multi – Criteria Synthesis for Efficient Deployment
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Based on AF3 component and platform architecture Design Space Exploration based on SMT-Solving Goals:
Providing an efficient deployment (with respect to timing, energy-efficiency, memory consumption, …) for multi-criteria problems
Calculate an (optimized) partitioning and/or mapping of systems
Logical Architecture
Technical Architecture
Synthesis mechanismsEfficient
Deployment
08.11.2011© fortiss GmbH 2011
SMT – Solver (e.g. Z3, YICES, …)
Based on AF3 Component and Platform Architecture Extraction of the Component Precedence Relation Task and Message Schedule Generation for:
Distributed Event-based Systems (e.g. based on CAN) Time-triggered Platform Architecture Multi-core Platform Architectures
Multi – Criteria Synthesis for Efficient Deployment
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Deployment
Logical Architecture
Technical Architecture
Synthesis Mechanisms
Scheduling Model
Extended DAG
Optimization criteria(e.g. E2E – latency,…)
Schedule
FPGA Code Generation
Chun Li
08.11.2011© fortiss GmbH 2011
Focus
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Mode switch diagrams – based reconfigurable FPGA Code-Generation
System design and code generation
» Editor and simulation support, VHDL code generation
Deployment on FPGA Hardware(Run-Time Reconfigurable)
» Tool support for design on run-time reconfigurable FPGAs (Xilinx Virtex II Pro )
Reconfigurable Computing
Partner: TUM Lehrstuhl für Integrierte Systeme Example project: AutoVision
(http://www.lis.ei.tum.de/index.php?id=62)
08.11.2011© fortiss GmbH 2011
Workflow
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Standalone self-reconfiguration with embedded microprocessor
Synthesizable VHDL Codes
Modes Automaton
Competencies:
Model-based Systems Engineering
SW and HW Co-Design