active optical clock distribution · clock distribution has become a major problem in inte-grated...

SponsorshipMARCO Focused Research Center on Interconnect (MARCO/DARPA) and NDSEG Fellowship

Clock distribution has become a major problem in inte-grated circuits. Although clock cycle times continue todecrease, the time allocated to uncertainty in the clockdue to skew and jitter has remained constant. Therefore,the percentage of the clock budget devoted to uncer-tainty has become significant.

One solution to the clock uncertainty problem is to dis-tribute the clock optically. Conventionally, this hasinvolved using a transimpedance pre-amplifier to con-vert the optical current pulses from the photodetectorinto voltage waveforms. An inverter-based cascade isthen used to amplify the clock pulses into full-swingsignals that drive the local clock buffers. Past researchhas shown that this approach is limited by the imper-fect matching of amplifiers from one block to another.Arising from process, voltage, and temperature, thesevariations can significantly increase the skew, thusnegating the benefits of distributing a skewless opticalclock.

Our research focuses on an alternative approach to opti-cal clock distribution. Whereas the cascaded amplifierapproach attempts to convert optical current pulses intoan electrical waveform, our proposed architecture usesan optical reference clock to deskew an electrical clock.The architecture resembles that of a Delay-Locked Loop(DLL) in that a voltage-controlled delay line is used tosynchronize the fully-buffered electrical clock with theoptical current pulses from the photodetector. The useof a feedback-based architecture allows the loop to com-pensate for variations due to process, voltage, and tem-perature, and thus minimize skew.

A test chip demonstrating this concept was fabricatedusing the TSMC .18 µm process. The chip comprisedthree instances of the architecture, including bothopened-loop and closed-loop versions. The photodetec-tors on the test chip were of the lateral PIN type andwere implemented in standard CMOS, although thearchitecture is also compatible with other types. Finally,

Active Optical Clock Distribution

PersonnelT. Simpkins (A. P. Chandrakasan)

a low-resolution time-to-digital converter was includedto measure the skew between the optical current inputand the electrical clock output.

Fig.9: