gate-level minimization - basavaraj talawar · outline k-map method product-of-sums simplification...
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Gate-Level Minimization
Ch. 3. Mano & Ciletti
Outline● K-Map Method● Product-of-Sums Simplification● Don’t Care Conditions● NAND and NOR● Exclusive OR (XOR)● Parity Generation & Checking
Gate-Level Minimization● Boolean functions describe a Digital
Circuit.● Gate Level Minimization techniques
find an optimal circuit.● Done in logic Synthesis tools
Implement
K-Map Method● Simplify
Maurice Karnaugh (1924 – )
Map Method● Simplify
Map Method● Simplify
Map Method● Simplify
Map Method● Simplifiy
Map Method● Simplifiy
Map Method● Simplifiy
4-variable K-Map
4-variable K-Map
4-variable K-Map
Prime Implicant● A prime implicant is
a product term obtained by combining the maximum possible number of adjacent squares in the map
Sum-of-Products Simplification
Product-of-Sums Simplification
Product-of-Sums Simplification
Product-of-Sums Simplification
Product-of-Sums Simplification
F F
Don’t Care Conditions
Don’t Care Conditions
Don’t Care Conditions
NAND and NOR
NAND and NOR
NAND and NOR
NAND and NOR
Convert to NAND-NOR
Convert to NAND-NOR
F
Convert to NAND-NOR
Convert to NAND-NOR
F
Example
Example
Example● Implement
Example
Multilevel Nand Circuits
Multilevel Nand Circuits
NOR Implementation
NOR Implementation
NOR Implementation
NOR Implementation
NOR Implementation
NOR Implementation
F
Implement● AND-NOR, OR-NAND, NAND-
AND, NOR-OR
F=∑ (0,6)
Implement● AND-NOR, OR-NAND, NAND-
AND, NOR-OR
Implement
Implement
Implement
Exclusive OR (XOR)
XOR
XOR
XOR with AND–OR–NOT
XOR with AND–OR–NOT
XOR with NAND gates
XOR with NAND gates
XOR
XOR
Odd Function● Function to flag odd number of 1s
in a sequence of bits
Odd Function
Odd Function
Even Function
Even Function
Even Function
Parity Generation & Checking
● Error detection and correction codes
●
Parity Generation & Checking
● Error detection and correction codes
● Parity bit detects errors during the transmission of binary information
Parity Generation & Checking
● Error detection and correction codes
● Parity bit detects errors during the transmission of binary information
● Parity bit: Records if the total number of 1s are odd or even
Parity Generation & Checking● Error detection and correction codes● Parity bit detects errors during the transmission of
binary information● Parity bit: Records if the total number of 1s are odd or
even● Parity generator: Circuit that generates the parity bit
in the transmitter● Parity checker: circuit that checks the parity in the
receiver
Even-Parity-Generator
Even-Parity-Generator
3-bit Even-Parity Generator
Even-Parity-Checker
Even-Parity-Checker
4-bit even Parity Checker
Summary● K-Map Method● Product-of-Sums Simplification● Don’t Care Conditions● NAND and NOR● Exclusive OR (XOR)● Parity Generation & Checking
Extra
XOR
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