rad-hard active pixel sensors for hl-lhc detector upgrades based on hv-cmos marlon barbero –...

Rad-Hard Active Pixel Sensors for HL-LHC Detector Upgrades

based on HV-CMOS

Marlon Barbero – Centre de Physique des Particules de Marseille

barbero@cppm.in2p3.fr13th Topical Seminar on Innovative Particle and Radiation Detectors

7 - 10 October 2013, Siena, Italy

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 2

ATLAS tracker upgrade plan

New insertable b-layer (IBL)

New Al beam pipe New pixel services

Fast TracKing (FTK) for level2 trigger

All new tracker (baseline: long strips /short strips / pixels) Possible level1 tracker

New insertable b-layer (IBL)

New Al beam pipe New pixel services

IBL: On-going construction phase!

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 3

HL-LHC environment challenge

• HL-LHC targets: – 14TeV; Luminosity: 5.1034 cm-2.s-1 / 3000 fb-1 in ~7

years

• Consequences for trackers:– High radiation for the innermost layers (~5cm):

• ~1.1016 neq.cm-2 / ~1GRad rad-hardness!(note: ~50-100MRad at 25cm)

– High occupancy:• cope with of order <140> pile-up events / bunch-

crossing high granularity! fast!

– Huge surface to cover:• of order 200m2 reduction in costs!

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 4

Using Hybrid Detectors

• Hybrid detectors:– n-in-n or n-in-p with reduced drift distance (3D or

thin silicon).– DSM rad-hard IC (a la IBL FE-I4 -130nm- or reduced

feature size 65nm?).– Valid option: should work (after development).– Drawback: 1- Price of hybridization / of non-standard

sensors (yield?) and for a large area. 2- Will stay rather thick.

3- High bias voltage. 4- Deep charge collection leads to difficult

2-track separation in boosted jets.

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 5

Principle of HV-CMOS process

• An n-well in p-substrate diode, populated with CMOS (first stage amplifier or more complex).

n-well in p-substrate diode

n-well biasing

CMOS! e.g. 1st stage amplifier

depletion zone around nwell: charge collected by drift

resist~10Ω.cm

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 6

ATLAS HV-CMOS Collaboration

• Bonn University: M. Backhaus, L.Gonella, T. Hemperek, F. Hügging, H. Krüger, T. Obermann, N. Wermes.

• CERN: M. Capeans, S. Feigl, M. Nessi, H. Pernegger, B. Ristic.• CPPM: M. Barbero, F. Bompard, P. Breugnon, JC. Clemens, D.

Fougeron, J. Liu, P.Pangaud, A. Rozanov.• Geneva University: D. Ferrere, S. Gonzalez-Sevilla, G. Iacobucci,

A. Miucci, D. Muenstermann.• Goettingen University: M. George, J. Grosse-Knetter, A. Quadt,

J. Rieger, J. Weingarten.• Glasgow University: R. Bates, A. Blue, C. Butter, D. Hynds.• Heidelberg University: I. Peric (original idea).• LBNL: M. Garcia-Sciveres.

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 7

Process Main Characteristics

• CMOS electronics inside deep n-well.• Negatively biased substrate leads to ~8-10μm depletion zone

charge collection by drift.• Small feature size + relatively low complexity of in-pixel logic small

pixel.• 1st stage signal amplification on-sensor (low capacitance low

noise).• Featuring: 1- electronics rad-hard (DSM technology).

2- sensor rad-hard (small depletion depth, small ΔNeff).3- low price (standard CMOS process).4- low material budget (can be thinned down).5- low maximum bias voltage (moderate substrate resistivity).6- fast (electronics on sensor).7- good granularity (1st prototype 33×125μm2, can go down).

• HV2FEI4p1/-p2 in AMS180nm HV-CMOS.

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 8

HV2FEI4 series• -p1: Proof of principle.• -p2: Rad-hardness enhanced.• 2.2×4.4 mm2.• 60columns×24rows.• pixels: 33×125μm2.• pads to realize various operation modes:

– Standalone measurement possible.– CCPD: Capacitively coupled to pixel IC.– Bonded to strip readout IC.

pixel array w. transmission pads

strip pads

IO for CCPD

IO for strips

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 9

Readout -a la strips-• Readout: use HV-CMOS sensor in

combination with existing powerful IC by connecting HV-CMOS pixels in various ways.

• e.g. pixels can be summed up as “virtual strips”, with hit position encoded as pulse height.

Pixel hit map from strip information (note the shadow of a wire)

0,0 0,5 1,0 1,5 2,0-20

0

20

40

60

80

100

120

140

160

180

Co

un

ts

Measured analog address [V]

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 10

Readout -with larger pixels-• Combine 3 pixels together to fit one FE-I4 pixel (50×250μm2),

with HVCMOS pixels encoded by pulse height.

• Capacitive coupling OK: gluing!(perspective to avoid bump-bonding?)

The tiny HV2FEI4p1 prototype glued on the large FE-I4

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 11

HV2FEI4p1 on FEI4

• 90Sr-source.• Readout through FE-I4.• kHz rate recorded!

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 12

Sub-pixel encoding principle

• Works on single pixel cells.• Sub-addresses well separated in ToT histo.

Three values for the addresses decoded by the FE-I4 pixel

unirradiated sensor

Sub-pixel 1

Sub-pixel 2

Sub-pixel 3

3 sub-pixels on

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 13

HV2FEI4p1• Recorded routinely 90Sr and

55Fe spectra.

• Degradation at 80MRad proton irradiation (dead at 200MRad!)

Discri

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 14

occupancy in 10 minutes

Bulk damage• Small depletion depth + Neff > 1014.cm-3 bulk rad-

hard?• Non-ionizing radiation at neutron source (Ljubljana)

to 1.1016 neq.cm-2.

leakage current increase(as expected)

sensor works at room T after 1016 neq.cm-2. (scintillator trigger used)

Note: 30 days annealing at room temp

No source

With 90Sr

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 15

TID issue HV2FEI4p2• Few pixel flavors with enhanced rad-hardness: guard

rings, circular transistors… (different pixel types lead to different gains -expected-).

“rad-hard” “normal”

55Fe spectra, unirradiated

different gains

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 16

TID issue HV2FEI4p2• After 862 MRad Xray (annealing included 2h at 70C

each 100MRad), after parameter retuning, amplifier gain loss recovered to 90% of initial value

Recovery at 862 MRad (NOT 900MRad)

Relative preampli amplitude variation as function of dose

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 17

Conclusion

• Principle: Firmly established. Various types of readout demonstrated, among which capacitive coupling through gluing to FE-I4.

• Prospects for: Small pixels, less material, cheaper, large area…

• Need further studies on radiation hardness, but positive indications of radiation tolerance.

• Need efficiency / spatial resolution studies test beam.

• Need optimization to establish geometry & architecture.

• Discussion on new larger size prototype to realize currently on-going.

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 18

Outlook• Hybrid solution vs monolithic for future trackers?

65nm vs HVCMOS?• For the monolithic case, our collaboration has

started to look into other processes:

T3-MAPS (LBNL)IBM 130nm

1640 electrons (assuming collected by one pixel)

DMAPS (Bonn)ESPROS 150nm

GFMAPS (CPPM)GF 130nm

M5M4M3M2M1

Super Contact

M1M2M3M4M5

M6

Super Contact

Bond Interface

Tie

r 2

Tie

r 1

(th

inn

ed

w

afe

r)

Back Side Metal

sensor

M6

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 19

BACKUP

• BACKUP

New monolithic sensors on a fully isolated substrate

20

Sr90 spectrum @ Vsub=0V (blue)And Vsub=-10V (red)

We have exploited a new CMOS substrate isolation implant to implement a monolithic radiation detector. Because the substrate is completely junction-isolated from the active wells, it can be biased at larger negative voltages than would be possible in a standard process. This not only permits true 100% fill factor but also improves the sensor performance. Preliminary results will be shown.

Spectrum of Fe55 (X-ray) and Sr90 (e-), obtained from a 10X10 single pixel.

Marlon Barbero, IPRD13, Oct 7th-10th 2013, Siena 21

Outlook another 3D approach

• We submitted on June 2013 a new HV2FEI4 version in GlobalFoundries 0.13µm BCDLite technology. The chip is 100% compatible with the HV2FEI4 chip, and could be easily tested. Despite some small failures, the chip works at -30V

• The HV2FEI4 could be use on a complex and advanced monolithic 3D chip, including analog sensor and digital post-processing parts

M5M4M3M2M1

Super Contact

M1M2M3M4M5

M6

Super Contact

Bond Interface

Tie

r 2

Tie

r 1

(th

inn

ed

w

afer

)

Back Side Metal

sensor

M6

17th September 2013, Future Pixel FE meeting 22

EPCB01 – Depleted monolithic pixel chip EPCB01 – Depleted monolithic pixel chip Features: Technology: ESPROS

Feature size: CMOS 150 nm

High resistive N-type bulk (~ 2 kΩ cm)

High voltage at sensor domain possible (~ 10 V)

P-type well to integrate CMOS electronics

6 metal layers

Chip is thinned down to 50 µm

New Physicist’s dream??

Full depletion can be achieved

17th September 2013, Future Pixel FE meeting 23

Source scan

Fe55Fe55

Fe55 used for calibration of Sr90 plot

Sr90 MPV ~2400 electrons

(~ 4200 electrons expected for

~ 50 µm silicon)

→ rest of the charge is collected by

other pixels (clustering)