Analog VLSI Design of an Adaptive NeuromorphicChip for Olfactory Systems

Thomas J. Koickal and Alister Hamilton Tim C. Pearce Su L. Tan, James A. CovingtonInst. for Integrated Micro and Nano Systems Department of Engineering and Julian W. Gardner

University of Edinburgh, EH9 3JL, U.K University of Leicester, LEI 7RH, U.K Sensors Research LaboratoryEmail: thomas.koickal@ee.ed.ac.uk Email: tcpl @leicester.ac.uk University of Warwick, CV4 7AL, U.K

Email: j .w.gardner@ warwick.ac.uk

Abstract-In this paper, we present the analog circuit design odour sensing system. This not only emulates the plasticityand implementation of an adaptive neuromorphic olfaction chip. function found in biological neural systems but also provides aAn analog VLSI device with on-chip chemosensor array, on-chip means to compensate for analog imperfections in the physicalsensor interface circuitry and on-chip learning neuromorphicolfactory model has been fabricated in a single chip using Austria ipematio andchanen tenvironmenteiwi theMicrosystems 0.6 ,um CMOS technology. Drawing inspiration operate. All the component subsystems implemented on thefrom biological olfactory systems, the neuromorphic analog neuromorphic olfaction chip have been successfully tested incircuits used to process signals from the on-chip odour sensors silicon.make use of temporal "spiking" signals to act as carriers of odourinformation. An on-chip spike time dependent learning circuit is II. DESCRIPTION OF ADAPTIVE NEUROMORPHIC MODELintegrated to dynamically adapt weights for odour detection andclassification. All the component subsystems implemented on chip A. Model Dynamicshave been successfully tested in silicon. A neuromorphic architecture with spike-time-dependent

I. INTRODUCTION learning (Fig. 1(a)) is used to model the olfactory pathway. Theneuromorphic network receives sensory signals from an array

A neuromorphic olfactory chip attempts to mimic the of chemosensors which transform the molecular chemicalpowerful odour recognition features demonstrated by a bio- information of an odorant into electrical signals suitable forlogical olfactory system [1]. Previous works reported on processing in analog circuitry. The chemosensor array consistsimplementing olfactory systems addressed: sensing [2], signal of different sensor types tuned to respond to different chemicalprocessing [3] and neuromorphic models [4], separately. Fur- compounds [2]. Such a heterogeneous array has the potentialthermore, implementations in digital hardware are inherently to increase the selectivity in the olfactory pattern recognitionpower hungry. An analog implementation of neuromorphic task while mimicking the function of the mammalian olfactoryolfactory circuits benefits from low power, low cost and area system. Because the signals from sensors of the same typeefficient hardware realisations. are fed forward through neural elements to one and only

The neural circuits at the input stage of a mammalian ol- one principal neuron, the network forms a distinct modularfactory system produce all-or-none action potentials or spikes structure, reminiscent of the glomerular organisation of theoccurring as temporal patterns [5]. In addition to the mounting mammalian olfactory bulb model [5].biological evidence [6], it has been shown theoretically that The soma of each neuron element is modelled as a leakytemporal coding using individual spike times can produce integrate and fire (IF) unit. Below a threshold Vth the dynamicspowerful information processing systems [7]. Furthermore, of the membrane potential Vm(t) of the IF neuron is definedrecent experiment studies have shown that precise timing of byspikes generated by neurons can be critical for the directionand magnitude of synaptic weight changes; a phenomenon dVm (t) IVm - Vrest 1(t)now termed as spike-time-dependent plasticity (STDP) [6]. dt R?nCm

+ (t)Spike time dependent learning rules can be used to learn dt RmCm Cmtemporal delays with high precision and have been used to where t is time, Rm and Cm are respectively, the membranemodel auditory processing in the barn-owl [8] and to model resistance and capacitance, and I(t) is the total input currentvision systems [9]. to the neuron. Vrest is the membrane resting potential. If

In this paper, we present the analog VLSI design and the potential Vm (t) reaches the threshold value Vth it isimplementation of an adaptive neuromorphic olfaction chip. immediately reset to the after hyperpolarization value VahpThe neuromorphic analog circuits implemented on chip make and a spike is produced as output of the neuron.use of temporal spiking signals to act as carriers of odour When a spike reaches a synapse, it induces a dendriticinformation. An on-chip spike-time-dependent learning circuit current that is fed into the post-synaptic neuron which decaysis integrated for dynamic weight adaptation. Implementation exponentially with a characteristic time-constant, starting fromof on-chip learning is crucial for the design of an integrated a peak value determined by the synaptic weight. The sign

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Fig. 1. (a) Neuromorphic architecture of olfactory pathway withSTDP learning. (b) STDP learning window function. synaptic potentiation for negative At and a negative phase

of synaptic depression for positive At. The dynamics of thepositive phase are generated by the arrival of an input spike

of the current is formally included into the synaptic weight, at the synapse. The positive phase exhibits an exponentialpositive or negative according to whether the interaction is response with an initial amplitude of A+ and decays to itsrespectively, excitatory or inhibitory. If t = 0 is the instant resting level Arest+. However, the dynamics of the negativein which the spike from a presynaptic neuron A reaches the phase are generated by the arrival of the postsynaptic neuronsynapse of A onto postsynaptic neuron B, the current evoked spike. This negative phase exhibits an exponential responseonto B by this single event is given by with an initial amplitude of negative A_ decaying to its resting

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iBA(t) = 8(t)WBAeXp d (2) III. NEUROMORPHIC CIRCUIT IMPLEMENTATION

where 9(t) is the Heaviside function and Td is a synaptic A. Synapse Circuittime constant. The total current induced by several presynaptic The synaptic circuit is shown in Fig. 2. The circuit consistsspikes by neuron A onto postsynaptic neuron B is given by of a weight dynamics block and a synapse dynamics block.

The input to the synapse is a presynaptic spike which triggersthe injection of an incremental charging/discharging weight

IBA(t)Z= w1'iBA(t - tn) (3) current into the synaptic capacitor Csyn. The incrementaln charging/discharging current is proportional to the capacitor

where n indexes the spikes that are emitted by neuron A weight voltage Vwt. The transistors Ml 6-M24 form a balancedand reach the synapse at times tn. If a neuron receives the Operational Transconductance Amplifier (OTA). As the outputoutputs of several synapses, the respective contributions to the of the OTA is fed back to the inverting input, output current istotal post-synaptic current sum linearly. The total post-synaptic proportional to the voltage difference between the output andcurrent constitutes the term 1(t) in Eq. 1, from which the the input thereby acting as a resistor. The synaptic responsemembrane potential of the respective neuron is derived. is an exponentially decaying current and the output currents

B. Weight Adaptation from various synapses are summed at the neuronal input.The design of analog circuits with large time constants is

In the neuromorphic model implemented, the network learns critical for the implementation of a neuromorphic olfactionodorant features by modifying weights of the synapses accord- chip. This is because the chemical sensors have large timeing to a temporally asymmetric STDP rule [6]. The STDP, constants, typically in the order of 100 ms or more [2], whichobserved in biology, exhibits two characteristic properties. trnslats in tie onstant ms fore neuronFisthe retmprll symerc.Scod patiiy e

translates into large time constant requirements for the neuronFirst, they are temporally asymmetric. Second, plasticity de- and synapse models. In the design implemented on chip, largepends on timing of the spike within a learning time window, time constants are achieved by reducing the transconductanceA biologically observed learning window function for spike- of the OTA stage thereby alleviating the need for implementingtime-dependent plasticity is shown in Fig. (b). The learning large area capacitors [10]. The transconductance reduction inwindow function for weight adaptation is defined as follows, the OTA stage is achieved by using large current mirror ratios.

Noting the transconductance of an OTA is proportional to theT A+exp( ( t) ) + Arest+ if At > 0 ratio of the size of the output current mirrors (M22/M24) a

W(/\t) = l A ex((Af)) -Art if At <0O (4) multiplication of time constant by this ratio can be obtained.I '~~~t1n- The advantage of this approach is that subthreshold currents

where A\t = -pS-tpre, is the time delay between exist in the output stage transistors (M21, M22) while allpostsynaptic neuron firing tpoct and presynaptic firing tpre. other transistors of the synapse dynamics circuit operate inThe learning window has two phases: a positive phase of the strong inversion region. The offset voltage of this OTA

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resistor is thus primarily determined by the leakage currents is implemented using an OTA-C circuit. Transistors M1-M7in the output node. The larger biasing currents in the OTA form an OTA and Cit is the integrating capacitor. A twoinput transistors result in a larger linear range with reduced stage comparator circuit compares the output of the leakyoffset mismatching in layout. A programmable time constant integrator against a threshold Vth. The control signals Vresetcan be achieved by using different dimension ratios at the and Vrefrt are the outputs of the reset timer and refractoryoutput current mirror branch. period timer circuits respectively which are both implemented

using comparators and OTA-C delay circuits (not shown).B. On-chip STDP Learning Circuit Initially the Vreset and Vrefrt signals are at a low state. The

In STDP learning, the relative time interval between the comparator output Vspike goes high when the leaky integratorpostsynaptic neuron firing and the presynaptic spike occur- response is above a threshold Vth. The leading edge of therence determines the weight change at the capacitor Cwt. Each neuron spike activates the reset and refractory period timerssynapse has an STDP based on-chip learning circuit associated circuits. The reset timer output Vreset goes high after a finitewith the weight storage capacitor. The component Cwt in Fig. time interval which in turn resets the integrating capacitor Cit2 is the same as the component Cwt in Fig. 3. causing the neuron output to go low. The trailing edge ofThe circuit uses two identical circuit blocks to define the Vspike triggers the refractory timer Vrefrt to a high state. The

negative phase and the positive phase of the learning window control signal Vrefrt switches the comparator threshold Vthfunction. The weight adaption during the negative phase of to a large voltage Vbrefrt thereby inhibiting the neuron fromthe learning window function operates as follows. A presyn- firing. However, the leaky integrator continues to integrateaptic spike occurrence turns transistor M3 ON charging the during the refractory period. The time delay of the reset timercapacitor C1 to V+. The trailing edge of the presynaptic spike and refractory period circuit timer determines the pulse widthswitches the transistor M3 OFF and the voltage at the capacitor of the neuron spike and the refractory period, respectively.Ci decays exponentially to a resting potential defined by IV CHIP RESULTSVbias. On the arrival of a postsynaptic spike, the transistorM1 is switched ON and the weight voltage at the capacitor The architecture of the fabricated chip implements a sliceCwt is incremented by an amount proportional to the voltage of the network in Fig. 1(a) such that a scalable olfactoryat capacitor Ci at that instant. Similarly, during the positive system can be constructed by interconnecting multiple chips.phase, a postsynaptic spike triggers an exponential response at The chemosensors in the chip are separated by a distance ofcapacitor Cwt and a following presynaptic spike decrements 1.2 mm. Each sensor cell has an associated sensor interfacethe weight at Cwt. The weight voltage at Cwt is strengthened, circuit for DC cancellation, amplification and filtering. Theif the presynaptic spike precedes the postsynaptic arrival and outputs of sensor interface circuits feed to the inputs of theweakened if the presynaptic spike follows the postsynaptic neuromorphic circuits. The die area of the chip is 50 mm2 withoccurrence. a core circuit area of 6.5 mm2, i.e. the chip is pad limited.The STDP learning we have implemented is a dynamic The working of the chemosensor array and its interface

learning mechanism and weight voltages stored on Cwt will circuitry had been previously implemented and tested ondecay if not refreshed. Long term weight storage can be a separate chip prior to integrating in this chip [12]. Theperformed by storing the weight voltage stored on Cwt in chemosensors are coated with five different carbon blacka non-volatile memory. The on-chip neuromorphic circuits polymers [2]. Fig. 5(a) shows the response characteristics ofare implemented in full analog unlike the previously reported the chemosensors to ethanol vapour in air when tested at a flowimplementations [11] that included digital circuits. rate of 25 mI/min and pulse width of 5 s at room temperature

C. NeuronCircuit ~~~~~~(25 °C i 2 °C, 40 % ±5 % R.H.). The response magnitudes* ~~~~~~~~~~~~~~~~andprofiles are distinct to different sensor types in the array.

A circuit schematic of the integrate and fire neuron is Transient sensor information is extracted at the neuromorphicshown in Fig. 4. The leaky integrator dynamics (Eq. (1)) circuit stage to aid the discrimination and classification of the

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Fig. 5. Measured Chip Results: (a) Sensor response characteristics to ethanol vapour in air. (b) Weight strengthening during on-chip STDPlearning. (c) Weight weakening during on-chip STDP learning. (d) Network response showing the dynamics of the receptor neuron, synapseand principal neuron.

input odour. system.The performance of the on-chip adaptive neuromorphic ACKNOWLEDGEMENT

circuits are evaluated in silicon. The spike-time-dependentlearning circuit implemented on chip is tested under different The authors would like to thank Engineering and Physicalpresynaptic and postsynaptic input spike conditions. Fig. 5(b) Sciences Research Council (EPSRC), for supporting this workshows the measured on-chip learning response when excited under Grants to University of Edinburgh (GR/R37982/0 1),by a presynaptic spike preceding the occurrence of a post University of Warwick (GR1R37975/01) and University ofsynaptic spike by 5 ms. Initially, the synaptic weight is neg- Leicester (GR1R37968101).ative causing the synapse to generate an inhibitory response. REFERENCESAs the presynaptic spikes arrive prior to the occurrence of [1] T. C. Pearce, S. S. Schiffman, H. T. Nagle, and J. W. Gardner, Handbookpostsynaptic spikes, the weights are strengthened and the of Machine Olfaction, Wiley-VCH, 2003.synaptic response becomes excitatory as shown in Fig. 5(b). [2] JA. Covington, S.L. Tan, J.W. Gardner, A. Hamilton, T.J. Koickal, and

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[12] T. J. Koickal, A. Hamilton, S. L. Tan, J. A. Covington, J. W. Gardner,technology. All the component subsystems implemented on and T. C. Pearce, "Smart interface circuit to ameliorate loss of measure-chip have been successfully tested in silicon. The next step is ment range in chemical microsensor arrays," IEEE Instrumentation andto integrate and test the prototype chip with an odour delivery Measurement Conference, Ottawa, Canada, 2005.

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