approaches for the testing of large- area electronic devices … · 2017. 12. 1. · approaches for...

Approaches for the Testing of Large-

Area Electronic Devices Manufactured

at High Speed and Low Cost A. J. Flewitt *, A. Kumar, Q. Xu, K. M. Niang & L. G. Occhipinti

Electrical Engineering Division, Engineering Department,

Cambridge University, CB3 0FA

* E-mail: [email protected]

© 2015 EPSRC Centre for Innovative Manufacturing in Large-Area Electronics

Partner institutions: University of Cambridge, Imperial College London, The University of Manchester, Swansea University 2

• Introduction

• Why is testing ‘Printed Electronics’ different to silicon?

• General approaches to testing

• Categorising testing methodologies

• Simultaneous Multiple Device Testing (SMUDT) Concept

• Specific examples of testing

• AUTOFLEX: Testing of logic devices

• Testing of rf antennae

• Conclusions

Outline

2



High-Speed Testing: the challenge

• The inorganic LAE industry has found is necessary to use in-line test

and repair for products such as displays

• This will also be necessary for next generation organic and hybrid LAE

utilising web-based deposition and patterning

• Printing can achieve very high levels of production

• ~100 devices s–1

• ~1 m2 s–1

• Cost of manufacture is very low

• Testing (possibly coupled with

repair) should be reducing

overall production costs

From Bao, G., Proceedings International Test

Conference, 2003, 512



High-Speed Testing: test points in production



Approach Contact Non-contact

Electrical Electrical Optical Hybrid

Methodology

Physical probe

contacts onto a

surface under test to

perform a test (IV, CV,

open circuit voltage,

output characteristic,

etc.)

Inductive coupling of

power into a circuit

with measurement of

the surface electric

field that results.

Interferometry,

ellipsometry,

spectroscopy or

imaging with pattern

recognition of a

surface

Inductive coupling

powers up a test circuit

with an optical output

indicating operation

(e.g. OLED)

Advantages

Direct electrical

measurement of

performance

Simplicity of test

system

No physical

contact allows

higher testing

speeds

No physical

contact allows

higher testing

speeds

Generally

established

technologies

Possibility of

providing power

optically

No physical

contact allows

higher testing

speeds

Disadvantages

Physical contact

limits speed

Simultaneous

measurement of

blocks of devices

required

Physical damage

Electrical device

performance has

to be inferred

Additional space

requirement for

antennae

No information on

electrical device

performance

More suited to

process validation

testing

Increased

complexity of the

sub-system

reduces yield

Testing relies on

much high yield

of measurement

circuitry c.f.

system circuitry

High-Speed Testing: the approach



State-of-the-Art: Display Backplane Testing

Capable of 300 devices s–1 [target = 100 devices s–1]

Capable of 0.01 m2 s–1 [target = 1 m2 s–1]

6



Simultaneous Multiple Device Testing (SMUDT)

• Do not attempt to measure everything individually

• Measure groups of units simultaneously using a small number of

contact/non-contact points to determine if any of the units have failed

• EITHER throw away an entire block if there is a failed device

• OR only then carry out single unit testing to identify the failed block

• Use low production cost to add test circuitry that will be disabled by

singulation

• Fast with few contact points and no sweeps

• Examples

• Ring oscillator test of logic gates

• Reverse bias capacitance-voltage test of solar cells in parallel

• Open circuit voltage test of batteries in parallel

• ‘Checksum’ logic test of multiple microprocessors

7



• Basic logic systems are based on NOT, NAND and NOR gates

• TI’s ‘7400-series’ CMOS logic was a great enabler

• How would we go about testing similar printed logic components?

• NOT, NAND and NOR can all be made into ring oscillators (ROs)

• Testing one RO effectively tests all component devices at once

Example 1 AUTOFLEX: Testing of ‘7400’ Logic



Connection of Logic with Additional Circuitry

VCC VCC

GND GND



Removal of Additional Circuitry upon Singulation

VCC VCC

GND GND



Validating RO-SMUDT: Simulation

MOSFET circuit model

Device parameters Parameter extracted

from TFT devices



SPICE simulation of RO

Vamp f

• ROs simulated using the circuit model

• Output is sensitive to changes in a

single TFT within the RO (e.g. channel

length)



Virtual CMOS NOT Gates under Test

• n-type TFTs connected to form virtual CMOS.

• NOT, NAND, NOR as building block of electronic applications.

NOT

Virtual CMOS from n-type TFTs



Characterization of Ring Oscillator

• Frequency shows a inverse power law relation with the number of stages (f=1/N.τ)

• Voltage amplitude peaks ~9 stages.



1. During developmental phase - • a binary pass-fail criteria,

irrespective of the value of amplitude and frequency of the oscillation.

2. During manufacturing stage - • target frequency and amplitude • Figure of Merit (MRO) to bin ROs

𝑀𝑅𝑂 = (𝑓 × 𝑉𝑎𝑚𝑝)/ PRO

𝑃𝑅𝑂 = 𝑉𝐷𝐷 × 𝐼

Evaluation of Test Results



Cost of Testing

Cost of testing should be minimum. Ideally < 5% of the cost of IC

Printed ICs are targeted for low cost devices, tentatively < 10p

RO Testing Conventional Testing

With a given test scenario of:

• RO testing of 9 stage invertor +1 buffer invertor

• 100% test sampling

• Loading/unloading time 15s

• probe-card with 15 blocks

• Number of test equipment needed to test 250,000 ICs/hour: 4

With a given test scenario of:

• Conventional testing of all invertor

• 100% test sampling

• Loading/unloading time 15s

• probe-card with 15 blocks

• Number of test equipment needed to test 250,000 ICs/hour: 31

With usual assumptions of test equipment, operation time and cost, the cost of testing could approximately be: 0.09 pence/fabricated IC



• Printed antennae are needed for rfID applications

• Antennae must operate at 13.56 MHz

• Printing leads to some variation in resonant frequency

• Correction of resonant frequency is required

• Need to measure the resonant frequency of each device

• Non-contact test is preferable to increase test speed and utilise

antenna

Example 2: Testing of rf Antennae



Non-contact Test Based on ISO Standard

International Standard ISO/IEC 10373-6:

Identification cards – Test methods –

Part 6: proximity cards

Test PCD assembly

1) Test PCD antenna

2) DUT

3) Sense coil a/b

4) Calibration coil

• Measurements made at several

‘spot’ frequencies to allow estimate

of resonant frequency

• Possible future SMUDT approach



• Low cost printing of large-area electronics at high speed introduces

new test challenges (particularly area s–1)

• Key test point is of sub-system components prior to integration

• Electrical testing is generally the ‘gold standard’

• The Simultaneous Multiple Device Test (SMUDT) approach is based

upon a pass/fail of blocks of devices

• SMUDT allows an order of magnitude improvement in test speed/cost

• Contact-based Ring Oscillator test of a logic device is an example of this

• Some degree of ‘binning’ and additional information also possible

• Antenna testing is an example of a contactless measurement

• We are looking to validate and revise our approach based on use

cases – please tell us your test challenges!

Conclusions



Acknowledgements

Electronic Device and Materials Group: Dr Abhishek Kumar Dr Kham Nang Qichen Xu

Automated Integration of Flexible Electronics: AUTOFLEX - EP/L505201/1 PragmatIC, Centre of Process Innovation-UK, OpTek Systems, Henkel

EPSRC Centre of Innovative Manufacturing in Large-Area Electronics: CIMLAE - EP/K03099X/1 Dr Luigi Occhipinti

PragmatIC Printing Ltd.: Dr Richard Price Dr Catherine Ramsdale James Wiltshire

approaches for the testing of large- area electronic devices … · 2017. 12. 1. · approaches for...

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