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Arithmetic circuits Binary addition Binary Subtraction Unsigned binary numbers Sign-magnitude numbers 2’S Complement representation 2’S Complement arithmetic Arithmetic building blocks

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Page 1: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Arithmetic circuits

Binary addition Binary Subtraction Unsigned binary numbers Sign-magnitude numbers 2’S Complement

representation 2’S Complement arithmetic Arithmetic building blocks

Page 2: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’
Page 3: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Number Systems (1) Positional Notation

N = (an-1an-2 ... a1a0 . a-1a-2 ... a-m)r (1.1)

where . = radix point r = radix or base n = number of integer digits to the left of the radix point m = number of fractional digits to the right of the radix point an-1 = most significant digit (MSD)

a-m = least significant digit (LSD)

Polynomial Notation (Series Representation)N = an-1 x rn-1 + an-2 x rn-2 + ... + a0 x r0 + a-1 x r-1 ... + a-m x r-m

= (1.2)

N = (251.41)10 = 2 x 102 + 5 x 101 + 1 x 100 + 4 x 10-1 + 1 x 10-2a rii

i m

n

1

Page 4: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Number Systems (2)

Binary numbers Digits = {0, 1} (11010.11)2 = 1 x 24 + 1 x 23 + 0 x 22 + 1 x 21 + 0 x 20 + 1 x 2-1 + 1 x 2-2

= (26.75)10

1 K (kilo) = 210 = 1,024, 1M (mega) = 220 = 1,048,576,

1G (giga) = 230 = 1,073,741,824

Octal numbers Digits = {0, 1, 2, 3, 4, 5, 6, 7} (127.4)8 = 1 x 82 + 2 x 81 + 7 x 80 + 4 x 8-1 = (87.5)10

Hexadecimal numbers Digits = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F} (B65F)16 = 11 x 163 + 6 x 162 + 5 x 161 + 15 x 160 = (46,687)10

Page 5: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Number Systems (3) Important Number Systems (Table 1.1)

Decimal Binary Octal Hexadecimal0 0 0 01 1 1 12 10 2 23 11 3 3

100 4 45 101 5 56 110 6 67 111 7 78 1000 10 89 1001 11 9

10 1010 12 A11 1011 13 B12 1100 14 C13 1101 15 D14 1110 16 E15 1111 1 F16 10000 20 10

Page 6: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Powers of 2Powers of 2

20 21

22

23

24

25

26

27 28 29 210 211 212 213 214 215

216

Decimal Equivalent1 248

163264

128 256512

1,024 2,048 4,096 8,192 16,38432,76865,536

Abbreviation

1K 2K 4K8K

16K32K64K

Page 7: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Decimal-Binary EquivalencesDecimal

1 37

153163

127 255 511

1,0232,047 4,095 8,191 16,38332,76765,535

Binary1

11 111

11111 1111

11 1111 111 1111

1111 1111 1 1111 1111

11 1111 1111 111 1111 1111

1111 1111 1111 1 1111 1111 1111

11 1111 1111 1111

111 1111 1111 1111

1111 1111 1111 1111

Hexadecimal

137F

1F3F7FFF

1FF3FF7FFFFF

1FFF3FFF7FFFFFFF

Page 8: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’
Page 9: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Base Conversion (1)

Series Substitution Method Expanded form of polynomial representation:

N = an-1rn-1 + … + a0r0 + a-1r-1 + … + a-mr-m (1.3) Conversation Procedure (base A to base B)

Represent the number in base A in the format of Eq. 1.3. Evaluate the series using base B arithmetic.

Examples: (11010)2 ( ? )10

N = 10

= (16)10 + (8)10 + 0 + (2)10 + 0

= (26)10 (627)8 ( ? )10

N = 6

= (384)10 + (16)10 + (7)10

= (407)10

Page 10: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Base Conversion (2) Radix Divide Method

Used to convert the integer in base A to the equivalent base B integer.

Underlying theory: (NI)A = bn-1Bn-1 + … + b0B0 (1.4)

Here, bi’s represents the digits of (NI)B in base A.

NI bn-1Bn-1 + … + b1B1 + b0B0 ) / B

= (Quotient Q1: bn-1Bn-2 + … + b1B0 ) + (Remainder R0: b0)

In general, (bi)A is the remainder Ri when Qi is divided by (B)A.

Conversion Procedure1. Divide (NI)B by (B)A, producing Q1 and R0. R0 is the least

significant digit, d0, of the result.

2. Compute di, for i = 1 … n - 1, by dividing Qi by (B)A, producing Qi+1 and Ri, which represents di.

3. Stop when Qi+1 = 0.

Page 11: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Base Conversion (3)

Examples (315)10 = (473)8

(315)10 = (13B)16

3158398480

374

LSD

MSD

3151619161160

B31

LSD

MSD

Page 12: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Base Conversion (4) Radix Multiply Method

Used to convert fractions. Underlying theory:

(NF)A = b-1B-1 + b-2B-2 + … + b-mB-m (1.5)

Here, (NF)A is a fraction in base A and bi’s are the digits of (NF)B in base A. B NF = B (b-1B-1 + b-2B-2 + … + b-mB-m )

= (Integer I-1: b-1) + (Fraction F-2: b-2B-1 + … + b-mB-(m-1)) In general, (bi)A is the integer part I-i, of the product of F-(i+1) (BA).

Conversion Procedure 1. Let F-1 = (NF)A.

2. Compute digits (b-i)A, for i = 1 … m, by multiplying Fi by (B)A,

producing integer I-i, which represents (b-i)A, and fraction F-(i+1).

3. Convert each digits (b-i)A to base B.

Page 13: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Base Conversion (5) Examples

(0.479)10 = (0.3651…)8

MSD 3.832 0.479 8 6.656 0.832 8 5.248 0.656 8 LSD 1.984 0.248 8 …

(0.479)10 = (0.0111…)2

MSD 0.9580 0.479 2 1.9160 0.9580 2 1.8320 0.9160 2 LSD 1.6640 0.8320 2 …

Page 14: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Base Conversion (6) General Conversion Algorithm Algorithm 1.1 To convert a number N from base A to base B, use (a) the series substitution method with base B arithmetic, or (b) the radix divide or multiply method with base A arithmetic.

Algorithm 1.2 To convert a number N from base A to base B, use (a) the series substitution method with base 10 arithmetic to

convert N from base A to base 10, and (b) the radix divide or multiply method with decimal arithmetic to

convert N from base 10 to base B.

Algorithm 1.2 is longer, but easier and less error prone.

Page 15: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Base Conversion (7) Example

(18.6)9 = ( ? )11

(a) Convert to base 10 using series substitution method:

N10 = 1 91 + 8 90 + 6 9-1

= 9 + 8 + 0.666… = (17.666…)10

(b) Convert from base 10 to base 11 using radix divide and multiply method:

7.326 0.666 11 3.586 0.326 11 6.446 0.586 11

N11 = (16.736 …)11

17111110

61

.

Page 16: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Base Conversion (8) When B = Ak Algorithm 1.3

(a) To convert a number N from base A to base B when B = Ak and k is a positive integer, group the digits of N in groups of k digits in both directions from the radix point and then replace each group with the equivalent digit in base B(b) To convert a number N from base B to base A when B = Ak and k is a positive integer, replace each base B digit in N with the equivalent k digits in base A.

Examples (001 010 111. 100)2 = (127.4)8 (group bits by 3) (1011 0110 0101 1111)2 = (B65F)16 (group bits by 4)

Page 17: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Binary addition 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 10 = 0 + carry of 1 into next

position 1 + 1 + 1 = 11 = 1 + carry of 1 into next

position

A B SUM CO

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

HALF ADDER

A

B

SUM

CO

Carry-Out =

SUM =

Page 18: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Binary addition

Carry-Out =

SUM =

1-bit 8 Strings Full Adder with Carry-In and Carry-Out

CI A B SUM CO

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1

FULL ADDER

A

BSUM

COCI

Page 19: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

1-bit 8 Strings Full Adder with Carry-In and Carry-Out

Carry-Out =

SUM =

FULL ADDER

A

BSUM

COCI

Page 20: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Binary addition

Page 21: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Binary Subtraction0 - 0 = 01 - 0 = 11 - 1 = 00 - 1 = 1 ต้�องยื�มจากหลั กที่��สู�งกว่�า

มา 1

A B SUB BO

0 0 0 0

0 1 1 1

1 0 1 0

1 1 0 0

HALF Subtracto

r

A

B

SUB

BO

Borrow-Out =

SUB =

Page 22: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Binary Subtraction

Borrow-Out =

SUB =

1-bit 8 Strings Full Subtractor with Borrow-In and Borrow -Out

BI A B SUB BO

0 0 0 0 0

0 0 1 1 1

0 1 0 1 0

0 1 1 0 0

1 0 0 1 1

1 0 1 0 1

1 1 0 0 0

1 1 1 1 1

FULL Subtracto

r

A

BSUB

BOBI

Page 23: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

REPRESENTING REPRESENTING UNUNSIGNED NUMBERSSIGNED NUMBERS((Absolute valueAbsolute value))

0 0 0 0 0 0 0 0

A7 A6 A5 A4 A3 A2 A1 A0

=00H

1 1 1 1 1 1 1 1

B7 B6 B5 B4 B3 B2 B1 B0

=FFH

Page 24: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

REPRESENTING SIGNED NUMBERSREPRESENTING SIGNED NUMBERSin in sign-magnitudesign-magnitude form. form.

0 0 1 1 0 1 0 0

A7 A6 A5 A4 A3 A2 A1 A0

=+5210

SIGN BITMagnitude = 5210

1 0 1 1 0 1 0 0

B7 B6 B5 B4 B3 B2 B1 B0

=-5210

SIGN BITMagnitude =

5210

Page 25: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

REPRESENTING SIGNED NUMBERSREPRESENTING SIGNED NUMBERSin the in the 22’’ S-complement S-complement system. system.

0 0 1 0 1 1 0 1

A7 A6 A5 A4 A3 A2 A1 A0

=+4510

SIGN BITTrue binary

1 1 0 1 0 0 1 1

B7 B6 B5 B4 B3 B2 B1 B0

=-4510

SIGN BIT2’s complement

Page 26: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Range of Sign-Magnitude NumbersRange of Sign-Magnitude Numbers

0 0 0 0 0 0 0 1

A7 A6 A5 A4 A3 A2 A1 A0

=+110

SIGN BIT

0 1 1 1 1 1 1 1

B7 B6 B5 B4 B3 B2 B1 B0

=+1271

0

1 0 0 0 0 0 0 1

A7 A6 A5 A4 A3 A2 A1 A0

=-12710

1 1 1 1 1 1 1 1

B7 B6 B5 B4 B3 B2 B1 B0

=-110

Page 27: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Range of Sign-Magnitude NumbersRange of Sign-Magnitude Numbers

0 0 0 0 0 0 0 1

A7 A6 A5 A4 A3 A2 A1 A0

=+110

SIGN BIT

0 1 1 1 1 1 1 1

B7 B6 B5 B4 B3 B2 B1 B0

=+1271

0

1 0 0 0 0 0 0 1

A7 A6 A5 A4 A3 A2 A1 A0

=-12710

1 1 1 1 1 1 1 1

B7 B6 B5 B4 B3 B2 B1 B0

=-110

Page 28: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

การคอมพลีเมนต์ เลีขฐานการคอมพลีเมนต์ เลีขฐานสองสอง

แบ่�งออกเป็�น คอมพลั�เมนต้� 1 (1’s complement) คอมพลั�เมนต้� 2 (2’s complement) การคอมพลั�เมนต้�เลัขฐานสูองน�!น"าไป็ใช้�เก��ยืว่ก บ่

การค"านว่ณที่างไมโครคอมพ(ว่เต้อร�มาก เพราะว่�าจะใช้�ในลั กษณะการลับ่ด้�ว่ยืว่(ธี�การบ่ว่กด้�ว่ยืคอมพลั�เมนต้�

สร�ป การลับ่ด้�ว่ยืการบ่ว่กด้�ว่ยืคอมพลั�เมนต้�น !นจะที่"านองเด้�ยืว่ก บ่การคอมพลั�เมนต้�เลัขฐานสู(บ่

Page 29: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

การคอมพลีเมนต์ เลีขฐานการคอมพลีเมนต์ เลีขฐานสองสอง

X3X2X1X0 = 1000

1’s complement

X3X2X1X0 = 0111

2’s complement2’s complement = 1’s complement + 1

X3

X3

X2

X2

X1

X1

X0

X0

Page 30: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Positive and Negative NumbersPositive and Negative Numbers

-8 -7 -6 -5 -4 -3 -2 -1 0 +1 +2 +3 +4 +5 +6 +7

1000 1001 1010 1011 1100 1101 1110 1111 0000 0001 0010 0011 0100 0101 0110 0111

Magnitude Positive Negative

12345678

0001001000110100010101100111

-

11111110110111001011101010011000

Page 31: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

22’’ S-complement representation S-complement representation summarysummary

Positive numbers always have a sign bit of 0, and negative numbers always have a sign bit of 1.

Positive numbers are stored in sign-magnitude form.

Negative numbers are stored as 2’s complements. Taking the 2’s complement is equivalent to a sign

change.

Page 32: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

Example :

Binary contentsHexadecimal

contentsDecimal contents

0001 0100

____ ____

____ ____

____ ____

1001 1110

____ ____

____ ____

____ ____

___ ___ ___ ___

14H

DDH

___H

BDH

___H

70H

___H

6EH

_____H

+20

___

+47

___

___

___

-125

___

-19,750

1101 1101 -35

0010 1111 2F

1011 1101 -67

9E -98

0111 0000 +112

1000 0011 83

0110 1110 110

1011 0010 1101 1010 B2DA

Page 33: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

CASE 4 Both negative. -43 -78

ADDITIONCASE 1 Both positive.

+83+16

2’s complement arithmetic2’s complement arithmetic

0101 00110001 0000

83 0101 0011+16 +0001 0000 99 0110 0011

CASE 2 Positive and smaller negative.

+125 -68

0111 11011011 1100

125 0111 1101+(-68) +1011 1100 57 1 0011 1001

CASE 3 Positive and larger negative.

+37 -115

37 0010 0101+(-115) +1000 1101 -78 1011 0010

1101 01011011 0010

-43 1101 0101 +(-78) +1011 0010 -121 1 1000 0111

0010 01011000 1101

Page 34: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

SUBTRACTIONCASE 1 Both positive.

+83+16

2’s complement arithmetic2’s complement arithmetic

0101 00110001 0000

CASE 2 Positive and smaller negative.

+68 -27 83 0101 0011

+(-16) +1111 0000 67 1 0100 0011

0100 01001110 0101

68 0100 0100+(+27) +0001 1011 95 0101 1111CASE 3 Positive and

larger negative. +14 -108

14 0000 1110+(+108) +0110 1100 122 0111 1010

1101 01011011 0010

CASE 4 Both negative. -43 -78

-43 1101 0101 +(+78) +0100 1110 35 1 0010 0011

0000 11101001 0100

Page 35: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

INVERT

A7 A6 A5 A4 A3 A2 A1 A0

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0

0

0

1

A7-A0 0110 1110

Y7-Y0 0110 1110

Y7-Y0 1001 0001

INV LOGIC

Controlled inverterControlled inverter

Page 36: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

ADD/SUB

A7 A6 A5 A4 A3 A2 A1 A0

S7 S6 S5 S4 S3 S2 S1 S0

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

S4

S3

S2

S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

B7 B6 B5 B4 B3 B2 B1 B0

ADDITION

A7 A6 A5 A4 A3 A2 A1 A0

+B7 B6 B5 B4 B3 B2 B1 B0

S7 S6 S5 S4 S3 S2 S1 S0

SUBTRACTION

A7 A6 A5 A4 A3 A2 A1 A0

+B7 B6 B5 B4 B3 B2 B1 B0 +1

S7 S6 S5 S4 S3 S2 S1 S0

- - - - - - - -

Binary adder-subtractor diagramBinary adder-subtractor diagram

S8

Page 37: Arithmetic circuits  Binary addition  Binary Subtraction  Unsigned binary numbers  Sign-magnitude numbers  2 ’ S Complement representation  2 ’

S8 S7 S6 S5 S4 S3 S2 S1 S0

B7 B6 B5 B4 A7 A6 A5 A4 B3 B2 B1 B0 A3 A2 A1 A0

SUB

S4 S3 S2 S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

S4 S3 S2 S1

A1

A2

A3

A4

B1

B2

B3

B4

CIN

CO

UT

Binary adder-subtractor circuit.Binary adder-subtractor circuit.

7483 7483

ADD/