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Copyright © 2006-2008, 2010 ARM Limited. All rights reserved. ARM DDI 0403D (ID021310) ARM ® v7-M Architecture Reference Manual

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  • ARMv7-M ArchitectureReference Manual

    Copyright 2006-2008, 2010 ARM Limited. All rights reserved.ARM DDI 0403D (ID021310)

  • ARMv7-M Architecture Reference ManualCopyright 2006-2008, 2010 ARM Limited. All rights reserved.

    Release Information

    The following changes have been made to this document.

    Proprietary Notice

    This ARM Architecture Reference Manual is protected by copyright and the practice or implementation of the information herein may be protected by one or more patents or pending applications. No part of this ARM Architecture Reference Manual may be reproduced in any form by any means without the express prior written permission of ARM. No license, express or implied, by estoppel or otherwise to any intellectual property rights is granted by this ARM Architecture Reference Manual.

    Your access to the information in this ARM Architecture Reference Manual is conditional upon your acceptance that you will not use or permit others to use the information for the purposes of determining whether implementations of the ARM architecture infringe any third party patents.

    This ARM Architecture Reference Manual is provided as is. ARM makes no representations or warranties, either express or implied, included but not limited to, warranties of merchantability, fitness for a particular purpose, or non-infringement, that the content of this ARM Architecture Reference Manual is suitable for any particular purpose or that any practice or implementation of the contents of the ARM Architecture Reference Manual will not infringe any third party patents, copyrights, trade secrets, or other rights.

    This ARM Architecture Reference Manual may include technical inaccuracies or typographical errors.

    To the extent not prohibited by law, in no event will ARM be liable for any damages, including without limitation any direct loss, lost revenue, lost profits or data, special, indirect, consequential, incidental or punitive damages, however caused and regardless of the theory of liability, arising out of or related to any furnishing, practicing, modifying or any use of this ARM Architecture Reference Manual, even if ARM has been advised of the possibility of such damages.

    Words and logos marked with or are registered trademarks or trademarks of ARM Limited, except as otherwise stated below in this proprietary notice. Other brands and names mentioned herein may be the trademarks of their respective owners.

    Copyright 2006-2008, 2010 ARM Limited

    110 Fulbourn Road Cambridge, England CB1 9NJ

    Change history

    Date Issue Confidentiality Change

    June 2006 A Non-confidential Initial release

    July 2007 B Non-confidential Second release, errata and changes documented separately

    September 2008 C Non-confidential, Restricted Access Options for additional watchpoint based trace in the DWT, plus errata updates and clarifications.

    12 February 2010 D Non-confidential Fourth release, adds DSP and Floating-point extensions, and extensive clarifications and reorganization.

    ii Copyright 2006-2008, 2010 ARM Limited. All rights reserved. ARM DDI 0403DNon-Confidential, Unrestricted Access ID021310

  • Restricted Rights Legend: Use, duplication or disclosure by the United States Government is subject to the restrictions set forth in DFARS 252.227-7013 (c)(1)(ii) and FAR 52.227-19.

    This document is Non-Confidential but any disclosure by you is subject to you providing notice to and the acceptance by the recipient of, the conditions set out above.

    In this document, where the term ARM is used to refer to the company it means ARM or any of its subsidiaries as appropriate.

    Note The term ARM is also used to refer to versions of the ARM architecture, for example ARMv6 refers to version 6 of the ARM architecture. The context makes it clear when the term is used in this way.

    ARM DDI 0403D Copyright 2006-2008, 2010 ARM Limited. All rights reserved. iiiID021310 Non-Confidential, Unrestricted Access

  • iv Copyright 2006-2008, 2010 ARM Limited. All rights reserved. ARM DDI 0403DNon-Confidential, Unrestricted Access ID021310

  • ContentsARMv7-M Architecture Reference Manual

    PrefaceAbout this manual .............................................................................. xxiiUsing this manual .............................................................................. xxiiiConventions ...................................................................................... xxviFurther reading ................................................................................. xxviiFeedback ......................................................................................... xxviii

    Part A Application Level ArchitectureChapter 1 Introduction

    A1.1 About the ARMv7 architecture, and architecture profiles ............... A1-32A1.2 The ARMv7-M architecture profile ................................................. A1-33A1.3 Architecture extensions .................................................................. A1-35

    Chapter 2 Application Level Programmers ModelA2.1 About the application level programmers model ........................... A2-38A2.2 ARM processor data types and arithmetic ..................................... A2-39A2.3 Registers and execution state ........................................................ A2-46A2.4 Exceptions, faults and interrupts .................................................... A2-50A2.5 Coprocessor support ...................................................................... A2-52A2.6 The optional Floating-point extension ............................................ A2-53

    ARM DDI 0403D Copyright 2006-2008, 2010 ARM Limited. All rights reserved. vID021310 Non-Confidential, Unrestricted Access

  • Contents

    Chapter 3 ARM Architecture Memory ModelA3.1 Address space ............................................................................... A3-82A3.2 Alignment support .......................................................................... A3-83A3.3 Endian support ............................................................................... A3-85A3.4 Synchronization and semaphores .................................................. A3-89A3.5 Memory types and attributes and the memory order model .......... A3-99A3.6 Access rights ................................................................................ A3-109A3.7 Memory access order .................................................................. A3-111A3.8 Caches and memory hierarchy .................................................... A3-120

    Chapter 4 The ARMv7-M Instruction SetA4.1 About the instruction set .............................................................. A4-124A4.2 Unified Assembler Language ....................................................... A4-126A4.3 Branch instructions ...................................................................... A4-129A4.4 Data-processing instructions ........................................................ A4-130A4.5 Status register access instructions .............................................. A4-140A4.6 Load and store instructions .......................................................... A4-141A4.7 Load Multiple and Store Multiple instructions .............................. A4-144A4.8 Miscellaneous instructions ........................................................... A4-145A4.9 Exception-generating instructions ................................................ A4-146A4.10 Coprocessor instructions ............................................................. A4-147A4.11 Floating-point load and store instructions .................................... A4-148A4.12 Floating-point register transfer instructions .................................. A4-149A4.13 Floating-point data-processing instructions ................................. A4-150

    Chapter 5 The Thumb Instruction Set EncodingA5.1 Thumb instruction set encoding ................................................... A5-152A5.2 16-bit Thumb instruction encoding ............................................... A5-156A5.3 32-bit Thumb instruction encoding ............................................... A5-164

    Chapter 6 The Floating-Point Instruction Set EncodingA6.1 Overview ...................................................................................... A6-190A6.2 Floating-point instruction syntax .................................................. A6-191A6.3 Register encoding ........................................................................ A6-194A6.4 Floating-point data-processing instructions ................................. A6-195A6.5 Extension register load or store instructions ................................ A6-197A6.6 32-bit transfer between ARM core and extension registers ......... A6-198A6.7 64-bit transfers between ARM core and extension registers ....... A6-199

    Chapter 7 Instruction DetailsA7.1 Format of instruction descriptions ................................................ A7-202A7.2 Standard assembler syntax fields ................................................ A7-207A7.3 Conditional execution ................................................................... A7-208A7.4 Shifts applied to a register ........................................................... A7-212A7.5 Memory accesses ........................................................................ A7-214A7.6 Hint Instructions ........................................................................... A7-215

    vi Copyright 2006-2008, 2010 ARM Limited. All rights reserved. ARM DDI 0403DNon-Confidential, Unrestricted Access ID021310

  • Contents

    A7.7 Alphabetical list of ARMv7-M Thumb instructions ........................ A7-216

    Part B