asic activities for the panda gsi 22.04.2009 peter wieczorek

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ASIC Activities for the PANDA EMC @ GSI ASIC Activities for the PANDA EMC @ GSI 22.04.2009 Peter Wieczorek

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Peter Wieczorek 3 Existing ASIC and Improvement

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Page 1: ASIC Activities for the PANDA GSI 22.04.2009 Peter Wieczorek

ASIC Activities for the PANDA EMC @ GSIASIC Activities for the PANDA EMC @ GSI

22.04.2009Peter Wieczorek

Page 2: ASIC Activities for the PANDA GSI 22.04.2009 Peter Wieczorek

Peter Wieczorek 2

OverviewOverview

Existing ASIC and Improvement

Setup for Crystal Matrix Measurements

Data Acquisition

Page 3: ASIC Activities for the PANDA GSI 22.04.2009 Peter Wieczorek

Peter Wieczorek 3

Existing ASIC and ImprovementExisting ASIC and Improvement

Page 4: ASIC Activities for the PANDA GSI 22.04.2009 Peter Wieczorek

Peter Wieczorek 4

Block Schematic Block Schematic

-

preamplifier

first shaper

second shaper

third shaper

Page 5: ASIC Activities for the PANDA GSI 22.04.2009 Peter Wieczorek

Peter Wieczorek 5

ASIC LayoutASIC LayoutShaper stage

Out

put s

tage

Prea

mpl

ifier

sta

ge

Channel 1

Channel 2

Voltage reference

Prozess: 350 nm - CMOS

Dimension: 3.3 mm x 3.3 mm

Connections: 64

Components: Transistors: 4841 Capacitors: 1729Resistors: 386

Page 6: ASIC Activities for the PANDA GSI 22.04.2009 Peter Wieczorek

Peter Wieczorek 6

ResultsResults

Requirements Results @ T = - 20° C

Unit

Noise: 4500 4456 ± 35 e-

Max. input charge: 7 7,84 ± 0,4 pC

Dyn. range: 10000 10889 ± 251 1

Integration time: 250 248 ± 3 ns

Event rate: 350 500 kHz

Power consumption: 60 52 ± 1 mW/Channel

Page 7: ASIC Activities for the PANDA GSI 22.04.2009 Peter Wieczorek

Peter Wieczorek 7

Next ASIC IterationNext ASIC Iteration

Next iteration should be the final design Implementation of an additional DAC Extention of the existing logic Define # of bits for chip IDOptimisation of the power consumption

Open questions:What is the next readout device after the ASIC ? (Power consumption, output load, …)How many ASICs will be connected to a cluster ? (Chip ID)

Page 8: ASIC Activities for the PANDA GSI 22.04.2009 Peter Wieczorek

Peter Wieczorek 8

Setup for Crystal Matrix MeasurementsSetup for Crystal Matrix Measurements

Page 9: ASIC Activities for the PANDA GSI 22.04.2009 Peter Wieczorek

Peter Wieczorek 9

Readout ChainReadout Chain

Crystal APD ASICDifferential output signal

Page 10: ASIC Activities for the PANDA GSI 22.04.2009 Peter Wieczorek

Peter Wieczorek 10

SetupSetup

Matrix readout 4 x 4 array One APD per crystalSeperate high voltagesTwo APDs connected one ASIC

4 x 4 matrix2 ASICs on one PCB

1

16

Page 11: ASIC Activities for the PANDA GSI 22.04.2009 Peter Wieczorek

Peter Wieczorek 11

Crystal MatrixCrystal Matrix

Status:

Mechanical setup: Gießen/GSI availableCrystals: Gießen availableASICs: GSI available

PCB with buffer: GSI Under developmentAPDs: Gießen available

Cooling system: Gießen availableDifferential ADC: KVI ? ?

DAQ system: KVI ? ?

Page 12: ASIC Activities for the PANDA GSI 22.04.2009 Peter Wieczorek

Peter Wieczorek 12

Data AcquisitionData Acquisition

Page 13: ASIC Activities for the PANDA GSI 22.04.2009 Peter Wieczorek

Peter Wieczorek 13

DAQ - SystemDAQ - System

Crystal APD ASIC

DAQ - SystemDigitize the

analog output signals

Page 14: ASIC Activities for the PANDA GSI 22.04.2009 Peter Wieczorek

Peter Wieczorek 14

Readout Board Developed by J.HoffmannReadout Board Developed by J.Hoffmann

Connection to the Data Acquisition

LAB: USB - Connection

16 Differential analog inputsInput range: ± 1 VADC: 12 Bit, 65MS/s

Page 15: ASIC Activities for the PANDA GSI 22.04.2009 Peter Wieczorek

Peter Wieczorek 15

Thanks….Thanks….