assic 28th lecture
TRANSCRIPT
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System on ChipSystem on ChipSystem on ChipSystem on Chip
ASIC DESIGN USING FPGA
BEIT VII
KICSIT
2012 Lecture 28
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2012 Lecture 28 2
System on Chip (SoC)System on Chip (SoC)
System
• A collection of all kinds of components and/or subsystems appropriately interconnected to perform the specified functions for end users.
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2012 Lecture 28 3
System on Chip (SoC)System on Chip (SoC)
System on Chip
• A system on a chip or system on chip (SoC or SOC) is an integrated circuit (IC) that integrates all components of a computer or other electronic system into a single chip.
• It may contain digital, analog, mixed-signal, and often radio-frequency functions---all on a single chip substrate.
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System on Chip (SoC)System on Chip (SoC)
• For example, a SoC for a sound-detecting device might include an audio receiver, an analog-to-digital converter ( ADC ), a microprocessor , necessary memory , and the input/output logic control for a user - all on a single microchip.
• Another example is the Cell phone chip, which includes all the functionalities of a hand-held computer as well as GPS, Video Graphic processor, Radio Receiver/ Transmitter etc.
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SoC ExampleSoC Example
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2012 Lecture 28 6
SoC EvolutionSoC Evolution
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2012 Lecture 28 7
SoC ExplainedSoC Explained
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2012 Lecture 28 8
ASIC Vs SoCASIC Vs SoC
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SoC ArchitectureSoC Architecture
• Hardware:– Analog: ADC, DAC, PLL, TxRx, RF…etc.– Digital: Processor, Interface, Accelerator…etc.– Storage: SRAM, DRAM, FLASH, ROM…etc.
• Software: – OS, Application SW.
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2012 Lecture 28 10
SoC ArchitectureSoC Architecture
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SoC ApplicationsSoC Applications
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SoC AdvantagesSoC Advantages
• Reduce overall system cost
• Increase performance
• Lower power consumption
• Reduce size
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SoC Design ConsiderationsSoC Design Considerations
• Architecture strategy
• Design-for-test (DFT) strategy
• Validation strategy
• Synthesis and backend strategy
• Integration strategy
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SoC Design ConsiderationsSoC Design Considerations
• Architecture strategy– Central processing core– DSP cores– On chip bus– Easy plug-and-play IPs– I/O, peripherals – Platform based design methodology– Parameterization– Function partition
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SoC Design ConsiderationsSoC Design Considerations
• Design-for-test (DFT) strategy – usually implemented using a full scan, MUXed flip-flop
of scan insertion.– For embedded memories, Built in Self-test (BIST) and
Module Test are best used.
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SoC Design ConsiderationsSoC Design Considerations
• Validation strategy– Incorporating more third-party IPs, requires post-
silicon system-on-a-chip (SoC) validation- especially IP validation.
– immensely complicated effort.– post-silicon validation and debug require:
Compact, parameterizable, distributed, reconfigurable, on-chip RTL instruments (technology-independent) with automated insertion for use in simulation, emulation, FPGA, and SoC/ASIC
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SoC Design ConsiderationsSoC Design Considerations
• Integration strategy– Power Management.– The signal-level interface of the new component must fit to the SoC
interconnection network.– functionality must match with the rest of the system.– Improve the reduced
performance of the introduced
components due to
integration overheads.