assm13 lecture 3 register transfer and microoperations

8/13/2019 Assm13 Lecture 3 Register Transfer and Microoperations

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CSW 353(Assembly Language)

Computer

ArchitectureDr. Salma [email protected]
mailto:[email protected]:[email protected]


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Course LogisticsTextbook Outline

2

Chapter 1:Digital Logic Circuits

Chapter 2:Digital Components

Chapter 3:Data Representation

Chapter 4:Register Transfer and

Microoperations

Chapter 5:Basic Computer OrganizationChapter 6:Programming the Basic Computer

Chapter 7:Microporgammed Control

Chapter 8:CPU

Chapter 11:I/O Organization

Chapter 12:Memory Organization


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Register Transferand

Microoperations1. Register Transfer Language

2. Transfer (Register, Bus, Memory)3. Microoperations (Arithmetic , Logic, Shift)

4. Arithmetic Logic Shift Unit


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1. Register Transfer Language

Circuits IC components modules + data+ control paths computer.

Microoperation:operations executed on data

stored in registers (shift, clear, load, count). Internal HW organization is best defined by

specifying:

1. The set of registers and their functions.

2. The sequence of microoperations.

3. The control that initiates the sequence of

microo erations.410/7/2013


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1. Register Transfer Language(cont.)

Register Transfer Language: the symbolicnotation used to describe the microoperations

transfer among registers

The use of symbols instead of a narrativeexplanation provides an organized and

concise manner.

A convenient tool for describing the internal

organization of digital computers in a concise

and precise manner.510/7/2013


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1. Register Transfer

Registers are designated by Capital Letters(sometimes followed by numerals):

MAR (Memory Address Register).

PC(Program Counter). IR(Instruction Register).

R1(Processor Register).

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1. Register Transfer(cont.)

Register Transfer: Information transfer fromone register to another in symbolic form:

Register transfer with control function: :

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Register Transfer: Information transfer fromone register to another in symbolic form:

Register transfer with control function: : means if() then ( )

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Two or more operations at the same time(during a common clock pules):

: ,

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3. Bus Transfer

Common Bus is a more efficient scheme fortransferring information between registers in

a multiple-register configuration.

A bus structure = a set of common lines onefor each bit of a register.

Control signals determine which register is

selected.

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3. Bus Transfer(cont.)

Constructing a common bus is done with:1. Multiplexers

The multiplexers select the source register

whose binary information is placed on thebus.

Number of multiplexers = size of register.

Size of multiplexer = number of registers.

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The content of register is placed on the

bus, and the content of the bus is loaded intoregister by activating its load control

input ,

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Register Registern

Bus


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In general a bus system will multiplex

registers of bits to produce an -linecommon bus multiplexers of size .

e.g. eight 16-bit registers ?

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Constructing a common bus is done with:2. Three-State Bus Buffer

Tri-State: 0, 1, high-impedance (open circuit).

Buffer: a device designed to be inserted

between other devices to match impedance,

to prevent mixed interactions, and to supply

additional drive or relay capability.

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The outputs of the buffers are connected

together to form a singlebus line.

No more than one buffer may be in the

active state at any given time (how?)

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Bit 0 for four registers:

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4. Memory Transfer

Memory Unit is a collection of storage cellstogether with associated circuits needed to

transfer information in and out of storage.

Memory read : transfer information into from the memory word selected by the

address in. : []

Memory Write : transfer information frominto the memory word selected by the

address in. 1910/7/2013


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4. Memory Transfer(cont.)

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- ROM: performs read operations

only. Binary information is made

permanent during HW production.

- Used to store constant tables,

programs that boot the computer

and perform diagnosticsusually small.

- RAM: can transfer the stored info

out (read) and also receive new

information in (write) any desired

random location.

- Slower than registers, but much

larger.


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4. Memory Transfer(cont.)A memory unit that

communicates with multipleregisters.

Left MUX decides which

address register.

Decoder decides which

destination register has an

active load input.

Read:

- Memory read enabled.

- Word at address specifiedby chosen address

register is loaded into

register with enabled

load input.


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4. Memory Transfer(cont.)A memory unit that

communicates with multipleregisters.

Left MUX decides which

address register.

Decoder decides which

destination register has an

active load input.

Write:

- Memory write enabled.

- Right MUX decides whichdestination register to

transfer word from, to

memory at address

specified by addressregister.


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5. Microoperations

Register transfer do not change binary info. All other microoperations change content

during transfer.

The basic set of microoperations: Arithmetic

Logic

Shift

Each have its symbolic notation and

hardware implementation. 2310/7/2013


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6. Arithmetic Microoperations

Basic arithmetic microoperation: Add

Subtract

Complement Shift

All other arithmetic microoperations can be

obtained from a variation or a sequence of

them.

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6. Arithmetic Microoperations(cont.)

Basic arithmetic microoperation:

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Binary Adder Hardware Implementation Using full-adders connected in cascade.

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Binary Adder-Subtractor Hardware Implementation

Remember that = + = + +

Hence combine addition and subtraction in

one circuit with a control input . = (add)

= (subtract)

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Binary Adder-Subtractor Hardware Implementation

M = 0 : Adder B M + C = B 0 + 0 = B, A + B

M = 1 : Subtractor B M + C = B 1 + 1 = B + 1= -B(2s

comp), A - B

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Binary Incrementer Hardware Implementation Binary counter (previous lectures).

Combinational circuits:

Half-adders connected in cascade.

Least significant adder have one input = 1.


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Binary Incrementer Hardware Implementation Combinational circuits:

Half-adders connected in cascade.


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Arithmetic Circuit Combining all listed microoperations in one

composite circuit.


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Arithmetic Circuit

A-1+1=AA+1111=A-1


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7. Logic Microoperations

Logic microoperations consider each bit ofthe register separately and treat them as

binary variables.

Seldom used in scientific computations butvery useful for bit manipulation and logical

decisions.

e.g. :

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1010 Content of

1100 Content of

0110 Content of after =


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7. Logic Microoperations(cont.)

Symbolic notation: and (), or (), not (

) The plus sign usage:

In microoperation == addition.

In control (or Boolean) function == AND.

e.g. + : +,

Means: if( OR ) then (add to andput the result in , and perform OR

and put the results in ).

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Hardware Implementation Most computers use only four microoperations

(AND, OR, XOR, NOT) and derive the rest from

them.


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Hardware Implementation Most computers use only four microoperations

(AND, OR, XOR, NOT) and derive the rest from

them.

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Some applications Manipulating individual bits or a portion of a

word stored in a register

Change bit values, delete a group of bits, orinsert new bit values.

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Some applications Selective-set

Sets to 1 the bits in register A where there are

corresponding 1sin register B. It does not effectbit positions that have 0sin B.

Selective-complement

Complements bits in A where there arecorresponding 1s in B. It does not effect bit

positions that have 0sin B.

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1010 A before

1100 B (Logic Operand)

1110 A After

1010 A before


0110 A After

Selective-set

-

BAA

BAA


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Some applications Selective-clear

Clears to 0 the bits in A only where there are

corresponding 1sin B. Selective-mask

Similar to the selective-clear operation except

that the bits of A are cleared only where thereare corresponding 0sin B.

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1010 A before


1000 A After

Selective-mask

1010 A before1100 B (Logic Operand)

0010 A AfterSelective-clear

BAA

BAA


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Some applications Insert

The insert operation inserts a new value into a

group of bits. This is done by first masking the bits and then

ORing them with the required value.

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1) Mask 2) OR

0110 1010 A before 0000 1010 A before

0000 1111 B mask 1001 0000 B insert

0000 1010 A after mask 1001 1010 A after insert


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8. Shift Microoperations

Used for serial transfer of data. with conjunction with arithmetic, logic and

data-processing operations.

Three types: Logical

Circular

Arithmetic

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Logical Shift Transfers 0 through the serial input.

Shift-left or shift-right.

The bit transferred to the end positionthrough the serial input is assumed to be 0

during a logical shift (zero inserted).

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0 0

Register symbol must be the same

on both sides of arrow


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Circular Shift Shift-left or shift-right.

The circular shift circulates the bits of the

register around the two ends without loss ofinformation.

4410/7/2013Register symbol must be the same

on both sides of arrow


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Arithmetic Shift Shifts a signed binary number to left or right

Shift-left == multiplication by 2.

Shift-right == division by 2.

Must leave the sign bit unchanged because

the sign of the number remains the same.

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Arithmetic Shift Shift-left

Shift-right

Sign reversal occurs with overflow detect

with FF.4610/7/2013

22 RashlR

Rn-1R

n-2 . . . . .R1R0

MSBLSB

0 insert

Carry out

Sign bit

22 RashrR

LSB lost

MSB LSB

h f


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Hardware Implementation Bidirectional shift register with parallel load

(previous lectures).

Combinational circuit More efficient.

Register on common bus, to shifter, back to register.

Only one clock pulse to load and shift. MUX to decided shift type.

n-bit shifter == n multiplexers.

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hif i i


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Hardware Implementation

A 4-bit

Combinational shifter

i h i i hif i


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9. Arithmetic Logic Shift Unit

Instead of individual registers performing

microoperation storage registers + ALU.

ALU is combinational one clock pulse to

complete task. MUX to choose between logical and

arithmetic operations outputs.

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9 A i h i L i Shif U i ( )


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9. Arithmetic Logic Shift Unit(cont.)

Hardware Implementation

One stage of

Arithmetic Logic Shift Unit.

S l d P bl


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Selected Problems

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To be selected!

N L


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Next Lecture

Basic Computer Organization and Design.

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Assignment

- Reading: Chapter 4.

R f


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References

- Digital Design, 4thed, M. Morris Mano, Prentice Hall,

2006.

-http://microcom.kut.ac.kr/ch04

- God bless Google and Wiki!
http://microcom.kut.ac.kr/http://microcom.kut.ac.kr/http://microcom.kut.ac.kr/http://microcom.kut.ac.kr/http://microcom.kut.ac.kr/http://microcom.kut.ac.kr/http://microcom.kut.ac.kr/http://microcom.kut.ac.kr/http://microcom.kut.ac.kr/http://microcom.kut.ac.kr/

assm13 lecture 3 register transfer and microoperations

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