register transfer & microoperations
DESCRIPTION
Register Transfer & Microoperations. Describing Digital Systems. Digital systems are very complex. They are usually designed and built of different modules that perform specific tasks. - PowerPoint PPT PresentationTRANSCRIPT
ECEG-3202: Computer Architecture and Organization, Dept of ECE, AAU
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Register Transfer & Microoperations
ECEG-3202: Computer Architecture and Organization, Dept of ECE, AAU
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Describing Digital Systems
• Digital systems are very complex.
• They are usually designed and built of different modules that perform specific tasks.
• The best way to define the operation of these modules is by specifying the registers they contain and the operations possible on the data in these registers.
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Example
• We can define an adder as a module that:– Interacts with three registers:
• Two source registers.• One destination register.
– Performs the addition operation on the contents of the source registers and places the result in the destination register.
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Microoperations
• Operations that specify every modification to the data in the registers are called “microoperations”.– They are simple operations performed on
information stored in one or more registers.
• Each assembly language instruction can be broken down into multiple microoperations.
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Example
• The “ADD B” instruction of the 8085 is made up of the following microoperations:1. Move the contents of the accumulator to
“temporary register” W.
2. Move the contents of the B register to “temporary register” X.
3. Add W to X.
4. Move result of addition back to the accumulator and set the appropriate flags.
5. Increment the program counter.
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Designing a Hardware System
• When designing a hardware system, one must specify the following items about the system:– The set of register it contains and their functions.– The set of microoperations that can be performed
on the information in these registers.– The sequencing and control of these
microoperations.
• The microoperations and the control will be translated into the hardware that make up the system.
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Register Transfer Language
• We can use plain English to specify these registers, operations and their control.– However, the result will be very long and verbose
descriptions.
• It would be much easier to use symbols to represent (abstract) some of the information.– This abstraction is called a “Register Transfer
Language” – RTL.• Register Transfer – operations are performed on data
stored in registers and the results are transferred either back to the same registers or to other registers.
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Register Transfer Language
• Register Transfer Languages are abbreviated, concise representations of the actual description.– They contain ALL the necessary information in
shortened descriptions.– They contain ONLY the necessary information.
• These languages require that the designer learns a few symbols to represent the different entities and operations in the digital system.– The result is a very powerful tool for expressing
hardware design.
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Register Transfer Language
• The language can be classified into some main statement types– Register Transfer Operations.– Bus and Memory Transfer Operations.– Arithmetic Operations.– Logic Operations.– Shift Operations.
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Register Transfer Operations
• These are operations that simply denote the transfer of the binary data from one register to another.
• First, some definitions:– Special purpose registers are represented using capital
letters that specify their function:• PC – Program Counter, AR – Address Register, …
– General purpose registers are either represented using an alphabetically ordered list, or an enumerated list.
• A, B, C, …• R1, R2, R3, …
– Bits in an n-bit register are numbered from 0 (least significant) to n-1 (most significant).
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Register Transfer Operations
• Register transfers are represented in the following manner:
Destination Source
– This means, “all of the bits of the source register are copied into the destination register.
– For example,
R2 R1
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Conditions
• The previous operation requires that the destination register must have some control which would allow the loading of the register at the required point in time.– This “LOAD” input would only be activated under
certain conditions:If (P == 1)
{
R2 R1
}
– This, we write in the following way:P: R2 R1
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Hardware Implications
• Translating into hardware
P: R2 R1
• There has to be two registers called R1 and R2.• R2 must have parallel load capability.• There has to be n wires connecting the output of R1 to
the inputs of R2.• There has to be a control signal called P connected to
the load input of R2.
R1
R2Control
UnitP
LD
n
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Bus Transfer Operations
• How do we connect all of the registers in the Microprocessor to each other?– Separate connection paths?
• Too many wires.
– Common bus scheme.• This is the most often used technique to reduce the
number of connections needed.
• What is a bus?– A bus consists of a set of common wires that are
accessed by multiple modules or sub-systems.– And, a mechanism to control who is allowed to use
it.
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Bus Control
• To allow the multiple modules to access the bus without interfering with each other, some mechanism is required to control who uses the bus when.– One common way of controlling access to the bus
from several registers is by utilizing a set of multiplexers.
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Controlling Access to the Bus
n-bit4 X 1 MUX
ControlUnit
R1 R2 R3 R4
S0
S1
n n n n
nn
CommonWires
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Controlling access to the bus
• The previous diagram assumes that only the registers will access the bus.
• If other modules may use the bus, Tri-state buffers must be used to isolate the bus from the modules not using it.
• The tri-state buffers can be added after the outputs of the multiplexers.
OR• It is possible to replace the multiplexers with the buffers.
However, controlling them would require the same amount of logic as the multiplexers.
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Controlling Access to the Bus
2 - 4 Decoder
ControlUnit
R3
R2
R1
R0
S0
S1
CommonWire
0123
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Bus Transfer Representation
• In RTL, busses are usually referred to as BUS1, BUS2, …
• A transfer involving the bus can be designated in one of two ways:
BUS C, R1 BUSOR
R1 BUS C
• Even if there is only one bus and all operations utilize it, it is useful to explicitly show the bus in the operations.
– It is a common resource that is constantly under contention.
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Memory Transfer Operations
• A memory read operation has the following stages:– The address is sent to the memory system– The memory system produces the word stored in the
specified location– The memory word is read back into the digital
system.
• In most digital systems:– A special register called the memory address register
(MAR) holds the address during the memory operation.
– A special register called the memory data register (MDR) holds the data before or after the operation.
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Memory Transfer in RTL
• In RTL, a memory transfer is represented in a manner similar to a simple register transfer, except that the source or destination is replaced by M[MAR].
Read: DR M[MAR]
Write: M[MAR] DR
– M[AR] means “the memory location whose address is in the address register AR”.
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Arithmetic Microoperations
• The five main arithmetic microoperations that one encounters when designing any digital systems are:– Addition.– Subtraction.– Increment.– Decrement.– Shift.
• Logical Shift.• Arithmetic Shift.
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Arithmetic Microoperations
• AdditionR3 R1 + R2
• SubtractionR3 R1 + R2 + 1
• IncrementR2 R2 + 1
• DecrementR2 R2 - 1
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Arithmetic Microoperations
• What about Multiplication and Division?– Multiplication and Division are either implemented
directly in hardware• Then a separate single microoperation is used to specify
them.
– Or, they may be implemented by repeated addition or repeated subtraction.
• Then a sequence of addition, subtraction, and shift microoperations are used to specify them.
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Hardware Implications
• Binary Adder/Subtractor
FA FA FA FA
B3 A3
S3C4
MB2 A2
S2
B1 A1
S1
B0 A0
S0
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Hardware Implications
• The above circuit can implement all of the following operations
Operation Microoperation A B M S
Add R3 R1 + R2 R1 R2 0 R3
Subtract R3 R1 – R2 R1 R2 1 R3
2’s Comp R2 R2 + 1 0 R2 1 R2
Increment R1 R1 + 1 1 R1 0 R1
Decrement R1 R1 – 1 R1 0 1 R1
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Hardware Implications
• What is missing?– Any operation that needs to use the input carry.
• Add with Carry• Subtract with Borrow
– The input carry is being used to form the 2’s complement.
• If the above operations are needed, a completely different circuit must be used.
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Hardware Implications – Arithmetic Circuit
FAXY C
C SFA
XY C
C SFA
XY C
C SFA
XY C
C S
D0D1D2D3Cout
4X1 MUX0123 S1S0
Y
4X1 MUX0123 S1S0
Y
4X1 MUX0123 S1S0
Y
4X1 MUX0123 S1S0
Y
CinA0S1S0B0A1B1A2B2A3B30
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Hardware Implications – Arithmetic Circuit
S1 S0 Cin
Input
Y
Output
D = A + Y + Cin
Microoperation
0 0 0 B D = A + B Add
0 0 1 B D = A + B + 1 Add with carry
0 1 0 B D = A + B Subtract with borrow
0 1 1 B D = A + B +1 Subtract
1 0 0 0 D = A Transfer A
1 0 1 0 D = A + 1 Increment A
1 1 0 1 D = A – 1 Decrement A
1 1 1 1 D = A Transfer A
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Logic Microoperations
• Logic microoperations specify binary operations for strings of bits stored in registers.
– These operations treat the values in the registers simply as a string of unrelated bits.
– These operations process the data in the registers bit-wise. i.e. bit by bit.
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Logic Microoperations
• There are many possible logic operations.
• However, the following are the most common (and useful).– Clear (set to 0) F 0
– AND F A B
– OR F A B
– XOR F A B– NOT F A– Set (set to 1) F 1
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Hardware Implications
• Logic circuit (per bit).
4 X 1MUX
ControlUnit
S0
S1
AiBi
Ei
0123
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Hardware Implications
• The above circuit can implement all of the mentioned operations.
Microoperation Name A B E S0 S1
R1 R1 0 Clear R1 0 R1 0 0
R3 R1 R2 AND R1 R2 R3 0 0
R3 R1 R2 OR R1 R2 R3 1 0
R3 R1 R2 XOR R1 R2 R3 0 1
R2 R2 NOT R1 0 R1 1 1
R1 R1 1 Set R1 1 R1 1 0
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Shift Microoperations
• Shift microoperations are mainly used for serial transfer of data.– They are also used in conjunction with arithmetic,
logic and other operations.
• The contents of a register can be shifted to the left or to the right.– At the same time, the first bit (from the right or the
left) receives its input from the serial input.
• In all shift operations, the source and destination registers must be the same.
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Types of Shift Operations
• Logical shift.– A shift where the serial input is set to 0.– shl and shr.
R1 shl R1
R1 shr R1
• Circular shift (rotate).– A shift where the serial input is set to the last bit.– cil and cir.
R1 cil R2
R1 cir R2
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Types of Shift Operations
• Arithmetic shift right:– Shifting to the right divides the number by 2.– The serial input is set to the sign bit to preserve
the sign of the number.– ashr.
R1 ashr R1
R0R1R2Rn-2Rn-1
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Types of Shift Operations
• Arithmetic shift left:– Shifting to the left multiplies the number by 2.– The serial input is set to 0.
– The sign bit (Rn-1) is replaced by bit Rn-2.
• If Rn-2 is not equal to Rn-1, shift overflow occurs.
– ashl.R1 ashl R1
R0R1R2Rn-2Rn-1 0
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Hardware Implications
0 Shift Right1 Shift Left
A – Register OutputH – register Input
A0A1A2A3
A3A00
s s s s01 01 01 01
H0H1H2H3
2X1 MUX2X1 MUX2X1 MUX2X1 MUX
0A30
cil
shl
ash
l
cir
shr
ash
r
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Arithmetic Logic Shift Circuit - ALU
• Taking all of the above together, we can design a “composite” circuit that implements all of the arithmetic, logic and shift operations.
• To facilitate this and not introduce too much connection complexity, most computer designs employ “temporary” registers.– The information is transferred to these registers
before an ALU operation.– The ALU operates on the contents of these
registers.– The results of the ALU operation are stored in the
destination register directly.