be electronics

PUNE

BHARATI VIDYAPEETH UNIVERSITY, Pune.(Established under Section 3 of UGC ACT 1956)

STR SE UR CO

UCTURE AND S YLL AB US

B. Tech. (ELECTRONICS) (Sem. VII & VIII)

COURSE STRUCTURE & SYLLABUS

BHARATI VIDYAPEETH UNIVERSITY, PUNE

B. Tech. (ELECTRONICS) (Sem. VII & VIII)

HIGHLIGHTSBharati Vidyapeeth University College of Engineering (BVUCOE) is the largest Engineering College in Maharashtra with an intake of 700 students in each academic year. Imparting quality technical education from Under Graduate to Doctorate Level, BVUCOE is probably the only Engineering College in India with an accreditation from both NAAC as well as NBA. The faculty at BVUCOE boasts of highly qualified academicians, a quality that is further emphasized by the fact that 15 of them are presently pursuing their Ph.D. degree.

BVUCOE has been ranked 29th amongst the Top 50 Technical Schools of India in survey conducted by DATAQUEST-IDC. We have enjoyed a ranking in this list for the last 4 years. Research is of utmost importance in all our programs. A total of 113 research papers were published in the academic year 2007-2008.

Currently we have 12 ongoing research projects. The infrastructure of BVUCOE is state-of-the-art with 62 classrooms, 59 laboratories and a well-stocked library that currently holds 27,130 titles. The college has an international presence with MoUs signed with the North Carolina A&T State University (Greensboro, USA), University of Venice (Italy), Actel Corporation (USA). Corporate interaction is also inculcated in our programs through our association with Oracle India Ltd., Infosys Ltd. and Tata Consultancy Services.

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SALIENT FEATURESIndia is the fourth largest telecom market in Asia. The Indian telecom market is eighth largest in the world and second largest among emerging economies. The industry has witnessed an explosive growth in the field of electronics in the recent years. India has institutions that are deeply rooted in the principles of democracy and Justice. This ensures a transparent, predictable and secure environment for development of electronics field. The National Telecom policy 1999 (NT 99) targets tele-density at 15 per cent by 2010. The Indian market presents a unique opportunity as compared to developed countries, hence increasing the attractiveness of the Indian market. In the engineering field, electronics branch is one of the most significant as it reflects today's changing technology. It has become a must-know field as it forms the base for all other engineering branches. To comply with the present day requirements & keep pace with the recent technology, the course is designed to provide the students with technical know-how. The department therefore aims to ensure that the students excel in hardware as well as software technologies. The department has started post-graduate course leading to M.E. Electronics (VLSI) which focuses on the theory, design, implementation and application of this upcoming technology in technical context. The department has received a grant of Rs. 45.5 Lakhs from UGC under their innovative program scheme to start the Biomedical Engineering course with the intake capacity of 40 students. College has established collaboration with ACTEL Corporation, USA. Under this collaboration an advanced VLSI laboratory is established jointly. For this laboratory, ACTEL Corporation has provided software and hardware worth $3, 56,000 (Approx. 1.5 Crores) The department has well-qualified and experienced staff with 6 Professors, 2 Assistant-Professors and 11 lecturers. Most of them have completed post-graduation and some are pursuing. MAJOR GROUPS / AREAS Image Processing, Digital Signal Processing, Very Large Scale Integration, Biomedical Engineering, Fiber optic sensors EXPERTISE IN RESEARCH AND CONSULTANCY Electronics engineering department received a grant of 6.5 lakhs from All India Council for Technical Education (AICTE), New Delhi for development of DSP laboratory under MODROB scheme. Research has been carried out in the field of signal

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processing, control and communication with credit of five research papers published at national level. Three staff members are pursuing PhD work in the field of signal processing and communication. The department has received the grant of Rs. 70, 000 from Institute of Engineers, Pune for various research projects undertaken by students. MAJOR EQUIPMENT Mixed Signal Oscilloscope, Vector Voltmeter, Digital Storage Oscilloscope, Wobbuloscope, Powerscope, Allen-Bradley PLC with RSLogix500 software, Ratio Control Unit Trainer, ICAP 4, DSP Processor Training Boards & EVMs, X-ray machine (Demo type), Ultrasound scanner (Demo type), Blood cell counter, EEG hardware and software, Spectrophotometer (Demo type), Gas chromatography system (Demo type), ECG stress test software with thread mill SOFTWARE ORCAD, XLINX 3.1, Altera, MATLAB, LabView, ALDEC, Code Composer Studio, Libero LABORATORIES ACTEL-VLSI Lab, Microelectronics Laboratory, Digital Electronics Laboratory, Network and Lines Laboratory, Electric Circuit Design and Project Laboratory, Communication Laboratory, Microprocessor and Microcontroller Laboratory, Computer Networking Laboratory, DSP and Image Processing Laboratory, Electronic Instrumentation and Measurements, Power Electronics Laboratory, Instrumentation and Control Laboratory, Biomedical Laboratory, Computer Lab

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STRUCTURE & EXAMINATION PATTERNB. Tech. - Electronics Semester VIISubject Code Subject Teaching Scheme (Hrs.) Hrs/Week L 04 04 04 04 04 04 24 P 02 02 02 02 02 10 Theory 80 80 80 80 80 80 480

Total Duration : 36 Hrs/Week Total Marks : 875Examination Scheme (Marks) Unit Test TW & Pr TW & Or 20 20 20 20 20 20 120 50 50 50 150 50 25 50 125 Total (Marks) 150 100 175 100 150 150 50 875

K50401 Electronic System Design K50402 K50403 K50404 Wireless Networks Programmable Industrial Controllers Computer Networks

K50405 VLSI Design Technology K50406 K50407 Elective - I Project-Stage I Total

Teaching Scheme Hrs/week Lectures Practical 24 10

Theory 480

Examination Scheme (Marks) Test T. W. & Pr T. W. & Or. 120 150 125

Total 875

SemesterVIIISubject Code K50408 K50409 K50410 K50411 K50412 Subject Teaching Scheme (Hrs) Hrs/Week L Biomedical Engineering Fuzzy Logic & Neural Network Elective II Project-Stage - IIIn plant Training

Total Duration : 25 Hrs/Week Total Marks : 625Examination Scheme (Marks) Theory 80 80 80 240 Unit Test 20 20 20 60 TW & Pr 50 50 TW & Or 25 50 150 50 275 125 150 150 150 50 625 Total (Marks)

P 02 02 02 04 10

05 05 05 15

Total

Teaching Scheme Practical Lectures 10 15

Theory 240

Examination Scheme Test T. W. & Pr 60 50

T. W. & Or. 275

Total 625

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STRUCTURE & EXAMINATION PATTERNB. Tech. - (ELECTRONICS ENGINEERING)In plant Training: Every student has to undergo training of company in December & January for one and half month to get the exposure and practical experience. He has to submit the detailed report of the training, on the basis of which the term work and oral marks should be awarded. LIST OF ELECTIVES Class :- B Tech (Electronics) - Semester - VII Elective - I? DSP Processors ? Processing Image ? Advanced Power Electronics ? VLSI Based Wireless Network ? Opto Electronics

Project Stage-I? Identification Problem? Information Gathering ? Feasibility Study ? Synopsis ? System Analysis ? Requirement

Analysis

Note. Students should complete In plant Training after Semester VII for a period of six weeks. Evaluation will be done in VIII Semester.

Elective - II? Advanced Computer Programming? ? ? ?

Speech Processing

Advanced Communication System

Management of Telecommunication Network

Software Radio

Project Stage-II? design System ? Testing ? Documentation System ? Report Project

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RULES FOR CONDUCTING TESTSMode of the test ? semester for each subject three tests shall be conducted. The schedule for In each the same will be declared at the commencement of academic year in the academic calendar. ? shall carry 20 marks. Each test ? University examination pattern has given weightage of 20 marks for the tests. ? To calculate these marks following procedure is followed: i) Out of the three tests conducted during the semester, the marks of only two tests in which the candidate has shown his/her best performance shall be considered, to decide the provisional marks in each subject. ii) Average marks obtained in two tests in which students have performed well, shall be considered as provisional marks obtained by the student in the tests. iii) If the candidate appears only for two tests conducted during the semester, he/ she will not be given benefit of the best performance in the tests. iv) If the candidate appears only for one test conducted during the semester, to calculate the marks obtained in the tests it will be considered that the candidate has got 0 (zero) marks in other tests. v) The provisional marks obtained by the candidate in class tests should reflect as proportional to theory marks. In cases of disparity of more than 15% it will be scaled down accordingly; These marks will be final marks obtained by the student. No scaling up is permitted. vi) If the candidate is absent for theory examination or fails in theory examination his final marks for tests of that subject will not be declared. After the candidate clears the theory, the provisional marks will be finalized as above. ? Paper Pattern for Tests i) All questions will be compulsory with weightage as following Question 1 7 marks Question 2 7 marks Question 3 6 Marks ii) There will not be any sub-questions. ? For granting the term it is mandatory to appear for all the three tests conducted in each semester. ? Roll numbers allotted to the students shall be the examination numbers for the tests.

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SEMESTER - VII

ELECTRONICS-Semester VII

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K50401: ELECTRONIC SYSTEM DESIGNTEACHING SCHEME Lectures : 04 Hrs/week Practical : 02 Hrs/week EXAMINATION SCHEME Theory : 80 Marks Duration : 03 Hours Unit Test : 20 Marks T. W. & Or. : 50 Marks

(08 Hours) Unit-I System Testing and Standards: System reliability and final testing for quality standards, concept of MTTF, MTBF, AQL and accelerated testing, introduction to various international standards like IEEE, FCC, IEC, BS & ISO standards. Unit-II RTL: (08 Hours) Notation, construction of data unit, timing, sequencing of control, combinational logic & conditional transfer, design example, active filter design, biquad topology realization, gyrator, FDNR. Unit-III (08 Hours) DSP based system design: Representation of stationary random process, rational power spectra, relationship between filter parameters and autocorrelation sequence, forward and backward linear prediction, solution of normal equations, properties of LP error filters, AR lattice and ARMA lattice ladder filters, Wiener filters, MA, AR, ARMA models, least square filter design for prediction and deconvolution solution for least square estimation. Unit-IV (08 Hours) Microcontroller: Uses of microcontroller in programmable system design, concept of emulator, design example like lift controller. Unit-V (08 Hours) Testing & Verification of VLSI Design: Need for testing, the problems of digital & analog testing, design for test,

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test economics and product quality, fault modeling, logic and fault simulation, faults in digital circuits: general introduction, controllability & observability, fault models, stuck at fault, bridging faults, intermittent faults. (08 Hours) Unit-VI Use of Software in Electronics System Design: Software design methods, top-down and bottom up approaches, ASM, FSM methods of design to use assembly and high level language for software development, use of assemblers and cross compilers in developing product software, software testing using simulators, in-circuit emulators, complete system design practice of electronics system at product level. List of Practical Design and implementation using VLSI and SPICE based softwares and/or hardwares wherever necessary.? & implementation of any combinational logic circuit (like code converter, Design

adder subtractor, parity generator etc).? & implementation of memory in FPGA. Design ? of complete data acquisition system. Design ? of serial communication system. Design ? & implementation DSP algorithm Design ? & implementation DSP filter Design ? microcontroller based system, for example, lift controller. Design ? Complete system design of electronic system at product level.

Text Books / References? Daryanani, Active Filter Design & Synthesis, John wiley. Govind ? Desgin with Microcontroller, McGraw hill. Pitman, ? Advanced Digital Signal Processing, Prentice Hall International. Proakis,


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? Jhon Wakerley, Digital design, Prentice Hall International Publication. ? D. Agrawal, Michel L. Bushnell, Essentials of Electronic Testing for Digital Viswani

Memories & Mixed Signal VLSI Circuit, Kluwer Academic Publication.? B.S. Sonde, Introduction to System Design Using Integrated Circuits, Wiley.

Syllabus for Unit Test:

Unit Test 1 Unit Test 2 Unit Test 3

Unit I & II Unit III & IV Unit V & VI

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K50402: WIRELESS NETWORKSTEACHING SCHEME Lectures : 04 Hrs/week EXAMINATION SCHEME Theory : 80 Marks Duration : 03 Hours Unit Test : 20 Marks

(08 Hours) Unit-I Overview of Wireless Networks: Introduction, Different generations of wireless networks, Radio propagation mechanisms, path loss modeling and signal coverage, effects of multipath and Doppler, Channel measurement and modeling techniques, simulation of radio channel. Unit-II (08 Hours) Network Planning and Wireless Network Operation: Introduction, Wireless network topologies, Cellular topology, Cell fundamentals, Signal to interference ratio calculation, Capacity expansion techniques, Network planning for CDMA systems, Mobility management, Radio resources and power management, Security in wireless networks. Unit-III (08 Hours) GSM and TDMA Technology: Introduction, what is GSM, mobile radio channel characteristics, diversity techniques, Mechanisms to support a mobile infrastructure, GSM architecture (BSC, MSC, Gateway) Unit-IV (08 Hours) CDMA Technology: Development of CDMA wireless communication, review of digital transmission theory, fundamentals of spread spectrum (SS) techniques, Pseudo-random code sequences for SS techniques, time synchronization of SS systems, CDMA principles, code division multiple access principles, multi user detection in CDMA cellular radio.


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(08 Hours) Unit-V Mobile data networks and wireless LAN's: Introduction, data oriented CDPD networks, GPRS and higher data rates, short messaging service in GSM, mobile application protocols, Historical overview of the LAN industry, evolution of the WLAN industry, new interest from military and service providers, a new explosion of market and technology. Unit-VI (08 Hours) Wireless ATM and HIPER LAN and Ad Hoc networking and WPAN: ATM Technology, Comparison of Transfer modes- ATM vs IP, Wireless Communication using ATM, HYPERLAN Type1 Standard, The Bluetooth Standard, W3C and WAP, Home RF, Performance Evaluation Techniques-Wireless ATM. Text Books/ References ? Pahlavan, Prashant Krishnamurthy, Principles of Wireless Networks, Kaveh Pearson Education Publication. ? Garg, Wireless Networks, Pearson Education Publication. Vijay K ? Theodore S Rappaport, Wireless Communications: Principles and Practice, Prentice Hall Communication Series ? Abu-Rgheff, Introduction to CDMA wireless Communication, ELSEVIER Mosa Ali Publication.?Tse, Pramod Vishwanathan, g Fundamentals of Wireless Communication David

PHI? Oestges, MIMO Wireless Communications:From Real-World Propagation, Claude

Althos Publishing. Syllabus for Unit Test: Unit Test 1 Unit Test 2 Unit Test 3 Unit I & II Unit III & IV Unit V & VI

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K50403: PROGRAMMABLE INDUSTRIAL CONTROLLERSTEACHING SCHEME Lectures : 04 Hrs/week Practical : 02 Hrs/week EXAMINATION SCHEME Theory : 80 Marks Duration : 03 Hours Unit Test : 20 Marks TW & Pr. : 50 Marks TW & Or. : 25 Marks (08 Hours)

Unit -I Introduction to PLC:

Definition, conventional electrical diagrams, characteristic functions of PLC, Block diagram of PLC, Input/ Output section, Processor Section, Multitasking, Languages, Ladder diagram, Ladder language, PLC vs. PC. Fixed (unitary) PLC, modular PLC. Unit II (08 Hours) Basic PLC Programming: Bit logic instruction, programming ON/OFF inputs, relation of digital gate logic to contact/coil Logic, creating ladder diagrams from process control description Register basics, Timer types, PLC counter, examples of timer and counter functions Industrial applications. Unit-III (08 Hours) Intermediate Functions: Arithmetic functions, comparison function, PLC number conversion functions, addressing types, logical functions, special mathematical instructions, data handling instructions, Program Flow instructions, PID instruction, advanced instructions like sequencers, high-speed counters. Unit-IV (06 Hours) PLC Input Output Modules and Power Supply: Classification of I/O modules, I/O systems, sinking & sourcing, discrete input module, Discrete Output module, Specifications, advantages, disadvantages of Output module, Analog Input and output module, Special input modules.


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(10 Hours) Unit-V Industrial Communication & Networking: Types of communication interface, types of networking channels, software protocol, network Topology, OS1 model, industrial network, bus network, Device bus network Vs Process bus Network, CAN protocol, device net, control net, AS-I interface, foundation field bus, Profibus. Unit-VI (08 Hours) Industrial Automation: Introduction, utility of automation, general structure of automated process examples & Applications, selection of PLC, SCADA. List of Experiments: Application examples using timers, counters. ? ? Application examples using math instructions. ? Application examples using compare instructions. ? Application examples using data handling, program flow instructions. ? Application specific instructions like shift and sequencer. ? Application examples using high speed counter, FIFO instructions. ? PLC application for analog configuration. ? Application of PID using PLC. Text Books/ References? J.W Webb, Programmable Logic Controllers, Mac Millan Publications. ? Dunning, Introduction To Programmable Logic Controllers, Thomson Gray

Learning.? C.D Johnson, Process Control Instrumentation Technology, Prentice Hall

Publication.? Madhuchhande Mitra, Programmable Logic Controllers and Industrial

Automation: An Introduction, Penram International Publishing (India) Pvt. Ltd.? User manual of Allen-Bradley PLC. ? User manual of Beckhoff PLC.

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Syllabus for Unit Test: Unit Test 1 Unit Test 2 Unit Test 3 Unit I & II Unit III & IV Unit V & VI


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K50404: COMPUTER NETWORKSTEACHING SCHEME Lectures : 04 Hrs/week EXAMINATION SCHEME : 80 Marks Theory Duration : 03 Hours Unit Test : 20 Marks

Unit -I Introduction to Computer Networks and Protocol Implementation:

(08 Hours)

Problem: Building a Network, Requirements, Network Architecture, Problem: Protocols Have to be Implemented, Object-Based Protocol Implementation, Protocols and Sessions, Messages, Events. Unit II (08 Hours) Direct Link Networks Problem: Physically Connecting Hosts, Hardware Building Blocks, Encoding (NRZ, NRZI, Manchester, 4B/5B), Framing, Error Detection, Reliable Transmission, CSMA/CD (Ethernet), Token Rings (FDDI), Network Adaptors. Unit-III (08 Hours) Packet Switching & Internetworking; Problem: Not All Machines Are Directly Connected, Switching and Forwarding, Routing, Cell Switching (ATM), Switching Hardware, Bridges and Extended LANs, Simple internetworking (IP), Global Internet, Next Generation IP, Multicast, Host Names (DNS) Unit-IV (08 Hours) End-to-End Protocols and End-to-End Data: Problem: Getting Processes to Communicate, Simple De-multiplexer (UDP), Reliable Byte-Stream (TCP), Remote Procedure Call, Application Programming Interface, Performance, Problem: What do we do with the data. Presentation/Formatting, Data Compression, Security.

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(08 Hours) Unit-V Congestion Control Problem: Allocating Resources, Issues, Queuing Disciplines, TCP Congestion Control, Congestion Avoidance Mechanisms, Virtual Clock. Unit-VI (08 Hours) High-Speed Networking Problem: What Breaks When We Go Faster Latency Issues, Throughout Issues, Integrated Services, SNMP Overview, MIB Variables, Realizing the Future. Text Books/ References? Peterson, Davie, Computer Networks: A System Approach, 3rd Edition, Morgan

Kaufmann Publishers? Tanenbaum, Computer Networks, 3rd and 4th Edition, Prentice Hall Andrew

Publication.? Behrouz A. Forouzan, Data Communications and Networking, 4th Edition,

McGraw Hill Publication.? D. Comer, Computer Networks and Internet TCP/IP. ? Stallings, Data and Computer Communications, 7th Edition, Prentice Hall. William ? Stallings, Computer Networks, Prentice Hall. William ? & Ross, Computer Networking: A Top-Down Approach Featuring the Kurose

Internet, Addison Wesley.



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K50405: VLSI DESIGN TECHNOLOGYTEACHING SCHEME Lectures : 04 Hrs/week Practicals : 02 Hrs/week EXAMINATION SCHEME Theory : 80 Marks Duration : 03 Hours Unit Test : 20 Marks T. W. & Pr. : 50 Marks

(08 Hours) Unit -I VHDL Modeling and Design Flow: Introduction to VLSI design flow (with reference to an EDA tool), sequential, data flow and structural modeling, functions, procedures, attributes, test benches, synthesizable and non synthesizable statements, packages and configurations, VHDL modeling. Unit II (08 Hours) FSM and sequential logic Principles: Sequential circuits, Meta stability synchronization, design of finite state machines and state minimization, Modeling of FSM-Mealy and Moore machines, FSM case studies. For example - traffic light control, lift control, UART. Unit-III Programmable logic devices: CPLD : Introduction, study of architecture. FPGA : Introduction, study of architecture. (08 Hours)

Unit-IV (08 Hours) System on chip: One, two phase clock, clock distributions, power distribution, power optimization, SRC and DRC, design validation, global routing, switch box routing, off chip connections, I/O architectures, wire parasites, EMI immune design. Unit-V CMOS VLSI: (08 Hours) CMOS parasites, equivalent circuit, body effect, technology scaling,

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parameter, detail study of inverter characteristics, power dissipation, power delay product, CMOS combinational logic design and W/L calculations, transmission gates, introduction to CMOS layout. Unit-VI (08 Hours) CMOS Circuits and Logic Design: CMOS logic gate design, physical design of simple logic gates, CMOS logic structures, clocking strategies, system design strategies, design methods, CMOS system design example. List of Practical ? 8:1 multiplexer/Demultiplexer/Decoder ?and Comparator Adder ? Flip Flops ? Shift registers ? Counters ? Parity generator and checker ? Bidirectional buffer ? Implementation of RAM / FIFO ? Temperature sensing using ADC ? system design example as a case study CMOS Note: Tools to be used i) EDA tool ii) VLSI trainers with FPGA and CPLD. Text Books / References? John Wakerly, Digital Design, Principles and Practices, Prentice Hall Publication ? E. Weste and Kamran Eshraghain, Principles of CMOS VLSI Deign, Pearson Neil H.

Education Publication.? Wolf, Modern VLSI Design, Prentice Hall Publication. Wayne ? Perry, VHDL, Pearson Education Publication. Douglas ? Roth, Digital System Design using VHDL, Tata McGraw Hill. Charles ? Wolf, FPGA Based System Design, Prentice Hall Wayne


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K50406 : ELECTIVE-I: DSP PROCESSORSTEACHING SCHEME Lectures : 04 Hrs/week Practicals : 02 Hrs/week EXAMINATION SCHEME Theory : 80 Marks Duration : 03 Hours Unit Test : 20 Marks T. W. & Pr. : 50 Marks

(06 Hours) Unit -I DSP Processor ADSP 21xx & 320 Cxx family: Types of architectures, ADSP 21xx & 320 Cxx family, internal architecture, features, system interface, overview of instruction set, development tools. Unit II (10 Hours) Case Study: DSP Processor ADSP 2181: Features of ADSP 2181, architecture, detailed instruction setcomputational & data move instructions, multifunction instructions, program flow control instructions, data structures, assembler directives, simulator, analysis of finite word length effects. Unit-III (08 Hours) Implementation of DSP Algorithms on DSP Processors: Development and running an assembly language programs on Discrete Fourier Transforms (DFT), Fast Fourier Transforms (FFT), Finite Impulse Response (FIR) & Impulse Response (IIR) Filters. Unit-IV (08 Hours) Linear Prediction: Forward and backward linear prediction, solution of normal equations, properties of Linear Prediction (LP) Filters, AR/ARMA filters and applications. Unit-V (08 Hours) Power Spectrum Estimation : Computation of energy density spectrum, auto correlation, cross correlation, parametric and non parametric methods for computation of power spectrum.ELECTRONICS-Semester VII

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(08 Hours) Unit-VI Multirate DSP : Decimation and interpolation, sampling rate conversion, applications like design of phase shifters, interfacing of digital systems with different sampling rates, implementation of narrow band low pass filter. List of Experiments: Assignments on the following topics should be conducted in C & assembly language of DSP processors. (Use ADSP 21xx and TMS 320Cxx processor kits) ? Implementation of different equations. ? Implementation of FIR filter. ? FFT algorithms. ? Calculation of LP coefficients. ? Implementation of AR filters. ? Implementation of ARMA filters. ? Calculation of power spectrum using any of the parametric or nonparameteric methods. ? Implementation of narrow band low pass filter. Text Books / References? J. G. Prokis, Digital Signal Processing , PHI Publication ? M.Bhaskar, Digital Signal Processors Architecture, Programming & Applications

Venkataramani, MGH Publication.? User manual of ADSP 21xx & 2181 processors. ? J. G. Proakis, Advanced Digital Signal Processing , PHI ? Oppenheim & Schafer, Discrete Time Signal Processing, PHI ? Mitra, Digital Signal Processing, Tata McGraw Hill Sanjit K.


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K50406: ELECTIVE-I: IMAGE PROCESSINGTEACHING SCHEME Lectures : 04Hrs/week Practical : 02Hrs/week EXAMINATION SCHEME Theory : 80 Marks Duration : 03 Hours Unit Test : 20 Marks T. W. & Pr. : 50 Marks

Unit -I Introduction:

(08 Hours)

Digital image representation, Elements of Digital Image Processing System, Elements of Visual perception & image perception, Light Luminance, Brightness, Contrast, Monochrome vision model, Colour representation, Sampling and quantization, Colour vision model. Unit II (08 Hours) Image Transforms: One and two dimensional DFT, The discrete cosine transform, The KL transform, Hough & Hadamard transform, Histogram, mean, standard deviation, profile etc. Unit-III (08 Hours) Image Enhancement : Spatial and frequency domain methods, Point operations, Contrast stretching, Bit extraction, Histogram equalization, Modification, Local enhancement, Image smoothing, Spatial operations, Filtering, Multispectral, Image enhancement, Intensity & Log ratios, Principal components, Colour image enhancement, Edge detection, Spatial feature & boundary extraction, Boundary representation, Region representation, Structure, Shape, Features, Texture, Scene detection image segmentation. Unit-IV (08 Hours) Image Coding : Pixel coding PCM, Entropy coding, Run length coding, Bit plane encoding, Predictive techniques, DPCM, Adaptive technique, JPEG & MPEG standards.ELECTRONICS-Semester VII

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(08 Hours) Unit-V Image Restoration & Segmentation: Inverse and wiener filtering, Removal of blurr caused by motion, Max entropy restoration, Algebraic approach to restoration, Geometric transfer, Motion spatial transformation. Unit-VI (08 Hours) Applications of IP in Industry: Automatic inspection of industry parts, Character recognition, Face recognition, Weather forecast, Medical applications such as ECG, EEG, MRI etc. List of Experiments: ? of an image in bmp, tiff, gif format. Display ? Studying & plotting different statistical properties of images- Histogram, Mean, Standard deviation Profile etc. ? Histogram equalization & modification, Contrast stretching. ? Transformations: RGB, YIQ. Colour ? DFT/ DCT/ wavelet transform of an image. N point ? smoothening using different filters. Image ? Edge detection using Sobel, Krish, Prewitt operators. ? LOG operator. ? segmentation. Image ? Huffman/ Run Length/ Entropy coding. All the above assignments should be implemented in C & the results should be compared with standard I.P. software. Text Books/ References? K.Pratt, Digital Image Processing, Wiley William ? Introduction to Digital Image Processing, PHI. A.K. Jain, ? Gonzalvez & Woods, Digital Image Processing, Addison Weseley Publication ? Digital Image Processing. Strandberg Publication Niblack, ? S. Jayaraman, S. Esakkiranjan, T. Veerakumar, Digital Image Processing, TMH

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? Phillips, Image Processing in C, Analysing & Enhancing Digital Image, Dwayane

BPB Publication.



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K50406: ELECTIVE-I: ADVANCED POWER ELECTRONICSTEACHING SCHEME Lectures : 04Hrs/week Practical : 02Hrs/week EXAMINATION SCHEME Theory : 80 Marks Duration : 03 Hours Unit Test : 20 Marks T. W. & Pr. : 50 Marks

(08 Hours) Unit -I DC Motor Drives: Converter and chopper based DC motor drives, comparison of chopper and converter drives, various drive features, power factor improvement techniques in LCC drives & their comparison. Unit II (08 Hours) Induction Motor Drives: Standard speed control techniques like stator voltage control and rotor resistance control, slip power recovery, effect on motor performance, advantages and limitations, general applications. frequency controlled drives, speed control using VVVF & VCVF drives, principle of operations, different circuits applications, advantages and limitation in comparison with other schemes, effect on motor performance. Unit-III (08 Hours) Vector Controlled Induction Motor & Induction Motor Starters: Vector Control of Induction Motors: Principle of operation, circuit configurations, advantages and limitations, comparison with VVVF drives, typical applications, induction motor starter using voltage control techniques, different configuration and their limitations, effect on motor performance, starter applications.

Unit-IV (08 Hours) Synchronous Motor & Brushless DC Motor Drives: Synchronous Motor Drives: Principle of operation, speed control techniques, different drives circuits, comparison with induction motor drives, brushless DC Motor Drives: Principle of operation, drive circuits and its applications.

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(08 Hours) Unit-V Stepper Motor Drive & Traction Drives: Drive circuit for hybrid, variable reluctance stepper motors, different modes of operation like half step and full step, microstepping in stepper motors, detailed study of microprocessor based implementation. Traction Drives: drives considerations, AC & DC motor drives. Unit-VI (08 Hours) Microprocessor Based Control & Applications: Study of principle of microprocessor based control of motor drives, selection of suitable processor, interface devices, design considerations, application of motor drives in industries, typical applications in steel, textile, sugar, chemical industries. List of Experiments:? Speed control of DC motor using single phase half controlled bridge.

OR? Speed control of DC motor using three phase fully controlled bridge. ? Speed control of DC motor using three phase half controlled bridge.

OR? of PF improvement techniques for DC drives. Analysis ? First quadrant chopper drive for DC motors.

OR? Speed control of induction motor using startor voltage control. ? vector control system for speed control of induction motor. Speed of

OR?control of three phase induction motor using V/F technique by three phase Speed

inverters.? Speed control of three phase induction motor using static Kramer or Scherbius drives.

OR? Microprocessor based speed control of three phase induction motors.


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? Reduction of harmonics in induction motor drives using PWM inverters.

OR? single phase induction motor drive. Study of ? Speed control of stepper motors.

OR? Four quadrant chopper drive for DC motor. ? Speed control of synchronous motors.

OR?control of brushless DC motor. Speed

Text Books/ References? Mohan/Undeland/Robbins, Power Electronics Converter, Applications &

Design , John Wiley & Sons Publications.? , Jalnekar , Advanced Power Electronics , Technical Publications Pasalkar ? Gopal Dubey , AC Motor Drives, PHI . ? , Thyristor DC Drive , John Wiley & Sons . P.C.Sen ? C.W.Lander , Power Electronics , McGraw Hill . ? Subrahmanyam , Electrical Drives Concept & Applications, TMH . Vedam


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K50406: ELECTIVE - I: VLSI BASED WIRELESS NETWORKTEACHING SCHEME Lectures : 04 Hrs/week Practical : 02 Hrs/week EXAMINATION SCHEME Theory : 80 Marks Duration : 03 Hours Unit Test : 20 Marks T. W. & Pr. : 50 Marks

Unit -I Communication Concepts: Circuit Designer Perspective:

(08 hours)

Modulation schemes, BPSK, QPSK, MSK, wireless channels, classical channel, wireless Channel description, path loss, path loss detailed discussion, Multipath fading. Frequency Selective, envelope fading. Unit II (08 hours) Receiver Architecture: Front end design, General Design philosophy, Heterodyne and other architectures, Filter design,(BPF1),Band selection filter, image rejection filter(BPF2) channel filter(BPF3) Nonidealities and Design parameters, Nonlinearity, Noise. Unit-III (08 hours) LNA & Mixer: Wide band LNAdesign, DC Bias, Gain Frequency Response, and Noise figure. Narrowband LNA- Impedance matching. Matching the real and imaginary part, similarity between Q(Quality factor) and n(Turns ratio) LNA-core amplifier. Active Mixer:Balancing,Qualitative Description of the Gilbert mixer, passive mixer, Switching mixer. Unit-IV Modulators : (08 hours) Demodulators, FM Discriminator (incoherent) IF Detection (coherent) Baseband Detection (coherent) ADC's used in receiver, Wideband versus Narrowband A/D converters. Low pass Sigma-Delta modulators, First order modulator, High-order modulators, Bandpass Sigma-Delta modulators, comparison of low pass & Bandpass modulalators, low pass to


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Bandpass modulalators conversion, Implementation of Bandpass sigma Delta Modulators.

(08 Hours) Unit-V Frequency Synthesizer: PL based Frequency Synthesizer, Phase Detector, Charge pump, phase frequency detector,charge pump.VCO Introduction: categorization, Review of positive feedback Theory. LC oscillators topologies, tuning, phase noise, Definition interpretation phase noise of VCO. Unit-VI Loop Filter :

(08 Hours) Basic equation & Definitions, First, Second & Higher order filters, Loop filter design approaches, Phase noise based approach & spur based approach, Complete synthesizer design example (DECT application) specifications, Loop filter.

List of Experiments: Study P ? e versus Ea / Na curves for BPSK and QPSK.? For DECT standard will worst-case reception analyze the SNR at the input of the

demodulator.? a study of the non-linear behavior of receiver front end. Carryout ? Time domain graphical representations, using a sinc pulse superimposed on a carrier,

multipath fading causes fluctuations in an envelope's amplitude as well as introduces distortion in the envelope. ? typical wideband LNA, to include NF & main device parameters. Study a ? different LNA architectures according to the following table:Compare Wideband 1-Stage CS; Common Source Gain NF Matching? Study Mixer design, will regard to power, IIP3 & Vdd. Assume

Wideband CS- Cascade

Narrow band CS; Inductor Degenerated

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a) Typical mixer V-I converter graph b) W/2 of 50m/0.6m for M&M2 c) Vdd applied at 1.9GH3? a complete design of a low pass sigma delta modulator using the design steps Present

explained.?

Text Books/ References Pearson Education ? Ed Wai-Ken Chen, The VLSI Hand Book, Boca Raton: CRC Press ? A Pucknell and Kamaran Eshragian, Basic VLSI Design, 3rd Edition, Douglas PHI,1994. ? & M.I.Elamstry, LowPower Digital VLSI Design, Circuits and Systems, Bellaour Kluwer Academic Publishers, 1996. ? & M.Pedram, Logic synthesis for LowPower VLSI Designs, Kluwer S.Imam Academic publishers, 1998. ? B.G.K.Yeap, Practical Low Power Digital VLSI Design, Kluwer Academic Publishers, 1998. Syllabus for Unit Test: Unit Test 1 Unit Test 2 Unit Test 3 Unit I & II Unit III & IV Unit V & VI? Bosco Leung, VLSI Design Wireless Communication,


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K50406: ELECTIVE-I : OPTOELECTRONICSTEACHING SCHEME Lectures : 04 Hrs/week Practical : 02 Hrs/week EXAMINATION SCHEME Theory : 80 Marks Duration : 03 Hours Unit Test : 20 Marks T. W. & Pr. : 50 Marks

Unit -I (08 Hours) Optical Sources: Principles of LEDs, DH LEDs, LED structures, Principles of lasers, Laser Diodes, Injection laser diodes, their characteristics and method of modulation, Solid state lasers, Gas lasers. Unit II (08 Hours) Optical Detectors: Principles of Photo detection, Absorption, PN photodiodes, PIN photodiodes, APDs, Quantum efficiency, Responsivity, Response time, Characteristics of detectors, Photomultipliers, IR detectors. Unit-III (08 Hours) Optoisolators and Display: Parameters, Different isolation techniques, Applications of optoisolators. 7Segment LED displays, Bar graph displays, Alphanumeric displays, LCDs, Holographic techniques. Unit-IV (08 Hours) Fiber Optic Techniques: Theory of optical propagation, Numerical Aperture, Cone of Acceptance, Single and Multimode, Step index and Graded index fibers, Transmission characteristics of fibers, Attenuation, Dispersion, Bend losses, Modal noise, Polarization, Bandwidth and their Measurement techniques. Unit-V (08 Hours) Design Considerations of optical link: Transmitter circuits, LED and Laser drive circuits, Power launching, Selection of Fiber Coupling and Splicing of fiber, Selection of detector, Type of optical receiver and its design, Optical Power budget, Rise time budget. 32BHARATI VIDYAPEETH UNIVERSITY, PUNE

(08 Hours) Unit-VI Digital & Analog Transmission systems: Modulation and detection technologies for analog and digital transmission, Multiplexing, Long Haul links, Short haul links, Optical amplifiers, LAN, WAN, MAN, Multichannel communication systems, Applications in different areas Public network, Civil, Consumer, Military and Industrial- Submarine. List of Experiments: Light Intensity Measurements. ? Optoisolator characteristics. ? response of optoisolator. Switching ? Measurement of wavelength of laser. ? Divergence angle measurement of laser. ? Digital data transmission through optical fiber. ? different displays. Study of ? Losses measurements in optical fiber.?

Text Books/ References? D.C. Agrawal, Fiber Optic Communication, TMH . ? Optical Engineering, Dhanpat Rai Biswas, ? Gerd Keiser, Fiber Optic Communication, TMH. ? John Senior, Optical Fiber Communication, PHI. ? K. Thyagarajan & A. Ghatak, Fibre Optic Essentials, Wiley & Sons. ? A. Ghatak, and K. Thyagarajan, Introduction to Fiber Optics, Cambridge University

Press. Syllabus for Unit Test: Unit Test 1 Unit Test 2 Unit Test 3 Unit I & II Unit III & IV Unit V & VI


33

SEMESTER - VIII

34


K50408: BIOMEDICAL ENGINEERINGTEACHING SCHEME Lectures : 05 Hrs/week Practical : 02 Hrs/week EXAMINATION SCHEME Theory : 80 Marks Duration : 03 Hours Unit Test : 20 Marks T. W. & Or. : 25 Marks

Unit -I (08 Hours) Human body & details of Respiratory systems and its measurements: Introduction, cell structure, overview of different systems in the body. Human respiratory system, Respiration & measurement of pulmonary function. Respiratory system measurements, respiratory transducers & instruments. Unit II (08 Hours) Electrodes, Sensors & Electrocardiograph: Signal acquisition, transduction, different types of electrodes & sensors. Bioelectric amplifiers. Electrical conduction in heart, ECG waveforms, lead systems, ECG machine. Unit-III (08 Hours) Blood Pressure & Other Cardiovascular Devices & Measurements: B.P measurements, different types, systolic, diastolic & mean detector circuits. Blood flow measurement, Phonocardiograph, Vector cardiograph, Pacemakers & Defibrillators. Unit-IV (08 Hours) Intensive & Coronary Care Unit: ICU/ICCU equipments, Bedside Monitors, Central Monitoring Consoles. Unit-V (08 Hours) Clinical Instrumentation: Blood, Blood test, Colorimeter, Flamephotometer, Spectrophotometer, Blood cell counter, PH/ Blood gas analyzers, Chromatograph, Autoanalysers, Haemodialysis machine.


35

Unit-VI (08 Hours) Electrosurgical generators & patient safety considerations: Electrosurgical machines, Electro surgery, Safety & testing of ESIL. Grounding & shielding techniques. LIST OF EXEPERIMENTS: ? of Blood Pressure measuring techniques (digital & analog) Study ? of ECG waveform & Heart Rate measurement using ECG machine Study ? of phonocardiograph & Heart Rate measurement. Study ? Detection of Apnea and Tychpnea using respiration rate monitor and Respiration Simulator. ? of Blood Gas Analyzer. Study ? of Spectrophotometer Study ? of ICU Study ? & Testing of ECG amplifier Design ? of Pacemaker Study ? of Defibrillator. Study Text Books/ References J.M Brown, Introduction to Biomedical Equipment Technology, Pearson Education Publication. ? Cromwell, Fred Weibell, F.P.Fceffer, Biomedical Instrumentation & Lesiee Measurement, PHI Publication.. ? R.S. Khandpur, Handbook of Biomedical Instrumentation, TMH Publication. ? J. Carr, Biomedical Equipment Use, maintenance and management, Joseph Prentice Hall. ? R. Aston, Principles of Biomedical Instrumentation & Measurement, Marwell Macmillar. ? Webster, Medical Instrumentation Application and Design, John Wiley & John G. Sons, Inc.? J.J Carr,

Syllabus for Unit Test: Unit Test 1 Unit Test 2 Unit Test 3 36 Unit I & II Unit III & IV Unit V & VI


K50409: FUZZY LOGIC AND NEURAL NETWORKTEACHING SCHEME Lectures : 05 Hrs/week Practical : 02 Hrs/week EXAMINATION SCHEME Theory : 80 Marks Duration : 03 Hours Unit Test : 20 Marks T. W. & Or. : 50 Marks

Unit -I Cuts and sets:

(08 Hours) Introduction, prepositional, Logic, Crisp sets, Fuzzy Logic, Fuzzy sets, tNorms, t-conorms, mixed fuzzy logic, Alpha cuts, distance between Fuzzy Sets.

Unit II (08 Hours) Fuzzy numbers & Fuzzy Equation: Fuzzy Number, Fuzzy Arithmetics, Interval Arithmetics, Alpha cuts and interval, Fuzzy max and min, Inequalities, Defuzification. Linear Equation (classical solution, Extension Principle Solution, Alpha-Cutand interval arithmetic solution) other fuzzy number, Fuzzy logic controller analysis, Applications: Washing machine, Vacuum cleaner. Unit-III (08 Hours) Fuzzy Relation & Neural sets: Transitive closure, Fuzzy Equivalence Relation, Fuzzy relation Equation, Fuzzy Functions, Layered, Feed forward, neural nets, Fuzzy neural nets, Genetic algorithms, fuzzy optimization, BAM- bidirectional associative memory, inputs and outputs, weights and training. Unit-IV (08 Hours) Neural Computing and Mathematical Foundations: Definition of ANN, Neural Computing Applications, ANN's, Mapping, View points, Structure view point, Learning approaches, Vector and Matrix Fundamentals, Geometry for state space, visualization, optimization, Graphics and digraphs.

ELECTRONICS-Semester VIII

37

Unit-V (08 Hours) Elementary ANN Building Blocks: Biological Neural Networks, Artificial Neural Networks, Activation Functions, Model Extensions, Linear Separability, Batch and Iterative Processing, Multi Layer Perceptron, Gradient Descent Learning, Neural network model application- Adaline and madaline. Unit-VI (08 Hours) Feed Forward Networks: Structure, delta rule, Generalized Delta rule, Architecture and Training Extension, weight Space, Error Surfaces And Search, Generalization, Non Euclidean norms, Cascade co-relation architectures. List of Experiments: ? fuzzy sets Study of ? and implement artificial neural network to compute X-OR for the two inputs Design Using feedback artificial neural network ? Implement MR-II (Madeline rule II) algorithm ? Adeline algorithm, Simulate ? Implement back projection simulator ? Implement the BAM simulator; test the BAM with two training vector ? model for washing machine. Simulink ? model for vacuum cleaner. Simulink Text Books /References: James

A. Freeman, David Skapura, Neutral Networks-Algorithms, Applications & Programming Techniques, Pearson Education.

Zimmermann H.J., Fuzzy Set Theory and Its Applications, Allied Publication Ltd.,

1996. Simon Haykin

, Neural Networks, Pearson Education.

Anderson, Introduction to Artificial Neural Networks, Prentice Hall, India. William palm, Introduction to Matlab 7 of Engineers, Tata McGraw Hill. Haykin, Neutral Networks-A Comprehensive Foundation, Prentice Hall, India. Mohan, Ranka, Elements of Artificial Neural Networks, Penram International.

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39

K50410: ELECTIVE II: ADVANCED COMPUTER PROGRAMMINGTEACHING SCHEME Lectures : 05 Hrs/week Practical : 02 Hrs/week EXAMINATION SCHEME Theory : 80 Marks Duration : 03 Hours Unit Test : 20 Marks T. W. & Pr. : 50 Marks

Unit -I (08 Hours) Object Oriented Programming: Programming fundamentals, Basic Concepts, Different Programming Paradigms, Evolution of Different Programming Languages and their Characteristics, Object-Oriented Paradigm, Objects and Classes, Data Abstraction and Encapsulation, Inheritance, Polymorphism, Dynamic Binding, Message Communication, Benefits of OOP, Applications of OOP, Java Language as an OOP Language. Unit II (08 Hours) Introduction to Java: Introduction to Java, Different Characteristics of Java, C++ and Java: Feature Comparisons, Improvement. Detailed Overview, Constants, Variables and Data Types, Operators and Expressions, Decision Making and Branching and Decision Making and Looping, Classes Objects and Methods, Arrays, Strings and Vectors, Interfaces. Unit-III Threads: (08 Hours) Packages in Java, Multithreaded Programming concepts and applications, Managing Errors and Exceptions, Managing Input/Output Files in JAVA. Unit-IV (08 Hours) HTML and Java Applets: History, W3C Standards, Standard HTML Tags for Image and Text Formatting, Tables, Lists, Frames. Introduction to Dynamic HTML. Java Applets: History, Introduction, HTML and Java Applet. Basic Applet Programming, Applets on Web. Applet Applications for Web.

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Unit-V (08 Hours) SQL and Java: Introduction to databases, Data Models, Concepts, Schema, Relational Query. Detailed Overview of SQL Language, Basic SELECT Query, WHERE Clause, ORDER BY Clause, Merging Data from Multiple Tables: INNER JOIN, INSERT Statement, UPDATE Statement, DELETE Statement and Installation of MySQL or PL SQL. Setting MySQL / PL SQL User Account. Unit-VI (08 Hours) Database Connectivity: Introduction to JDBC, JDBC Architecture, Types of JDBC drivers, Result Set, Metadata, Stored Procedure, Callable Procedure, Connection Procedure. List of Experiments: ? C++ or Java Program to demonstrate the use of OOP features. Write a ? Java Program to display pattern (Triangle, Pyramid) using different loops. Write a ? Implementation of different string functions by using switch case. ? Java Program implement multiple inheritance by using Interface. Write a ? Java Program to perform different file operations. Write a ? program to implement multithreading. Write a ? a College website containing detailed information using HTML Tags. Design ? program to implement a Java Applet. Write a ? SQL Program for implementation of DDL, DML, DCL. Write a ? Java program to demonstrate JDBC connectivity. Write a Text Books /References: Programming with Java: A Primer, 3E by E Balagurusamy, Tata Mcgraw Hill

Publishing Company. Database System Concepts, Sixth Edition by Henry Korth, Mcgraw Hill Publishing

Company. Complete Reference, Herbert Schildt, Mcgraw Hill Publishing Company. Java Java: How to Program by Deitel and Deitel.


41

Bayross, Web Enabled Commercial Applications Development Using HTML, Ivan

DHTML, JavaScript, Perl CGI, BPB Publication. Korth, Database System Concepts, MGH Publication. Bayross, Programming with SQL, Sybase Publication. Ivan


42


K50410: ELECTIVE- II: SPEECH PROCESSINGTEACHING SCHEME Lectures : 05 Hrs/week Practical : 02 Hrs/week EXAMINATION SCHEME Theory : 80 Marks Duration : 03 Hours Unit Test : 20 Marks T. W. & Pr. : 50 Marks

Unit -I (08 Hours) Speech Production & Hearing: Anatomy & physiology of speech organs, articulatory, acoustic phonetics, acoustic theory of speech production, prosody. Anatomy & physiology of ear, sound perception, speech perception, models of speech perception, vowel perception, consonant perception. Unit II (08 Hours) Speech Analysis: Short time speech analysis, time domain parameters, frequency domain parameters, LPC analysis, cepstral analysis, pitch estimation. Unit-III (08 Hours) Speech Coding: Quantization, redundancies, waveform coding, LP coding, frequency domain coders, VQ coders. Unit-IV (08 Hours) Speech Synthesis: Principles, synthesis methods, text to speech synthesis, synthesis by rule, prosody in synthesis, applications. Unit-V (08 Hours) Speech recognition: Speech recognition approach, parametric representation, evaluation of similarity of speech patterns, various models of speech recognition, Application.


43

Unit-VI (08 Hours) Speaker identification: Acoustic parameters, Similarity measures, Text-independent speaker verification, Text-prompted speaker verification, Identification, verification, and the decision threshold. List of Experiments: Short time Fourier analysis of speech Calculation of LP coefficients Estimation of Speech from STFT Implementation of VQ for Speech Elementary speech synthesis casing words Reorganization of speech using format frequencies Identification of speaker using pitch Evaluation of energy and location of vowels Cepstral analysis of speech Classification of speech depending upon its frequency contents Text Books /References: Douglars O'Shaughnessy,

Speech Communication, Hydrabad 2001.

S., Digital Speech Processing, Synthesis & Recognition. Furi Lawrence

Rabiner & Bing Hwang Juang , Fundamental of Speech Recognition, Pearson Education.

Gold & Nelson Morgan Speech and Audio Signal Processing, Wiley. Ben


44


K50410: ELECTIVE II: ADVANCED COMMUNICATION SYSTEMTEACHING SCHEME Lectures : 05 Hrs/week Practical : 02 Hrs/week EXAMINATION SCHEME Theory : 80 Marks Duration : 03 Hours Unit Test : 20 Marks T. W. & Pr. : 50 Marks

Unit -I Introduction to Telephone Signaling & Switching:

(08 Hours)

Evolution Of Telecommunication, Simple Telephone Communication, Basics Of Switching Systems, Electronic Switching System, Circuit Switching, Message Switching, Packet Switching, Switch Signaling subscriber loop, Interoffice (Common Channel Signaling, Signaling System no.7). Unit II (08 Hours) Telecommunication Traffic Engineering: Introduction, Service Level, Traffic Usage, Traffic Measurement Units, Traffic Distribution, Grade of Service, Blocking Probability: Erlang Distribution, Poisson's Distribution, Numerical on above topics. Unit-III (08 Hours) Data and Voice Integration: Demand for integration, Problems of integration, ISDN, Basic structure, and Narrowband ISDN, ISDN interfaces ISDN terminals, Non ISDN terminals, ISDN services, Packet switched data, Voice Over Frame Relay, Broadband ISDN, ATM and its interfaces, public ATM networks. Unit-IV (08 Hours) Global System for Mobile Communication: Standards For wireless Communication Systems, Access Technologies, Cellular Communications Fundamental, GSM Architecture and Interfaces, Radio Link Features in GSM system, GSM Logical Channels and Frame Structure, Speech Coding in GSM, Data services in GSM, Value Added Services, Privacy and Security in GSM.


45

Unit-V (08 Hours) Code Division Multiple Access: Spread Spectrum Systems i.e. fundamentals of orthogonal and pseudorandom codes, CDMA standards, IS-95 system architecture, Air interface, Physical and logical channels of IS-95, CDMA call processing, Soft Hand off, Security and identification, Wireless data, CDMA 2000 system. Unit-VI (08 Hours) IP Telephony: Introduction to VOIP low level protocols-TCPIP UDP, speech coding Technologies PCM,ADPCM, LPC speech codes ITU series and wireless codes Including fixed and variables rate, trans-coder technologies including: DTMF generation & detection , echo cancellation, voice activity detection and discontinuous transmission (VAD/DTX), packet loss conceal meat (PLC) IP telephony protocols H.323,H.245 control Signaling, session initiation protocol (SIP), \IEGACO & H.248,QoS. List of Experiments: understand and carryout fault finding of Pulse & Tone DTMF Telephone Trainer To carryout telephone signal switching system using EPBX Trainer. To install and configure PSTN switch configuration using T/S/T switch. To install and understand ISDN EPBX system. To transfer Voice between two computers using ISDN terminal adaptors. To transfer Data between two computers using ISDN terminal adaptor modem. To transfer Video between two computers using ISDN system. To study hardware section and carry out fault finding of Mobile Handset trainer. To carry out AT commands mobile communication using GSM trainer. To carryout GPRS Internet data transfer using GPRS Trainer. To understand 2 user CDMA trainer using DSSS technology. To carryout Internet data transfer using CDMA Trainer. To send and receive DTMF signal using DTMF Encoder and Decoder circuit. To carryout Voice Packet signal switching system-using IP Protocol Trainer. To carryout Data Packet signal switching system-using IP Protocol Trainer. To carryout Video Packet signal switching system-using IP Protocol Trainer. To Any eight experiments from the above list to be performed.

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Text Books /References: Vijay

K. Garg, Joseph E Wilkes , Principles & applications of GSM, Pearson Education.

Vijay K. Garg, IS-95 CDMA and CDMA 2000, Pearson Education Bates,

Regis J., Gregory, Donald W., Voice & Data Communication Handbook, McGraw Hill.

Dean, Tamara, Guide to Telecommunication Technology, McGraw Hill. Vijay K. Garg, Kenneth Smojik, Joseph E. Wilkes, Applications of CDMA wireless/ Personal Communications, Prentice Hall. In Tranter

William H, Rappaport, Principles of Communication Systems Simulations, Pearson Education (Artech House)



47

K50410: ELECTIVE- II: MANAGEMENT OF TELECOMMUNICATION NETWORKTEACHING SCHEME Lectures : 05 Hrs/week Practical : 02 Hrs/week EXAMINATION SCHEME Theory : 80 Marks Duration : 03 Hours Unit Test : 20 Marks T. W. & Pr. : 50 Marks

Unit -I Introduction to Telecom Networks:

(08Hours)

Type of networks, Network design issue, Data support, Design tools, Switching Technologies (circuit switching, viral switching). Unit II (08 Hours) Broad Band Telecom Networks: Integrated Service Digital Network, Frame Relay, Asynchronous Transfer Mode, Synchronous Optical Networking/Synchronous Digital Hierarchy. Unit-III (08 Hours) Broadband Access Technologies: DSL, Cables modems, WLL, Optical wireless, Leased lines, Dynamics routing. Unit-IV Routing: (08 Hours) Routing Algorithm for shortest path, Centralized routing, Distributed routing, Static routing, Dynamic routing. Unit-V (08 Hours) QQS and Reliability Issues Of Telecom Networks: Delay Jitter, Throughput, Bandwidth, Crosstalk/Interface Issue, Network Reliability and survivability issues, Network protection mechanisms. Unit-VI (08 Hours) Telecom Network Management: Telecom Network operation and maintenance, Traffic management,

48


Management of transport network, Configuration management, Fault management, Security network planning support, Network management using SNMP: Object management, management information base, Traps. List of Experiments: Switching Technologies. ISDN. ATM. WLL. Distributed routing. Network Reliability. Network protection mechanisms. Security network planning support. Text Books /References: Aaron Kershenbaumj, Telecommunication Network Design Algorithms, MGH Mischa Schwatriz, Telecommunication Network Protocols, Modeling and Analysis,

Pearson Education. Cole, Introduction to Telecommunications: Voice, Data and The Internet, Pearson

Education. Flood, Telecommunication Switching, Traffic and Networks, Pearson Education. Kundan Mishra, OSS for Telecomm Network, Springer. Lakshimi Raman, Fundamentals of Telecommunications Network Management,

IEEE.



49

K50410: ELECTIVE- II: SOFTWARE RADIOTEACHING SCHEME Lectures : 05 Hrs/week Practical : 02 Hrs/week EXAMINATION SCHEME Theory : 80 Marks Duration : 03 Hours Unit Test : 20 Marks T. W. & Pr. : 50 Marks

Unit -I Concepts:

(08 Hours)

Introduction to S/W Radio concepts, The need for S/W radio, What is S/W Radio? Characteristics, Benefits, Design principles of S/W Radio. Unit II (08 Hours) Transmitter and Receiver: Radio frequency implementation issue, The purpose of the RF front end dynamic range, RF receiver front end technologies, Importance of the components to overall performance, Transmitter Architecture & their issues, Noise & distortion in the RF chain, ADC, DAC, Distortion. Unit-III Converters: (08 Hours) A to D and D to A converters in S/W radio, Parameters for ideal data Converters, Parameters of Practical data converters, Techniques to improve data converters performance, Common ADC, DAC architectures. Unit-IV (08 Hours) Antenna Architecture: Vector channel modeling, adaptive techniques, benefits of smart antennas, structures for beam forming systems, Smart antenna algorithms. H/W implementation of smart antennas. Unit-V (08 Hours) Hardware Choice for s/w Radio : Key Hardware elements, choice of DSP processors, Choices of FPGAs, Trade off's in using FPGAs, DSPs & ASICs, Power management issues, using a combination of DSPs, FPGAs & ASICs, low cost SDR platform.

50


Unit-VI (08 Hours) Case studies in software radio : SPEAK easy Software Defined Radio for Military applications, Joint Tactical Radio System (JTRS) Software Defined Radio. List of Experiments: MATLAB simulation of a Wireless Communication System Design and Develop simulink model for ADC and DAC. Study of ADC/DAC distortion. Study of smart antennas. Design of simulated MIMO system. Implementation of communication system on DSP. Implementation of ADC-DAC on VLSI kit. Implementation of SDR communication system. Text Books /References: Jeffrey H. Reed, A Modern Approach to Radio Engineering, PEE (Edt-2002) Walter Tuttlebee, Software Defined Radio: Enabling Technologies, Wiley. Walter

Tuttlebee, Software Defined Radio: Origins, Drivers & International Perspectives, Wiley.

Walter

Tuttlebee, Software Defined Radio: Baseband technology for 3G Handsets & Base-Stations, Wiley.

Dillinger, Software Defined Radio: Architecture, Systems & Functions, Wiley M. Mitola, Software Radio Technologies: Selected Readings, Wiley J.



51

RULES REGARDING ATKT, CONTINUOUS ASSESSMENT AND AWARD OF CLASSA. T. K. T.? A candidate who is granted term for B.Tech. Semester-I will be allowed to keep

term for his/her B.Tech. Semester-II examination even if he/she appears and fails or does not appear at B.Tech. Semester-I examination.? A candidate who is granted term for B. Tech. Semester - III will be allowed to keep

term for his/her B.Tech. Semester-IV examination even if he/she appears and fails or does not appear at B.Tech. Semester-III examination.? A candidate who is granted term for B.Tech. Semester-V will be allowed to keep

term for his/her B.Tech. Semester-VI examination if he/she appear and fails or does not appear at B.Tech. Semester-V examination.? A candidate who is granted term for B.Tech. Semester-VII will be allowed to keep

term for his/her B.Tech. Semester-VIII examination if he/she appears and fails or does not appear at B.Tech. Semester-VII examination.? A student shall be allowed to keep term for the B.Tech. Semester-III course if he/she

has a backlog of not more than 3 Heads of passing out of total number of Heads of passing in theory examination at B.Tch. Semester-I & II taken together.? A student shall be allowed to keep term for the B.Tech. Semester-V of respective

course if he/she has no backlog of B.Tech Semester-I & II and he/she has a backlog of not more than 3 Heads of passing in theory examination and not more than 3 heads of passing in termwork and practical examination or termwork and oral examination.? A student shall be allowed to keep term for the B.Tech. Semester-VII course if

he/she has no backlog of B.Tech. Semester-III & IV and he/she has a backlog of not more than 3 Heads of passing in theory examination and not more than 3 Heads of passing in termwork and practical examination or termwork and oral examination.

CONTINUOUS ASSESSMENT? In respect of Term work at B.Tech. Semester-I & II, B.Tech. Semester-III & IV and

B.Tech. Semester-V & VI, target date shall be fixed for the completion of each job, project experiment or assignment as prescribed in the syllabus and the same shall be collected on the target date and assessed immediately at an affiliated college by at least one pair of the concerned teachers for the subject and the marks shall be submitted at the end of each term to the Principal of the college.

52


? Termwork and performance of Practical/Oral examination shall be assessed on the

basis of the depth of understanding of the principles involved, correctness of results and not on ornamental or colorful presentation.? For B.Tech. Semester-VII & VIII, termwork assessment will be done by external and

internal examiners jointly during the examination schedule declared by the university. The record of continuous assessment shall be made available to the examiners during Term work and practical and Term work and oral examinations. Examiner shall use this record for overall assessment of the performance of the student. Every practical/termwork assignment shall be assessed on the scale of 20 marks and weightage of 20 marks shall be distributed as follows:Sr. No. 1 2 3 Activity Timely Submission Presentation Understanding Marks 04 06 10

Marks obtained out of 20 for all assignments together will be converted on scale of marks assigned to term work of respective subject in the structure of the course.

CLASS? should be awarded to the student on the basis of aggregate marks The class

obtained together in both the semesters of the respective year by him. The award of class shall be as follows.A B C D E Aggregate 66% or more marks Aggregate 60% or more marks but less than 66% Aggregate 55% or more marks but less than 60% Aggregate 50% or more marks but less than 55% Aggregate 40% or more marks but less than 50% First Class with Distinction First Class Higher Second Class Second Class Pass Class


53

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