Body Effect and Body Biasing

The SuVolta Deeply Depleted Channel™ (DDC) transistor enables more effective threshold voltage management through body biasing, which leads to lower power consumption and higher yields for deep submicron CMOS technologies. There are a variety of body biasing methodologies that take advantage of the unique properties of the DDC transistor. Adaptive body biasing can be used to correct systematic manufacturing variations, thus decreasing VT variation and improving sort yield. Dynamic body biasing can be used to reduce temperature and aging effects as well as to make power management modes more effective at optimizing very low power operation.

Technology Brief

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Body Effect and Body Biasing Copyright © 2011 SuVolta, Inc. All rights reserved.

Body Effect:Body effect refers to the change in the transistor threshold

voltage (VT) resulting from a voltage difference between the

transistor source and body. Because the voltage difference

between the source and body affects the VT, the body can

be thought of as a second gate that helps determine how the

transistor turns on and off. The strength of the body effect is

usually quantified by the body coefficient “gamma”.

Strong body effect enables a variety of effective body biasing

techniques, and these techniques were used effectively in older

process generations. However, body effect has diminished

with transistor scaling, and conventional deep-submicron

transistors have very little body effect. For this reason body bias

is not widely used for 65nm and smaller process technologies.

Instead, the transistor bodies are generally connected along

with the transistor source to either power (VDD) for p-channel

or ground (VSS) for n-channel transistor. The SuVolta DDC

transistor, on the other hand, has a stronger body effect than

conventional transistors and therefore enables effective VT

management through body biasing. This strong body effect is

a key enabler of low-power circuit operation for deep submicron

CMOS technologies.

Body Bias:Body bias involves connecting the transistor bodies to a bias

network in the circuit layout rather than to power or ground.

The body bias can be supplied from an external (off-chip) source

or an internal (on-chip) source. In the on-chip approach, the

design usually includes a charge pump circuit to generate a

reverse body bias voltage and/or a voltage divider to generate

a forward body bias voltage. Reverse body bias, which involves

applying a negative body-to-source voltage to an n-channel

transistor, raises the threshold voltage and thereby makes the

transistor both slower and less leaky. Forward body bias, on the

other hand, lowers the threshold voltage by applying a positive

body-to-source voltage to an n-channel transistor and thereby

makes the transistor both faster and leakier. The polarities of the

applied bias described above are the opposite for a p-channel

transistor.

Body Bias Methodologies:There are several different body biasing methodologies. The simplest body bias methodology is to apply a fixed body bias voltage identically to all product “chips” with the body bias value set during design. In a transistor with strong body effect this fixed body bias augments the role of doping in and near the transistor channel in setting the transistor threshold voltage. Power gating transistors provide an interesting opportunity to use a fixed bias: a fixed forward bias is applied during the on state to reduce the on-resistance of the transistor switch; alternatively, a fixed reverse bias is applied during the off state to reduce the remaining leakage in the power-gated block.

A more advanced body bias methodology is to apply an

adaptive body bias, where for each chip a different fixed body

bias value is calibrated at production test. Adaptive body bias

is a valuable tool for overcoming systematic manufacturing

variation, which is usually manifested in the product as leakage

or timing variation between chips. For instance, forward body

bias applied to a slow chip lowers the transistor threshold

voltage and speeds up the chip. Conversely, reverse body bias

applied to a fast chip increases the transistor threshold voltage

and reduces the excess leakage current (and leakage power

consumption) of the chip. The ability to tune as-manufactured

silicon back toward the electrical target with adaptive body

biasing decreases the process technology’s effective VT

variation and therefore improves the electrically-limited sort

yield of the product. It also means that designers do not have to

build as much margin into their designs, reducing design time

and thus time-to-market because timing closure is easier to

achieve over the smaller effective manufacturing range.

Dynamic body bias, on the other hand, changes the body bias

multiple times while the chip is operating rather than setting

the body bias just once either during design or at production

test. Consequently, dynamic body bias can be used to reduce

temperature and aging effects as well as to make power

management modes more effective at optimizing very low

power operation.

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For more information contact:SuVolta, Inc., 130-D Knowles Drive, Los Gatos, California 95032-1832 USAoffice +1 (408) 866 4125 fax +1 (408) 866 6931 sales@suvolta.com

Copyright © 2011 SuVolta, Inc. All rights reserved. SuVolta, Deeply Depleted Channel and PowerShrink are trademarks of SuVolta, Inc. SuVolta reserves the right to add to its trademarks at any time, and SuVolta will endeavor to update this Terms of Use accordingly. All other trademarks that may be used on the Website are the property of their respective owners. SuVolta’s technology and information are the intellectual property of SuVolta. There are no licenses granted with respect to intellectual property of any kind, including patents, copyright, trade secret and trademark, whether express, or implied, by waiver or estoppel or otherwise. All licenses by SuVolta, shall only be express and in writing signed by the CEO.

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For instance, dynamic body bias can adjust the transistor VT

to compensate for changes in the transistor as the product

ages. Dynamic body bias can also adjust the transistor VT to

compensate for temperature-related changes in the transistor

VT as the part heats up and cools down, maintaining more

uniform performance and leakage.

In both cases the use of dynamic body bias is a key enabler

of sub-one-volt, low-power circuit operation because it

maintains sufficient transistor gate overdrive. Gate overdrive

is the difference between the power supply voltage applied to

the transistor gate and the transistor threshold voltage (that is,

VGS - VT) that controls transistor drive current. At a given body

bias, as the power supply voltage is lowered to reduce power

consumption the gate overdrive is also reduced: in a typical

example with VT = 400 mV the gate overdrive is lowered from

600 mV to 200 mV as the power supply is lowered from 1.0 volts

to 0.6 volts. Because transistor speed is roughly proportional to

gate overdrive this reduction in power supply voltage reduces

the circuit’s performance along with its power consumption.

Designing for only 200 mV gate overdrive is difficult, but it is still

doable. The real difficulties start when margins are considered.

One of these margins is temperature, i.e. the chip is supposed

to work at low and high temperatures. The parameter most

affected by temperature is VT, which can shift by 1 mV or more

per degree Centigrade. A shift of 100 mV between hot and cold

is not unusual and must be designed for if the part is operated

across a full temperature range. It also means that the gate

overdrive in the example above is not constant at 200 mV but

could vary between 100 mV and 300 mV, potentially resulting

in much slower parts than expected. Such variation makes the

design much more complex as timing has to be closed at three

different speeds even before taking manufacturing variation

into account. Thus, by managing the circuit body bias as a

function of the temperature, the gate overdrive can be kept more

constant. This ability to manage VT and therefore gate overdrive

is a key enabler of sub-one-volt, low-power circuit operation.

Finally, dynamic body bias can be used to optimize the

performance and power of the product during operation. This

ability is particularly important in complex system-on-a-chip

(SOC) products that have a multitude of circuit blocks with

different performance and power requirements during system

operation. Dynamic body bias can be used to raise the

threshold voltage and reduce power consumption in a block

during periods when performance is not critical or a standby

mode is possible, or to lower threshold voltage and increase

performance in a block when maximum performance is needed.

This ability to optimize with dynamic body bias allows the

designer to use a large number of low-VT transistors to enhance

maximum performance because leakage can be dialed back

when lower performance is acceptable.

Conclusion:

In the case of all of these body bias methodologies, SuVolta’s circuits and design techniques take advantage of the increased body

effect provided by the DDC transistor to reduce power consumption and increase yields by managing VT more effectively than

possible with a conventional transistor.