capacitance s

7/30/2019 Capacitance s

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CapacitancesCapacitances

Alpana AgarwalAssistant Professor

Email: [email protected], [email protected]

Electronics & Communication Engineering Department

Thapar University, Patiala

Alpana Agarwal, Thapar University 210/13/2007

CapacitanceCapacitance

Any two conductors separated by an insulatorhave capacitance

Essential for transient and ac responses

Most of them are distributed & not lumped

On-chip capacitances, used for hand estimation

Gate to channel capacitor is very important Creates channel charge necessary for operation

Source and drain have capacitance to body Across reverse-biased diodes

Called diffusion capacitance because it is associatedwith source/drain diffusion

More parasitic capacitances


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CMOS Inverter: DynamicCMOS Inverter: Dynamic

VDD

Rn

Vout = 0

Vin = V DD

CL tpHL = f(Rn, CL)

Todays focus

Covered earlier

Transient, or dynamic, response determines the maximumspeed at which a device can be operated.


Sources of CapacitanceSources of Capacitance

Cw

CDB2

CDB1

CGD12

CG4

CG3

wiring (interconnect) capacitance

intrinsic MOS transistor capacitances

Vout2Vin

extrinsic MOS transistor (fanout) capacitances

Vout

VoutVin

M2

M1

M4

M3

Vout2

CL


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MOS Intrinsic CapacitancesMOS Intrinsic Capacitances

Structure capacitances

Channel capacitances

Depletion regions of the reverse-biased pn-junctions of the drainand source


MOS Structure CapacitancesMOS Structure Capacitances

LDSource

n+Drain

n+W

Ldrawn

Poly Gate

n+n+

tox

Leff

Top view

lateral diffusion

CGSO = CGDO = Cox LD W = Co W

Overlap capacitance (linear)

LD


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MOS Channel CapacitancesMOS Channel Capacitances

S D

p substrate

B

GVGS +

-

n+n+

depletionregion

n channel

CGS = CGCS + CGSO CGD = CGCD + CGDO

CGB = CGCB

The gate-to-bulk capacitance depends upon theoperating region and the terminal voltages


Average Distribution of ChannelAverage Distribution of ChannelCapacitanceCapacitance

(2/3)CoxWL +2CoW

(2/3)CoxWL0(2/3)CoxWL0Saturation

CoxWL + 2CoWCoxWLCoxWL/2CoxWL/20Resistive

CoxWL + 2CoWCoxWL00CoxWLCutoff

CGCGCCGCDCGCSCGCBOperationRegion

Channel capacitance components are nonlinear and varywith operating voltage

Most important regions are cutoff and saturation since thatis where the device spends most of its time


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MOS Diffusion CapacitancesMOS Diffusion Capacitances

S D

p substrate

B

GVGS +

-

n+n+

depletionregion

n channel

CSB

= CSdiff

CDB

= CDdiff

The junction (or diffusion) capacitance is from the reverse-biased source-body and drain-body pn-junctions.


Source Junction ViewSource Junction View

side walls

channel

W

xj

channel-stopimplant (NA+)

source

bottom plate(ND)

LSource

substrate (NA)

Cdiff = Cbp + Csw = Cj AREA + Cjsw PERIMETER

= Cj LSource W + Cjsw (2LSource + W)

junctiondepth


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Review: Reverse Bias DiodeReview: Reverse Bias Diode

All diodes in MOS digital circuits are reverse biased;

the dynamic response of the diode is determined by depletion-region charge or junction capacitance

Cj = Cj0/((1 VD)/0)m

where Cj0 is the capacitance under zero-bias conditions (afunction of physical parameters), 0 is the built-in potential (afunction of physical parameters and temperature) and m is thegrading coefficient

m = for an abruptjunction (transition from n to p-material is instantaneous)

m = 1/3 for a linear (or graded) junction (transition is gradual)

Nonlinear dependence (that decreases with increasing reverse

bias)

+

-VD


MOS Capacitance ModelMOS Capacitance Model

CGS

CSB CDB

CGD

CGB

S

G

B

D

CGS = CGCS + CGSO CGD = CGCD + CGDO

CGB = CGCB

CSB = CSdiff CDB = CDdiff


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Transistor Capacitance ValuesTransistor Capacitance Valuesfor 0.25for 0.25

0.90.320.220.90.481.90.276PMOS

0.90.440.280.90.520.316NMOS

bsw(V)

mjswCjsw(fF/m)

b(V)

mjCj(fF/m2)

Co(fF/m)

Cox(fF/m2)

Example: For an NMOS with L = 0.24 m, W = 0.36 m,

Ldrain = Lsource = 0.625 m

CGC = Cox WL =

CGSO = CGDO = Cox LD W = Co W =

so Cgate_cap = CoxWL + 2CoW =

Cbp = Cj LSource W =

Csw = Cjsw (2LSource + W) =

so Cdiffusion_cap =


Transistor Capacitance ValuesTransistor Capacitance Valuesfor 0.25for 0.25

0.90.320.220.90.481.90.276PMOS

0.90.440.280.90.520.316NMOS

bsw(V)

mjswCjsw(fF/m)

b(V)

mjCj(fF/m2)

Co(fF/m)

Cox(fF/m2)

Example: For an NMOS with L = 0.24 m, W = 0.36 m,Ldrain = Lsource = 0.625 m

CGC = Cox WL =

CGSO = CGDO = Cox LD W = Co W =

so Cgate_cap = CoxWL + 2CoW =

Cbp = Cj LSource W =

Csw = Cjsw (2LSource + W) =

so Cdiffusion_cap =

0.11 fF

0.52 fF

0.74 fF

0.45 fF

0.45 fF

0.90 fF


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Review: Sources of CapacitanceReview: Sources of Capacitance

Vout

Cw

Vin

CDB2

CDB1

CGD12

M2

M1

M4

M3

Vout2

CG4

CG3

wiring (interconnect) capacitance

intrinsic MOS transistor capacitances

Vout2Vin

extrinsic MOS transistor (fanout) capacitances

Vout

CL

ndrain

pdrain


Extrinsic (FanExtrinsic (Fan--Out) CapacitanceOut) Capacitance

The extrinsic, or fan-out, capacitance is the total gatecapacitance of the loading gates M3 and M4.

Cfan-out = Cgate (NMOS) + Cgate (PMOS)

= (CGSOn+ CGDOn+ WnLnCox) + (CGSOp+ CGDOp+WpLpCox)

Simplification of the actual situation

Assumes all the components of Cgate are between Vout and GND (or VDD)

Assumes the channel capacitances of the loading gates are constant


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Layout of Two Chained InvertersLayout of Two Chained Inverters

InOut

Metal1

VDD

GND

1.2m=2

1.125/0.25

0.375/0.25

PMOS

NMOS

Polysilicon

2.3750.72.3750.71.125/0.25PMOS

1.8750.31.8750.30.375/0.25NMOSPS (m)AS (m

2

)PD (m)AD (m2

)W/L

0.125 0.5


Components of CComponents of CLL (0.25(0.25mm))

6.06.1CL

0.120.12from extractionCw

2.282.28(2 Cop)Wp + CoxWpLpCG4

0.760.76(2 Con)Wn + CoxWnLnCG3

1.151.5KeqbppADpCj + KeqswpPDpCjswCDB2

0.900.66KeqbpnADnCj + KeqswnPDnCjswCDB1

0.610.612 Cop WpCGD2

0.230.232 Con WnCGD1

Value (fF)LH

Value (fF)HL

Expression

C Term


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Wiring CapacitanceWiring Capacitance

The wiring capacitance depends upon the lengthand width of the connecting wires and is a function of the fan-out from the driving gate and thenumber of fan-out gates.

Wiring capacitance is growing in importance with the scaling of technology.


Parallel Plate Wiring CapacitanceParallel Plate Wiring Capacitance

electrical field linesW

H

tdi dielectric (SiO2)

substrate

Cpp = (di/tdi) WL

current flow

permittivity

constant(SiO2= 3.9)

L


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Permittivity Values of Some DielectrPermittivity Values of Some Dielectricsics

3.2 4.0Fluorosilicate glass (FSG)

2.6 2.8Aromatic thermosets (SiLK)

11.7Silicon

9.5Alumina (package)

7.5Silicon nitride

5Glass epoxy (PCBs)

3.9 4.5Silicon dioxide

3.1 3.4Polyimides (organic)

2.1Teflon AF

1Free spacediMaterial


Sources ofSources ofInterwireInterwire CapacitanceCapacitance

interwire

fringe

pp

Cwire = Cpp + Cfringe + Cinterwire= (di/tdi)WL

+ (2di)/log(tdi/H)

+ (di/tdi)HL


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Impact ofImpact ofInterwireInterwire CapacitanceCapacitance

(from [Bakoglu89])


InsightsInsights

For W/H < 1.5, the fringe component dominates the parallel-plate component. Fringing capacitance can increase the overall capacitance by a factor of 10 or more.

When W < 1.75H interwire capacitance starts to dominate

Interwire capacitance is more pronounced for wires in the higher interconnect layers (further from the substrate)

Rules of thumb

Never run wires in diffusion

Use poly only for short runs Shorter wires lower R and C

Thinner wires lower C but higher R

Wire delay nearly proportional to L2


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Wiring CapacitancesWiring Capacitances

52271914121212

38149.16.65.45.45.2Al5

452718151514

35158.976.86.5Al4

4927201918

4115109.48.9Al3

45292725

36171513Al2

544740

574130Al1

5488Poly

Al4Al3Al2Al1PolyActiveField

fringe in aF/mpp in aF/m2

1158585859540Interwire Cap

Al5Al4Al3Al2Al1Poly

per unit wire length in aF/m for minimally-spaced wires


Dealing with CapacitanceDealing with Capacitance

Low capacitance (low-k) dielectrics (insulators)such as polymide or even air instead of SiO2 family of materials that are low-k dielectrics

must also be suitable thermally and mechanically and

compatible with (copper) interconnect

Copper interconnect allows wires to be thinnerwithout increasing their resistance, thereby decreasing interwire capacitance

SOI (silicon on insulator) to reduce junction capacitance


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Gate CapacitanceGate Capacitance

Approximate channel as connected to source Cgs = oxWL/tox = CoxWL = CpermicronW

Cpermicron is typically about 2 fF/m

n+ n+

p-type body

W

L

tox

SiO2

gate oxide(good insulator,

ox= 3.9

0)

polysilicongate


Diffusion CapacitanceDiffusion Capacitance

Csb, Cdb Undesirable, called parasitic capacitance

Capacitance depends on area and perimeter

Use small diffusion nodes

Comparable to Cgfor contacted diff

Cg for uncontacted

Varies with process


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capacitance s

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