chapter 3c pic18 assembly programming part c

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  • 8/19/2019 Chapter 3C PIC18 Assembly Programming Part C

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    3.5 Register Indirect Addressing3.5 Register Indirect Addressing

    Modes in PIC18Modes in PIC18

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    OutlineOutline

    • Immediate addressing modeImmediate addressing mode

    • Direct addressing modeDirect addressing mode

    • Register Indirect addressing modeRegister Indirect addressing mode

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    Immediate Addressing ModeImmediate Addressing Mode

    • The operand is a literal constantThe operand is a literal constant

    • The instruction has a !" #literal$The instruction has a !" #literal$

    • Can %e used in loading in&ormation andCan %e used in loading in&ormation and

    per&orming arithmetic and logicper&orming arithmetic and logic

    operationsoperations ONLY in the WREG register ONLY in the WREG r 

    egister 

    • '(amples)'(amples)

     – mo*l+ ,(-5 load ,(-5 into /R'0mo*l+ ,(-5 load ,(-5 into /R'0

     – su%l+ D"-" su%tract /R'0 &rom -su%l+ D"-" su%tract /R'0 &rom -

     – addl+ ,(2, add /R'0 +ith ,(2,addl+ ,(2, add /R'0 +ith ,(2,3

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    Register Direct Addressing ModeRegister Direct Addressing Mode

    • The operand data is in a &ile register inThe operand data is in a &ile register in

    data memor.data memor.

    • The address o& the &ile register isThe address o& the &ile register is

    pro*ided as a part o& the instruction.pro*ided as a part o& the instruction.

    • '(ample)'(ample)

     – mo*+& ,(2,4 A cop /R'0 into &ile regmo*+& ,(2,4 A cop /R'0 into &ile reg

    location ,(,2,location ,(,2,

    4

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    Destination Option in Direct Addressing ModeDestination Option in Direct Addressing Mode

    • Pro*ides an option to store the resultPro*ides an option to store the result

    either in /R'0 or in &ile register.either in /R'0 or in &ile register.

    • '(ample)'(ample)

       movlw 0 movlw 0 ;[WREG] = 0;[WREG] = 0 movwf 0x20, A  movwf 0x20, A  ;[0x20] = 0, [WREG] = 0;[0x20] = 0, [WREG] = 0

    incf 0x20, W, A incf 0x20, W, A  ;[0x20] = 0, [WREG] = 1;[0x20] = 0, [WREG] = 1

    incf 0x20, W, A incf 0x20, W, A  ;[0x20] = 0, [WREG] = 1;[0x20] = 0, [WREG] = 1

    incf 0x20, F, A incf 0x20, F, A  ;[0x20] = 1, [WREG] = 1;[0x20] = 1, [WREG] = 1

    incf 0x20, F, A incf 0x20, F, A  ;[0x20] = 2, [WREG] = 1;[0x20] = 2, [WREG] = 1

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    Register Indirect Addressing ModeRegister Indirect Addressing Mode

    • uppose ou +ant to copuppose ou +ant to cop *alue ,(55 to*alue ,(55 tolocation ,(,2, to ,(,22.location ,(,2, to ,(,22.

    • A &i(ed address must %e speci&ied in directA &i(ed address must %e speci&ied in directaddressing mode as an operand.addressing mode as an operand.

    • Thus4 using direct addressing mode4 oneThus4 using direct addressing mode4 oneinstruction copies to one register)instruction copies to one register)

    6

     movlw 0x55 movlw 0x55

     movwf 0x40, A  movwf 0x40, A  movwf 0x41, A  movwf 0x41, A 

     movwf 0x42, A  movwf 0x42, A 

     movwf 0x43, A  movwf 0x43, A 

     movwf 0x44, A  movwf 0x44, A 

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    Register Indirect Addressing ModeRegister Indirect Addressing Mode

    • Three registers 6no+n asThree registers 6no+n as file selectfile selectregistersregisters #7R(4 +here ( ,4 14 -$ store#7R(4 +here ( ,4 14 -$ storeaddresses o&addresses o& the data memor location #i.e.4the data memor location #i.e.4pointers$.pointers$.

    • A 7R is aA 7R is a 1-9%it register1-9%it register +hich is split into+hich is split intot+o 89%it registers4 6no+n as 7R(! andt+o 89%it registers4 6no+n as 7R(! and7R(:.7R(:.

    • To load a RAM address into a 7R4 useTo load a RAM address into a 7R4 use

    !7R)!7R) – !7R ,4!7R ,4 ,(,3,,(,3, load 7R, +ith ,(3,  load 7R, +ith ,(3, – !7R 14!7R 14 ,(,2,,(,2,  load 7R1 +ith ,(2,  load 7R1 +ith ,(2, – !7R -4!7R -4 ,(,7,(,7  load 7R- +ith ,(7  load 7R- +ith ,(7

    7

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    Register Indirect Addressing ModeRegister Indirect Addressing Mode

    • 7R( is associated +ith a I;D7( register7R( is associated +ith a I;D7( register

    ##+here ( ,4 14 -$.+here ( ,4 14 -$.

    • /hen reading &rom #+riting to$ the I;D7(/hen reading &rom #+riting to$ the I;D7(

    register4 +e are reading &rom #+riting to$register4 +e are reading &rom #+riting to$the &ile register pointed to % the 7Rthe &ile register pointed to % the 7R

    • '(ample)'(ample)LFSR 0, 0x030LFSR 0, 0x030 ;FSR0 poin! o RA" #$$%&!! 0x30;FSR0 poin! o RA" #$$%&!! 0x30

     movwf '()F0 movwf '()F0 ;cop* +& con&n of WREG ino;cop* +& con&n of WREG ino

    RA" #$$%&!! 0x30RA" #$$%&!! 0x30

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    '(amples'(amples

    Direct Addressing ModeDirect Addressing Mode

     movlw 0x55 movlw 0x55

     movwf 0x40, A  movwf 0x40, A 

     movwf 0x41, A  movwf 0x41, A 

     movwf 0x42, A  movwf 0x42, A 

     movwf 0x43, A  movwf 0x43, A 

     movwf 0x44, A  movwf 0x44, A 

    Indirect Addressing ModeIndirect Addressing Mode

    -.(/ & 0x00-.(/ & 0x00

     movlw 0x05 movlw 0x05

     movwf -.(/, A  movwf -.(/, A 

     movlw 0x55 movlw 0x55

    LFSR 0, 0x040LFSR 0, 0x040

    Loop movwf '()F0Loop movwf '()F0

      incf FSR0L, Fincf FSR0L, F

      $&cf! -.(/, F, A $&cf! -.(/, F, A 

      %# Loop %# Loop

    e.g.4 /rite a program to cop the *alue ,(55 to locatione.g.4 /rite a program to cop the *alue ,(55 to location

    ,(2, to ,(22,(2, to ,(22

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    Register Indirect Addressing ModeRegister Indirect Addressing Mode

    • Indirect addressing mode allo+sIndirect addressing mode allo+s

    loopinglooping

    • :o+e*er4 +e incremented onl 7R(!:o+e*er4 +e incremented onl 7R(!

    • To deal +ith 7R(:4 +e need to useTo deal +ith 7R(:4 +e need to use

    %ranching instructions conditioned on%ranching instructions conditioned on

    the Carr

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    Auto9increment option &or 7RAuto9increment option &or 7R

    • POTD'C(POTD'C(– movwf -S/)E0 movwf -S/)E0 does +hat mo*+& I;D7, did4 %utdoes +hat mo*+& I;D7, did4 %ut

    in addition4 7R, +ill %ein addition4 7R, +ill %e decremented decremented  % 1% 1 after after  thethee(ecutione(ecution

    POTI;C(POTI;C(– movwf -S/'(0 movwf -S/'(0 incrementsincrements 7R, % 17R, % 1 after after  thethe

    mo*e operation.mo*e operation.

    • PR'I;C(PR'I;C(– movwf RE'(0 movwf RE'(0 incrementsincrements 7R, % 17R, % 1 beforebefore thethe

    mo*e operation.mo*e operation.• P!=/(P!=/(

    – movwf L.SW0 movwf L.SW0 adds an o&&set to 7R, that e>ualsadds an o&&set to 7R, that e>ualsto the content o& /R'0 %e&ore the mo*e operation.to the content o& /R'0 %e&ore the mo*e operation.However, the content of FSR will not be modifiedHowever, the content of FSR will not be modified

    after o!eration "different from !revio#s three SFRs$after o!eration "different from !revio#s three SFRs$11

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    Pre*ious e(ample re*isitedPre*ious e(ample re*isited

    -.(/ & 0x00-.(/ & 0x00

     movlw 0x05 movlw 0x05

     movwf -.(/, A  movwf -.(/, A 

     movlw 0x55 movlw 0x55

    LFSR 0, 0x040LFSR 0, 0x040

    Loop movwf -S/'(0Loop movwf -S/'(0  $&cf! -.(/, F$&cf! -.(/, F

      %# Loop %# Loop

    e.g.4 /rite a program to cop the *alue ,(55 toe.g.4 /rite a program to cop the *alue ,(55 to

    location ,(2, to ,(22location ,(2, to ,(22

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    DemonstrationDemonstration

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    Introduce mo*&& %e&ore ne(t e(ample...Introduce mo*&& %e&ore ne(t e(ample...

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    '(ample'(ample

    • Cop a %loc6 o& 5 %tes o& data &romCop a %loc6 o& 5 %tes o& data &rom

    RAM locations starting &rom ,(,3, toRAM locations starting &rom ,(,3, to

    RAM locations starting &rom ,(,,RAM locations starting &rom ,(,,

      -.(/ & 0x00-.(/ & 0x00

      movlw 0x05 movlw 0x05

      movwf -.(/, A  movwf -.(/, A 

      LSFR 0, 0x030LSFR 0, 0x030

      LSFR 1, 06070LSFR 1, 06070

    LoopLoop  movff -S/'(0, -S/'(1 movff -S/'(0, -S/'(1

      $&cf! -.(/, F, A $&cf! -.(/, F, A 

      %# Loop %# Loop15

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    '(ample'(ample

    -.(/ & 0x00-.(/ & 0x00L89:/E & 0x07L89:/E & 0x0789:/E & 0x0