Communication issues for NOC

By

Farhadur Arifin

Objective:

Future system of NOC will have strong requirment on reusability and communication performance

Aims to define the switching point when NOCs will become the preferred communication architecture compare to central bus communication architecture.

The area, frequency and latency of a k-ary 2-cube NOC are compared with the same features of a central bus communication architecture.

Bus Model and Noc Model:

Bus Model: Separate 32-bit wide address and

data buses Multi-master capability Centralized arbitration and

decoding performed by a bus unit controller (BCU)

NOC Model: Message-passing communication

model and wormhole packet switching

Cores exchange data by sending and receiving request and response packets

Links are bi-directional and each link is composed by two 38-bit wide channels.

Router has five ports. Each port has two channels , one for packets incoming into the router and other for packet outgoing.

Noc Model: (Continue....)

In wormhole switched network, each packet is split in a set of units named flits.

Flits, smallest units for performing the flow control

Buffering is implementing by means of input queues

Operating Frequency:

Operating frequency of the shared bus and NOC are determined by the propagation delay in their interconnection wires, which defines the clock cycle.

The propagation delay of the bus:

Tbus=Nc* Cl*Ktec + lw,bus*Cm*Ktec

The propagation delay of Noc:

Tnoc=1* Cl*Ktec + lw,noc*Cm*Ktec

Cl=parasitic capacitance for each core attached to bus

Cm= parasitic capacitance for wire length.

Estimation of system size effect on the interconnect operating frequency:

Latency:

Latency for bus model:

Tmsg,bus = Tbus+ Tbus*m where m is message of size m in the shared bus. Latency for wormhole switching networks the latency to transfer an L-bit message between a sender and receiver

distant from D inter-router links with W-bit wide data channel is ,

Tmsg,wormhole= D.(ts+tr+tw)+max(ts,tw).(l/w)tr= time spent to router to make a routing decision

ts=intrarouter or switching delay tw= interrouter delay l/w= packet pay laod l= l bit message between a sender and a receiver distan D= inter-router links W= bit wide data channels

Conclusion:

The performing modeling allowed to illustrate the effectiveness of the NOC approach for the systems with more than two dozen of cores and/or running applications with a good locality

The latency results would be still more favorable to the NOC if the

degradation of the operating frequency was taken into account. It was considered that in a heterogeneous system the clock cycle of

a NOC can vary with the system size. However such variation is less important than the one on a bus-based system.

For very complex systems, NOC interconnection technique may be the only alternative to cope with power restrictions. In fact, in the bus based systems the power consumption increases with the wire length, which increases with the circuit size.