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Lecture 12

Instruction set architecture

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Instruction Formats

Instruction sets are differentiated by the following:• Number of bits per instruction.• Stack-based or register-based.• Number of operands per instruction.• Operand location.• Types of operations.• Type and size of operands.

Instruction set architectures are measured according to:• Main memory space occupied by a program.

• Instruction complexity.

• Instruction length (in bits).

• Total number of instructions in the instruction set.

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Instruction Formats

•In designing an instruction set, consideration is given to:• Instruction length.

– Whether short, long, or variable.• Number of operands.• Number of addressable registers.• Memory organization.

– Whether byte- or word addressable.• Addressing modes.

– Choose any or all: direct, indirect or indexed.

•Byte ordering, or endianness, is another major architectural consideration.

•If we have a two-byte integer, the integer may be stored so that the least significant byte is followed by the most significant byte or vice versa.

– In little endian machines, the least significant byte is followed by the most significant byte.

– Big endian machines store the most significant byte first (at the lower address).

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• As an example, suppose we have the hexadecimal number 12345678.

• The big endian and small endian arrangements of the bytes are shown below.

Instruction Formats

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Little & Big Endian Applications

• Any program that writes or reads data from a file must be aware of the byte ordering on the particular machine. – For example, the Windows BMP graphics format was developed on a

little endian machine, • To view BMPs on a big endian machine, the application used to view them

must first reverse the byte order

– Software designers of popular software must be aware of these byte-ordering issues.

• Adobe Photoshop uses big endian, • GIF is little endian, • JPEG is big endian,• PC Paintbrush is little endian, • RTF by Microsoft is little endian, and Sun raster files are big endian.

– Some applications support both formats: • Microsoft WAV and AVI files, TIFF files, and XWD (X windows Dump)

support both, typically by encoding an identifier into the file.

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Problem

• if you wished to transfer data from a big endian machine to a little endian machine?– If the machines receiving the data uses different endian-

ness than the machine sending the data, the values can be misinterpreted.

• For example, the value sent as the -511 on a big endian machine, would be read as the value 510 on a little endian machine.

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Example

• The first two bytes of a 2M x 16 main memory have the following hex values:– Byte 0 is FE– Byte 1 is 01

• If these bytes hold a 16-bit two's complement integer, what is its actual decimal value if:– a. memory is big endian?– b. memory is little endian?

• Ans.– a. FE01 h = (1111 1110 0000 0001)2 = -51110– b. 01FE h = (0000 0001 1111 1110)2 = 51010

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Instruction Formats

• The next consideration for architecture design concerns how the CPU will store data.

• We have three choices:

1. A stack architecture

2. An accumulator architecture

3. A general purpose register architecture.

• In choosing one over the other, the tradeoffs are simplicity (and cost) of hardware design with execution speed and ease of use.

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Instruction Formats

• In a stack architecture, instructions and operands are implicitly taken from the stack.– A stack cannot be accessed randomly.

• In an accumulator architecture, one operand of a binary operation is implicitly in the accumulator.– One operand is in memory, creating lots of bus traffic.

• In a general purpose register (GPR) architecture, registers can be used instead of memory.– Faster than accumulator architecture.– Efficient implementation for compilers.– Results in longer instructions.

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Instruction Formats

• Most systems today are GPR systems.• There are three types:

– Memory-memory where two or three operands may be in memory.– Register-memory where at least one operand must be in a register.– Load-store where no operands may be in memory.

• The number of operands and the number of available registers has a direct affect on instruction length.

• Stack machines use one - and zero-operand instructions.– LOAD and STORE instructions require a single memory

address operand.– Other instructions use operands from the stack implicitly.– PUSH and POP operations involve only the stack’s top

element.– Binary instructions (e.g., ADD, MULT) use the top two items on

the stack.

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Instruction Formats

• Stack architectures require us to think about arithmetic expressions a little differently.

• We are accustomed to writing expressions using infix notation, such as: Z = X + Y.

• Stack arithmetic requires that we use postfix notation: Z = XY+.– This is also called reverse Polish notation,

• The principal advantage of postfix notation is that parentheses are not used.

• For example, the infix expression,

Z = (X Y) + (W U),becomes:

Z = X Y W U +in postfix notation.

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Infix to Postfix Conversion

• In normal algebra infix notation is used like a+b*c– The corresponding postfix notation is abc*+

• The algorithm for the conversion is as follows : – Scan the Infix string from left to right. – Initialize an empty stack. – If the scannned character is an operand, add it to the Postfix string. – If the scanned character is an operator and if the stack is empty Push the

character to stack. • If the scanned character is an Operand and the stack is not empty, compare the

precedence of the character with the element on top of the stack (topStack). • If topStack has higher precedence over the scanned character Pop the stack else

Push the scanned character to stack. • Repeat this step as long as stack is not empty and topStack has precedence over the

character.

– Repeat this step till all the characters are scanned. • (After all characters are scanned, we have to add any character that the stack may

have to the Postfix string.) If stack is not empty add topStack to Postfix string and Pop the stack. Repeat this step as long as stack is not empty.

– Return the Postfix string.

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Infix, Prefix, Postfix

• Example: arithmetic expression a & b consists of operands a, b and operator &.– Infix notation is format where operator is specified in

between the two operands. a&b– Prefix notation is format where operator is specified before

the two operands. & a b– Postfix notation is format where operator is specified after

the two operands. Postfix notation is also called RPN or Reverse Polish Notation. a b &

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Arithmetic Expressions

Prefix Notation Infix Notation Postfix Notation

+A * B C A + B * C A B C * +

* + A B C (A+B) * C A B + C *

+ – A B C A – B + C A B – C +

– A + B C A – (B+C) A B C + –

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Precedence

• The common, rule is, – multiplication and division should be performed before addition and

subtraction– The variation is found in the precedence of logical operations such as

“and” & “or”• Some languages give them the same precedence, whereas most give and

higher precedence than or.

• Arithmetic expressions have – operands (variables or numeric constants).– Operators

• +, -, *, / ,%

Priority convention:- Unary minus (sign for negative numbers) has highest

priority

*, /, % have medium priority

+, - have lowest priority

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Example

• Let us see how the above algorithm will be implemented using an example. – Infix String : a+b*c-d

• Initially the Stack is empty and our Postfix string has no characters. Now, the first character scanned is 'a'. 'a' is added to the Postfix string. The next character scanned is '+'. It being an operator, it is pushed to the stack.

Post-fix StringStack

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• a+b*c-d• Next character scanned is 'b' which will be placed in

the Postfix string. – Next character is '*' which is an operator

• Now, the top element of the stack is '+' which has lower precedence than '*',

• so '*' will be pushed to the stack.                

Post-fix StringStack

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• a+b*c-d– The next character is 'c' which is placed in the Postfix

string. – Next character scanned is '-'.

• The topmost character in the stack is '*' which has a higher precedence than '-'.

• Thus '*' will be popped out from the stack and added to the Postfix string.

– Even now the stack is not empty.

• Now the topmost element of the stack is '+' which has equal priority to '-'. So pop the '+' from the stack and add it to the Postfix string. The '-' will be pushed to the stack.

               

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• a+b*c-d– Next character is 'd' which is added to Postfix string.

• Now all characters have been scanned so we must pop the remaining elements from the stack and add it to the Postfix string. – At this stage we have only a '-' in the stack.

• It is popped out and added to the Postfix string.

– So, after all characters are scanned, this is how the stack and Postfix string will be :

               

Post-fix String

Stack

End result : Infix String : a+b*c-d Postfix String : abc*+d-

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Instruction Formats

• The principal advantage of postfix notation is that parentheses are not used.

• For example, the infix expression,

Z = (X Y) + (W U),

becomes:

Z = X Y W U +

in postfix notation.

• In a stack ISA, the postfix expression,

Z = X Y W U +might look like this:

PUSH XPUSH YMULTPUSH WPUSH UMULTADDPUSH Z

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Example

• Convert from infix to reverse Polish (postfix) notation.– X * Y + W * Z + V * U

• Solution:– X Y * W Z * V U * + +

• Convert from reverse Polish notation to infix notation.– W X Y Z - + *

• Solution:– W * (X + Y - Z)

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Instruction Formats

• We have seen how instruction length is affected by the number of operands supported by the ISA.

• In any instruction set, not all instructions require the same number of operands.

• Operations that require no operands, such as HALT, necessarily waste some space when fixed-length instructions are used.

• One way to recover some of this space is to use expanding opcodes.

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Instruction Formats

• A system has 16 registers and 4K of memory.• We need 4 bits to access one of the registers. We also need 12

bits for a memory address.• If the system is to have 16-bit instructions, we have two choices

for our instructions:

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Instruction Set Architecture - ISA

• A computer’s instruction set architecture (ISA) specifies the format of its instructions and the primitive operations that the machine can perform.– The ISA is an interface between a computer’s hardware and its software.

– Below is the format of an instruction, and few basic instructions

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Example instruction

• This is a bit pattern for a LOAD instruction as it would appear in the IR:

– see that the opcode is 1 and the address from which to load the data is 3.

• This is a bit pattern for a SKIPCOND instruction as it would appear in the IR:

– See that the opcode is 8 and bits ’11’ and ’10’ are 10b, meaning that the next instruction will be skipped if the value in the AC is greater than zero.

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Microoperations

• Each instruction actually consists of a sequence of smaller instructions called – microoperations.

• The exact sequence of microoperations that are carried out by an instruction can be specified using register transfer language (RTL)– the notation M[X] to indicate the actual data value

stored in memory location X, and to indicate the transfer of bytes to a register or memory location

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Instruction set

• Machine instruction has an opcode and zero or more operands

• Architectures are differentiated from one another by – The number of bits allowed per instruction (16, 32, and 64

are the most common), – The number of operands allowed per instruction, and – The types of instructions and data each can process

• The opcode specify the operations to be executed the operand specify register or memory location of data

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Addressing

• Addressing is an instruction design issue and is part of the instruction format, – there are so many issues the two most important of these

addressing issues: • The types of data that can be addressed and • The various addressing modes

• Addressing modes specify where the instruction operands are located– An addressing mode can specify a constant, a register, or a

location in memory– Certain modes allow

• shorter addresses and • some allow to determine the location of the actual operand, often

called the effective address of the operand, dynamically

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Addressing modes

• When MP execute an instruction, it performs the specified function on data– These data called “ operand” – The operand may be

• The part of the instruction • Resides I one of the register • Stored at an address in the memory or in I/O port

• To access these different types of operands various addressing modes are provided– The addressing mode is a method of specifying an

operand– Can be categorized in three

• Register operand addressing• Immediate operand addressing• Memory operand addressing

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Register operand addressing

• The operand to be accessed is specified as residing in an internal register– The register can be a source or destination – Only the data registers can be accessed as a byte or word

• Eg: Mov AX, BX– Move the contents of BX which is the source operand to destination

operand AX

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Immediate operand addressing mode

• If the operand is part of the instruction instead of the content of a register or memory location – Opcode : immediate operand– Eg: Mov AL, 15h

• The source operand 15h is a byte wide immediate source operand• The destination register is using register operand addressing

– So this is a mix of both

» Mov CX, 1234h

» Move the immediate value 1234 into CX register

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Memory operand addressing modes

• To reference an operand in memory, MP must calculate the physical address of the operand and then initiate the read or write request– Phys Address = segment base: Base+index+displacement

– Not all these elements are used for address calculation• Many combinations are used like

– Register indirect addressing– Based addressing– Indexed addressing– Based index addressing

CS

SS

DS

ES

: BX

BP

+ SI

DI

+ 8/16 bit displacement PA =