department of electronics and communication...

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DEPARTMENT OF ELECTRONICS AND

COMMUNICATION ENGINEERING

LAB MANUAL

EC8261 CIRCUITS AND DEVICES LABORATORY

I YEAR/ II SEMESTER

REGULATION 2017

PREPARED BY

Mr S. Venkatraman AP/ECE

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VISION OF THE INSTITUTE

To Develop Globally Competitive Human Resource through Virtuous Enlightened Learning.

MISSION OF THE INSTITUTE

M1: To Impart Quality Technical Education and Research Orientation Enabling the Technocrats to

Fair Well in Global Competition.

M2: To Inculcate Committed Leadership Qualities through Ethical Practices.

M3: To Acquire Skills through Industry Practices and Develop the habit of life-long learning.

VISION OF THE DEPARTMENT

To Produce Competent and Responsible Engineers to meet the growing Challenges in the field of

Electronics and Communication Engineering

MISSION OF THE DEPARTMENT

M1: To impart strong technical competency to learners by using best pedagogical methods

M2: To provide industrial exposure to learners by collaboration with industries for training,

internships, and expert talks.

M3: To imbibe self-learning, collaborative learning, Ethical values and Environment awareness

through Co- curricular and Extra-curricular activities.

PROGRAMME EDUCATIONAL OBJECTIVES

PEO1: Adapt to dynamically evolving technologies for a successful career in an

academia/Industry/Entrepreneur

PEO 2: Apply the knowledge of Electronics and communication Engineering to solve real world

problems.

PEO 3: Exhibit effective communication skills and can perform as a team player with leadership

traits.

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PROGRAM OUTCOMES

Engineering Graduates will be able to:

1. Engineering knowledge: Apply the knowledge of mathematics, science, engineering

fundamentals, and an engineering specialization to the solution of complex engineering problems.

2. Problem analysis: Identify, formulate, review research literature, and analyze complex

engineering problems reaching substantiated conclusions using first principles of mathematics,

natural sciences, and engineering sciences.

3. Design/development of solutions: Design solutions for complex engineering problems and

design system components or processes that meet the specified needs with appropriate

consideration for the public health and safety, and the cultural, societal, and environmental

considerations.

4. Conduct investigations of complex problems: Use research-based knowledge and research

methods including design of experiments, analysis and interpretation of data, and synthesis of the

information to provide valid conclusions.

5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern

engineering and IT tools including prediction and modeling to complex engineering activities with

an understanding of the limitations.

6. The engineer and society: Apply reasoning informed by the contextual knowledge to assess

societal, health, safety, legal and cultural issues and the consequent responsibilities relevant to the

professional engineering practice.

7. Environment and sustainability: Understand the impact of the professional engineering

solutions in societal and environmental contexts, and demonstrate the knowledge of, and need for

sustainable development.

8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities and

norms of the engineering practice.

9. Individual and team work: Function effectively as an individual, and as a member or leader in

diverse teams, and in multidisciplinary settings.

10. Communication: Communicate effectively on complex engineering activities with the

engineering community and with society at large, such as, being able to comprehend and write 4

effective reports and design documentation, make effective presentations, and give and receive

clear instructions.

11. Project management and finance: Demonstrate knowledge and understanding of the

engineering and management principles and apply these to one‟s own work, as a member and

leader in a team, to manage projects and in multidisciplinary environments.

12. Life-long learning: Recognize the need for, and have the preparation and ability to engage in

independent and life-long learning in the broadest context of technological change.

PROGRAMME SPECIFIC OUTCOMES

PSO 1: Develop Innovative Ideas for an existing / Novel problem through Information and

Communication technologies.

PSO 2: Apply the Analog and Digital system Design Principles and practices for Developing

Quality products.

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EC8261 CIRCUITS AND DEVICES LABORATORYL T P C 0 0 4 2

OBJECTIVES:

To learn the characteristics of basic electronic devices such as Diode, BJT,FET, SCR

To understand the working of RL,RC and RLC circuits

To gain hand on experience in Thevinin & Norton theorem, KVL & KCL, and Super Position

Theorems

List of Experiments

1. Characteristics of PN Junction Diode

2. Zener diode Characteristics & Regulator using Zener diode

3. Common Emitter input-output Characteristics

4. Common Base input-output Characteristics

5. FET Characteristics

6. SCR Characteristics

7. Clipper and Clamper & FWR

8. Verifications Of Thevinin & Norton theorem

9. Verifications Of KVL & KCL

10. Verifications Of Super Position Theorem

11. verifications of maximum power transfer & reciprocity theorem

12. Determination Of Resonance Frequency of Series & Parallel RLC Circuits

13. Transient analysis of RL and RC circuits

TOTAL: 60 PERIODS

OUTCOMES:

At the end of the course, the student should be able to:

Analyze the characteristics of basic electronic devices

Design RL and RC circuits

Verify Thevinin & Norton theorem KVL & KCL, and Super Position Theorems

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COURSE OUTCOMES

COURSE

CODE

EC826

1

COURSE NAME CIRCUITS AND DEVICES

LAB

SEM 2

On completion of the course, the students will be able to

CO1 Demonstrate the VI characteristics of basic electronic devices

CO2 Construct the RL and RC circuits for transient analysis.

CO3 Verify the KVL, KCL, Thevenin, Nortton’.and superposition theorems.

CO4 Analyze the Frequency response of Series and Parallel RLC Circuits.

CO5 Construct the wave shaping circuits.

CO’S – PO’S & PSO’S MAPPING

CO/

PO

PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2

CO1 3 3 2 1 2 2 1 3 3

CO2 3 3 2 1 2 2 1 3 3

CO3 3 3 3 1 2 2 1 3 3

CO4 3 3 3 1 2 2 1 3 3

CO5 3 3 3 1 2 2 1 3 3

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Table of contents

SL.No. NAME OF THE EXPERIMENT PAGE No.

1 Characteristics of PN Junction Diode

2 Zener diode Characteristics & Regulator using Zener diode

3 Common Emitter input-output Characteristics

4 Common Base input-output Characteristics

5 FET Characteristics

6 SCR Characteristics

7 Clipper and Clamper & FWR

8 Verifications Of Thevinin & Norton theorem

9 Verifications Of KVL & KCL

10 Verifications Of Super Position Theorem

11 verifications of maximum power transfer & reciprocity theorem

12 Determination Of Resonance Frequency of Series & Parallel RLC

Circuits

13 Transient analysis of RL and RC circuits

CONTENT BEYOND THE SYLLABUS

14 Study the V-I Characteristics of LED.

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CHARACTERISTICS OF PN JUNCTION DIODE

Diode schematic Symbol:

CIRCUIT DIAGRAM:

B) Forward bias:

C) Reverse Bias:

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EXP.No.01 CHARACTERISTICS OF PN JUNCTION DIODE

AIM:

To plot Volt-Ampere Characteristics of Silicon P-N Junction Diode.

To find cut-in Voltage for Silicon P-N Junction diode.

To find static and dynamic resistances in both forward and reverse biased conditions

for P-N Junction diode.

APPARATUS REQUIRED:

S.No. Name of the apparatus Range Quantity

1. P-N Diode IN4007 1No

2. Regulated Power supply (0-30V) 1No

3. Resistor 1KΩ 1No

4. Ammeter (0-20 mA) 1No

5. Ammeter (0-200μA) 1No.

6. Voltmeter (0-1V) 1No.

7. Voltmeter (0-20V) 1No.

8. Bread board - 1No.

9. Connecting wires Single strand As required

THEORY:

A P-N junction diode conducts only in one direction. The V-I characteristics of the diode

are curve between voltage across the diode and current flowing through the diode. When external

voltage is zero, circuit is open and the potential barrier does not allow the current to flow.

Therefore, the circuit current is zero. When Ptype (Anode) is connected to +ve terminal and n-

type (cathode) is connected to –ve terminal of the supply voltage is known as forward bias.

The potential barrier is reduced when diode is in the forward biased condition. At some forward

voltage, the potential barrier altogether eliminated and current starts flowing through the diode and

also in the circuit. Then diode is said to be in ON state. The current increases with increasing V f.

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MODEL GRAPH:

1. Take a graph sheet and divide it into 4 equal parts. Mark origin at the center of the graph sheet.

2. Now mark +ve X-axis as Vf, -ve X-axis as Vr, +ve Y-axis as If and –ve Y-axis as Ir.

3. Mark the readings tabulated for Si forward biased condition in first Quadrant and Si reverse

biased condition in third Quadrant.

OBSERVATIONS:

A) FORWARD BIAS:

S.No. Applied Voltage(V) Forward Voltage(Vf) Forward Current(If(mA))

B) REVERSE BIAS:

S.No. Applied Voltage(V) Forward Voltage(Vr) Reverse Current((IR(μA))

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Calculations:

In forward bias condition:

Static Resistance, Rs = Vf/If =

Dynamic Resistance, RD = ΔVf/ ΔIf =

In Reverse bias condition:

Static Resistance, Rs = VR/IR =

Dynamic Resistance, RD = ΔVR/ ΔIR =

When N-type (cathode) is connected to +ve terminal and P-type (Anode) is connected -ve

terminal of the supply voltage is known as reverse bias and the potential barrier across the

junction increases. Therefore, the junction resistance becomes very high and a very small current

(reverse saturation current) flows in the circuit. Then diode is said to be in OFF state. The reverse

bias current is due to minority charge carriers.

PROCEDURE:

A) FORWARD BIAS:

1. Connections are made as per the circuit diagram.

2. For forward bias, the RPS +ve is connected to the anode of the diode and RPS –ve is connected

to the cathode of the diode

3. Switch on the power supply and increase the input voltage (supply voltage) in steps of 0.1V.

4. Note down the corresponding current flowing through the diode and voltage across the diode for

each and every step of the input voltage.

5. The reading of voltage and current are tabulated.

6. Graph is plotted between voltage (Vf) on X-axis and current (If) on Y-axis.

B) REVERSE BIAS:

1. Connections are made as per the circuit diagram

2. For reverse bias, the RPS +ve is connected to the cathode of the diode and RPS –ve is connected

to the anode of the diode.

3. Switch on the power supply and increase the input voltage (supply voltage) in steps of 1V.

4. Note down the corresponding current flowing through the diode voltage across the diode for

each and every step of the input voltage.

5. The readings of voltage and current are tabulated

6. Graph is plotted between voltage(VR) on X-axis and current (IR) on Y-axis.

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PRECAUTIONS:

1. While doing the experiment do not exceed the readings of the diode. This may lead to

damaging of the diode.

2. Connect voltmeter and ammeter in correct polarities as shown in the circuit diagram.

3. Do not switch ON the power supply unless you have checked the circuit connections as per the

circuit diagram.

RESULT:

Thus the V-I characteristics of PN junction diode was plotted and determined its cut in voltage,

static and dynamic resistances in forward and reverse bias condition.

Forward Bias of PN Junction Diode:

The Cut in Voltage or Knee Voltage (Vγ) is _____________Volts.

The Dynamic Forward resistance is __________________ Ω.

The Static Forward resistance is __________________ Ω.

Reverse Bias of PN Junction Diode:

The Dynamic Reverse resistance is _________________ Ω.

The Static Reverse resistance is _________________ Ω.

VIVA QUESTIONS:

1. Define depletion region of a diode.

2. What is meant by transition & space charge capacitance of a diode?

3. Is the V-I relationship of a diode Linear or Exponential?

4. Define cut-in voltage of a diode and specify the values for Si and Ge diodes.

5. What are the applications of a p-n diode?

6. Draw the ideal characteristics of P-N junction diode.

7. What is the diode equation?

8. What is PIV?

9. What is the break down voltage?

10. What is the effect of temperature on PN junction diodes?

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ZENER DIODE CHARACTERISTICS

Diode schematic Symbol

CIRCUIT DIAGRAM

A) FORWARD BIAS CHARACTERISTICS:

A) REVERSE BIAS CHARACTERISTICS:

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EXP.No.02 ZENER DIODE CHARACTERISTICS & REGULATOR USING ZENER DIODE

AIM:

To plot the volt ampere characteristics of a zener diode.

To determine its knee voltage, breakdown voltage also its static and dynamic

resistances in forward and reverse bias.

To determine the line and load regulation characteristics of a zener diode.

APPARATUS REQUIRED:


1 Zener diode IZ6 1No

2 Regulated Power supply (0-30V) 1No

3 Resistor 1KΩ 1No

4 Ammeter (0-1000µA) 1No

5 Ammeter (0-100 mA) 1No

6 Ammeter (0-200 mA) 2Nos

7 Voltmeter (0-1V) 1No

8 Voltmeter (0-20V) 1No

9 Decade Resistance Box (DRB) 1 No

10 Bread board - 1No

11 Connecting wires Single strand As required

THEORY:

A zener diode is heavily doped p-n junction diode, specially made to operate in the break

down region. A p-n junction diode normally does not conduct when reverse biased. But if the

reverse bias is increased, at a particular voltage it starts conducting heavily.

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MODEL GRAPH:

OBSERVATIONS:

A) FORWARD BIAS:

S.NO Applied Voltage(V) Forward Voltage(Vf) Forward Current(If(mA))

B) REVERSE BIAS:

S.NO Applied Voltage(V) Forward Voltage(Vr) Reverse Current((IR(μA))

CALCULATIONS:

Forward bias

Static forward resistance Rdc = Vf / If Ω

Dynamic forward resistance rac = ΔVf/ΔIf Ω

Reverse bias

Static reverse resistance Rdc = Vr/ Ir Ω

Dynamic reverse resistance rac = ΔVf/ΔIf Ω

For Load Regulation, % Voltage Regulation = (𝑉𝑁𝐿−𝑉𝐹𝐿)

𝑉𝐹𝐿 X 100

This voltage is called Break down Voltage. High current through the diode can

permanently damage the device. Applying a positive potential to the anode and a negative potential

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to the cathode of the zener diode establishes a forward bias condition. The forward characteristic

of the zener diode is same as that of a pn junction diode i.e. as the applied potential increases the

current increases exponentially. Applying a negative potential to the anode and positive potential

to the cathode reverse biases the zener diode.

As the reverse bias increases the current increases rapidly in a direction opposite to that of

the positive voltage region. Thus under reverse bias condition breakdown occurs. It occurs because

there is a strong electric filed in the region of the junction that can disrupt the bonding forces

within the atom and generate carriers. The breakdown voltage depends upon the amount of doping.

For a heavily doped diode depletion layer will be thin and breakdown occurs at low reverse

voltage and the breakdown voltage is sharp. Whereas a lightly doped diode has a higher

breakdown voltage. This explains the zener diode characteristics in the reverse bias region.

Basically there are two types of regulations such as:

Line Regulation: In this type of regulation, series resistance and load resistance are fixed,

only input voltage is changing. Output voltage remains the same as long as the input

voltage is maintained above a minimum value.

Load Regulation: In this type of regulation, input voltage is fixed and the load resistance

is varying. Output volt remains same, as long as the load resistance is maintained above a

minimum value.

PROCEDURE:

1) V- I CHARACTERISTICS:

a) Forward Bias Condition:

1. Connect the circuit as shown in figure .

2. Initially vary Vs in steps of 0.1V. Once the current starts increasing vary Vs in steps of 1V

up to 12V. Note down the corresponding readings of Vzf and Izf.

b) Reverse Bias Condition:

1. Connect the circuit as shown in figure (2).

2. Vary Vs gradually in steps of 1V up to 12V and note down the corresponding readings of

Vzr and Izr.

3. Tabulate different reverse currents obtained for different reverse voltages.

ZENER DIODE REGULATION CHARACTERISTICS

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A) LINE REGULATION:

MODEL GRAPH:

TABULATION:

Load resistance RL = KΩ

Sl.No. Input Supply

Voltage Vs

Zener current Iz

(mA)

Load current IL

(mA)

Regulated output

voltage Vo (V)

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2) Regulation characteristics:

a) Line Regulation

1. Connect the circuit for line regulation as shown in the figure.

2. Vary supply voltage (Vs) in steps of 1V from 0-15 Volts and note the corresponding

zener current (Iz), load current (IL) and output voltage (Vo).

3. Plot the graph between Vs and Vo taking Vs on X axis and Vo on Yaxis.

b) Load Regulation:

1. Connect the circuit for Load regulation as shown in figure .

2. Now fix the power supply voltage, Vs at 10V.

3. Without connecting the load RL, note down the No-Load Voltage (VNL).

4. Now connect the load (RL) using Decade Resistance Box (DRB) and vary the resistance in

steps 1K from 1K to10K / in steps of 10 K from10K to 100K and note the

corresponding Zener Current (IZ), Load Current (IL) and Output Voltage (VO) for 10

readings and calculate the percentage regulation.

5. Plot the graph between RL and VO taking RL on X-axis and VO on Y-axis.

PRECAUTIONS:

1. The terminals of the zener diode should be properly identified

2. While determined the load regulation, load should not be immediately shorted.

3. Should be ensured that the applied voltages & currents do not exceed the ratings of the diode.

RESULT:

Thus plotted the VI characteristics of Zener diode and determined its parameters:

a) Forward Bias Zener Diode:

1. The Knee voltage or Cut-in Voltage (Vy) is __________________ Volts.

2. The Dynamic Forward resistance is __________________ Ω.

3. The Static Forward resistance is __________________ Ω..

b) Reverse Bias of Zener Diode:

1. Zener Breakdown Voltage (VZ) is ____________________ Volts.

2. The Dynamic Reverse resistance is __________________ Ω

3. The Static Reverse resistance is __________________ Ω.

The percentage regulation of the Zener Diode is _______

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B) LOAD REGULATION:

MODEL GRAPH:

TABULATION:

Input supply voltage Vs = Volts

No load DC voltage, VNL = Volts

Sl.No Load resistance

RL (KΩ)

Zener current

Iz (mA)

Load current

IL (mA)

Output voltage

Vo (Volts)

% Voltage

regulation

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VIVAQUESTIONS:

1. What type of temp coefficient does the zener diode have?

2. If the impurity concentration is increased, how does the depletion width get effected?

3. Does the dynamic impendence of a zener diode vary?

4. Explain briefly about avalanche and zener breakdowns.

5. Draw the zener equivalent circuit.

6. Differentiate between line regulation & load regulation.

7. Which region zener diode can be used as a regulator?

8. How the breakdown voltage of a particular diode can be controlled?

9. What type of temperature coefficient does the Avalanche breakdown has?

10. By what type of charge carriers the current flows in zener and avalanche breakdown diodes?

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COMMON EMITTER INPUT-OUTPUT CHARACTERISTICS

SYMBOL:(NPN TRANSISTOR)) PIN DIAGRAM: (BOTTOM VIEW)

CIRCUIT DIAGRAM:

INPUT CHARACTERISTICS

OUTPUT CHARACTERISTICS

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EXP.No.02 COMMON EMITTER INPUT-OUTPUT CHARACTERISTICS

AIM:

To draw the input and output characteristics of transistor connected in CE configuration

To find β of the given transistor and also its h parameters.

APPARATUS REQUIRED:


1. Transistor BC107 1No

2. Dual Regulated Power supply (0-30V) 1No


4. Ammeter (0-30 mA) 1No

5. Ammeter (0-1000μA) 1No

6. Voltmeters (0-20V) , (0-1)V, (0-10)V Each 1No

7. Bread board - 1 No


THEORY:

In common emitter configuration, input voltage is applied between base and emitter

terminals and output is taken across the collector and emitter terminals. Therefore the emitter

terminal is common to both input and output. The input characteristics resemble that of a forward

biased diode curve. This is expected since the Base-Emitter junction of the transistor is forward

biased. As compared to CB arrangement IB increases less rapidly with VBE. Therefore input

resistance of CE circuit is higher than that of CB circuit. The output characteristics are drawn

between Ic and VCE at constant IB. the collector current varies with VCE up to few volts only.

After this the collector current becomes almost constant, and independent of VCE. The value of

VCE up to which the collector current changes with V CE is known as Knee voltage. The

transistor always

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MODEL GRAPH:

A) INPUT CHARACTERISTICS:

B) OUTPUT CHARACTERSITICS:

Calculations:

1. Input Characteristics: To obtain input resistance find VBE and IB for a constant VCE

on one of the input characteristics.

Input impedance = hie= Ri = VBE/ IB(VCEis constant)

Reverse voltage gain = hre= VEB/ VCE(IB= constant)

2. Output Characteristics: To obtain output resistance find ICand VCBat aconstant IB.

Output admittance 1/hoe = Ro = IC/ VCE(IBis constant)

Forward current gain = hfe = IC/ IB(VCE= constant)

3. Current amplification factor β = ΔIC/ΔIB

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Operated in the region above Knee voltage, IC is always constant and is approximately equal

to IB.The current amplification factor of CE configuration is given by

β = ΔIC/ΔIB

Input Resistance, ri = ΔVBE /ΔIB (μA) at Constant VCE

Output Résistance, ro = ΔVCE /ΔIC at Constant IB (μA)

PROCEDURE:

A) INPUT CHARACTERISTICS

1. Connect the circuit as per the circuit diagram.

2. For plotting the input characteristics the output voltage VCE is kept constant at 1V and for

different values of VBB , note down the values of IB and VBE

3. Repeat the above step by keeping VCE at 2V and 4V and tabulate all the readings.

4. Plot the graph between VBE and IB for constant VCE

B) OUTPUT CHARACTERISTICS:

1. Connect the circuit as per the circuit diagram

2. For plotting the output characteristics the input current IB is kept constant at 50μA and for

different values of VCC note down the values of IC and VCE

3. Repeat the above step by keeping IB at 75 μA and 100 μA and tabulate the all the readings

4. Plot the graph between VCE and IC for constant IB

PRECAUTIONS:

1. The supply voltage should not exceed the rating of the transistor

2. Meters should be connected properly according to their polarities

RESULT:

Thus obtained the input and output characteristics of transistor connected in CE

configuration and determined its parameters as follows.

Input impedance = hie= Ri =

Reverse voltage gain = hre=

Output admittance 1/hoe = Ro =

Forward current gain = hfe =

Current amplification factor β =

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TABULATION:

Input Characteristics

VBB (Volts)

VCE = 0V VCE = 5V

VBE

(Volts)

IB

(µA)

VBE

(Volts)

IB

(µA)

Output Characteristics

VCC

(Volts)

IB = 0 µA IB = 20 µA IB = 40 µA

VCE

(Volts)

IC

(mA)

VCE

(Volts)

IC

(mA)

VCE

(Volts)

IC

(mA)

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VIVA QUESTIONS:

1. What is the range of β for the transistor?

2. What are the input and output impedances of CE configuration?

3. Identify various regions in the output characteristics.

4. What is the relation between α and β?

5. Define current gain in CE configuration.

6. Why CE configuration is preferred for amplification?

7. What is the phase relation between input and output?

8. Draw diagram of CE configuration for PNP transistor.

9. What is the power gain of CE configuration?

10. What are the applications of CE configuration?

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COMMON BASE INPUT-OUTPUT CHARACTERISTICS

SYMBOL: (NPN TRANSISTOR)) PIN DIAGRAM: (BOTTOM VIEW)

CIRCUIT DIAGRAM:

INPUT CHARACTERISTICS

OUTPUT CHARACTERISTICS

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EXP.No.04 COMMON BASE INPUT-OUTPUT CHARACTERISTICS

AIM:

To observe and draw the input and output characteristics of a transistorconnected in

common base configuration.

To find α of the given transistor and also its h parameters.

APPARATUS REQUIRED:

S.No Name of the apparatus Range Quantity

1 Transistor BC107 1No

2 Regulated Power supply (0-30V) 1No

3 Resistor 1KΩ 2No

4 Ammeters (0-100 mA) 2No

5 Voltmeters (0-20V), (0-1)V 2Nos, 1 No

6 Bread board - 1 No


THEORY:

A transistor is a three terminal active device. The terminals are emitter, base, collector. In

CB configuration, the base is common to both input (emitter) and output (collector). For normal

operation, the E-B junction is forward biased and C-B junction is reverse biased. In CB

configuration, IE is +ve, IC is –ve and IB is –ve. So,

VEB = F1 (VCB, IE) and

IC = F2 (VEB,IB)

With an increasing the reverse collector voltage, the space-charge width at the output

junction increases and the effective base width „W‟ decreases. This phenomenon is known as

“Early effect”. Then, there will be less chance for recombination within the base region. With

increase of charge gradient with in the base region, the current of minority carriers injected across

the emitter junction increases. The current amplification factor of CB configuration is given by,

EXPECTED GRAPHS:

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B) OUTPUTCHARACTERISTICS

CALCULATIONS:

1. Input Characteristics: To obtain input resistance, find VEE and IE for a constant VCB

on one of the input characteristics.

Input impedance = hib = Ri = VEE / IE (VCB = constant)

Reverse voltage gain = hrb = VEB / VCB (IE = constant)

2. Output Characteristics: To obtain output resistance, find IC and VCB at a constant IE.

Output admittance = hob = 1/Ro = IC / VCB (IE = constant)

Forward current gain = hfb = IC / IE (VCB = constant)

3. Current amplification factor α = ΔIC/ ΔIE

α = ΔIC/ ΔIE

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Input Resistance, ri = ΔVBE /ΔIEat Constant VCB

Output Résistance, ro = ΔVCB /ΔICat Constant IE

PROCEDURE:



2. For plotting the input characteristics, the output voltage VCE is kept constant at 0V and for

different values of VEE ,note down the values of IE and VBE

3. Repeat the above step keeping VCB at 2V, 4V, and 6V and all the readings are tabulated.

4. A graph is drawn between VEB and IE for constant VCB.

B) OUTPUT CHARACTERISTICS:


2. For plotting the output characteristics, the input IE is kept constant at 0.5mA and for different

values of VCC, note down the values of IC and VCB.

3. Repeat the above step for the values of IE at 1mA, 5mA and all the readings are tabulated.

4. A graph is drawn between VCB and Ic for constant IE

PRECAUTIONS:

1. The supply voltages should not exceed the rating of the transistor.

2. Meters should be connected properly according to their polarities.

RESULT:

Thus obtained the input and output characteristics of transistor connected in CB

configuration and determined its parameters as follows.

Input impedance = hib = Ri =

Reverse voltage gain = hrb =

Output admittance = hob = 1/Ro =

Forward current gain = hfb =

Current amplification factor α = ΔIC/ ΔIE

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TABULATION:

Input Characteristics

VEE (Volts)

VCB = 0V VCB = 4V

VEB (Volts) IE (mA) VEB (Volts) IE (mA)

Output Characteristics

VCC

(Volts)

IE = 0mA IE = 5V IE = 10mA

VCB

(Volts)

IC

(mA)

VCB

(Volts)

IC

(mA)

VCB

(Volts)

IC

(mA)

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VIVA QUESTIONS:

1. What is the range of α for the transistor?

2. Draw the input and output characteristics of the transistor in CB configuration.

3. Identify various regions in output characteristics.

4. What is the relation between α and β?

5. What are the applications of CB configuration?

6. What are the input and output impedances of CB configuration?

7. Define α (alpha).

8. What is early effect?

9. Draw Circuit diagram of CB configuration for PNP transistor.

10. What is the power gain of CB configuration?

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JFET CHARACTERISTICS

SYMBOL PIN DIAGRAM:

CIRCUIT DIAGRAM:

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EXP.No.05 FET CHARACTERISTICS

AIM:

To determine the drain & transfer characteristics of given JFET & to find its parameters.

APPARATUS REQUIRED:

THEORY:

Operation:

The circuit diagram for studying drain and transfer characteristics is shown in the fig.

1. Drain characteristics are obtained between the drain to source voltage (VDS)

and drain current (ID) taking gate to source voltage (VGS) as the constant

parameter.

2. Transfer characteristics are obtained between the gate to source voltage (VGS)

and drain current (ID) taking drain to source voltage (VDS) as the constant

parameter.


1 FET BFW 10 1No

2 Dual Regulated Power supply (0-30V) 1No

3 Resistor 1KΩ, 100KΩ Each 1No

4 Ammeters (0-200 mA) 1No

5 Voltmeters (0-20V) 2Nos.

6 Bread board - 1 No


34 | P a g e

EXPECTED GRAPHS:

A) DRAIN CHARACTERISTICS

B) TRANSFER CHARACTERISTICS:

CALCULATION:

1. Drain resistance (rd) = ΔVDS/ΔID

2. Trans conductance (gm) = ΔID/ΔVGS

3. Amplification factor (μ) =rd*gm.

35 | P a g e

PROCEDURE:

DRAIN CHARACTERISTICS:


2. Set gate voltage VGS=-1, vary the drain voltage VDS instep of 1V & note down the

corresponding drain current ID.

3. Repeat the above procedure for VGS=0V,-2V. 4. Plot the graph for a constant VDS Vs ID

5. Find the drain resistance (rd) = ΔVDS/ΔID

TRANSFER CHARACTERISTICS:


2. Set gate voltage VDS=1V, vary the gate voltage VGS in step of 1V and note down the

corresponding drain current ID

3. Repeat the above procedure for VDS=5V, 10V.

4. Plot the graph for VGS Vs ID.

5. Find the Trans conductance (gm) gm = ΔID/ΔVGS

RESULT:

Thus the drain and transfer characteristics of JFET is drawn and the parameters were

determined.

1. Drain resistance (rd) =…………

2. Trans conductance (gm) =…………

3. Amplification factor (μ) =………...

36 | P a g e

VIVA QUESTIONS:

1. Why FET is called as VVR?

2. What is unipolar device?

3. What is the advantage of high input resistance in FET?

4. List the applications of FET Device.

5. Mention the merits and demerits of FET compared to BJT.

37 | P a g e

SCR CHARACTERISTICS

SYMBOL PIN DIAGRAM

CIRCUIT DIAGRAM:

V-I CHARACTERISTICS:

38 | P a g e

EXP.No.06 SILICON-CONTROLLED RECTIFIER (SCR) CHARACTERISTICS

AIM:

To obtain the V-I Characteristics of SCR and also to determine the break over voltage and holding

current.

APPARATUS REQUIRED:


1. SCR TYN616 1No

2. Dual Regulated Power supply (0-30V) 1No

3. Resistor 10KΩ,1KΩ Each 1

4. Ammeters (0-50) mA 1No

5. Voltmeters (0-10V) 1No

6. Bread board - 1 No


THEORY:

It is a four layer semiconductor device being alternate of P-type and N-type silicon. It

consists of 3 junctions J1, J2, J3 the J1 and J3 operate in forward direction and J2 operates in

reverse direction and three terminals called anode A, cathode K , and a gate G. The operation of

SCR can be studied when the gate is open and when the gate is positive with respect to cathode.

When gate is open, no voltage is applied at the gate due to reverse bias of the junction J2 no

current flows through R2 and hence SCR is at cut off. When anode voltage is increased J2 tends to

breakdown. When the gate positive, with respect to cathode J3 junction is forward biased and J2 is

reverse biased .Electrons from N-type material move across junction J3 towards gate while holes

from P-type material moves across junction J3 towards cathode. So gate current starts flowing,

anode current increase is in extremely small current junction J2 break down and SCR conducts

heavily.

39 | P a g e

OBSERVATION:

VAK(V) IAK ( μA)

When gate is open thee break over voltage is determined on the minimum forward voltage

at which SCR conducts heavily. Now most of the supply voltage appears across the load

resistance. The holding current is the maximum anode current gate being open, when break over

occurs.

PROCEDURE:

1. Connections are made as per circuit diagram.

2. Keep the gate supply voltage at some constant value

3. Vary the anode to cathode supply voltage and note down the readings of voltmeter and ammeter.

Keep the gate voltage at standard value.

4. A graph is drawn between VAK and IAK.

5. From the graph note down the threshold voltage and Holding current values.

CALCULATIONS:

Threshold Voltage =

Holding Current =

RESULT:

The V-I Characteristics of the SCR have been plotted.

40 | P a g e

VIVA QUESTIONS:

1. What the symbol of SCR?

2. In which state SCR turns of conducting state to blocking state?

3. What are the applications of SCR?

4. What is holding current?

5. What are the important types thyristors?

6. How many numbers of junctions are involved in SCR?

7. What is the function of gate in SCR?

8. When gate is open, what happens when anode voltage is increased?

9. What is the value of forward resistance offered by SCR?

10. What is the condition for making from conducting state to non conducting state?

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EXP.No.07CLIPPER AND CLAMPER & FWR

AIM:

To design a Clipping circuit for the given specifications and also plot the graph..

APPARATUS REQUIRED:



2. Resistor 1Kohm 1No

3. Capacitor 1No

4. Diode IN 4007 1No

5. CRO 1No

6. Function Generator 1No

7. Multimeter 1No

8. Bread board 1No

9. Connecting wires 1No

Circuit Diagram:-

42 | P a g e

Series Clippers

a) To pass –ve peak above Vr level :-

c) To pass +ve peak above Vr level :-

Clamper circuit:

43 | P a g e

PROCEDURE: -

1. Connections are made as shown in the circuit diagram.

2. A sine wave Input Vi whose amplitude is greater than the clipping level is applied.

3. Output waveform Vo is observed on the CRO.

4. Clipped voltage is measured and verified with the designed values.

Viva Questions:

1. What is the need of wave shaping circuit in electronic?

2. What type of energy is stored in capacitor and inductor?

3. List the applications of clipper and clamper circuits.

4. Mention the role of clamper in real time application.

EXP. No. 08 (A) VERIFICATION OF THEVENIN’S THEOREM

44 | P a g e

AIM:

To verify Thevenin theorem and to find the current flowing through the load resistance.

APPARATUS REQUIRED:



11. Resistor 2.2KΩ,1KΩ Each 1

12. Resistor 3.3KΩ,2.7KΩ Each 1

13. Ammeters (0-5) mA 1No

14. Voltmeters (0-5V) 1No

15. Bread board

16. Connecting wires

THEORY:

Thevenin`s theorem:

Any linear active network with output terminals can be replaced by a single voltage source

Vth in series with a single impedance Zth. Vth is the Thevenin`s voltage. It is the voltage between

the terminals on open circuit condition, Hence it is called open circuit voltage denoted by Voc. Zth

is called Thevennin`s impedance. It is the driving point impedance at the terminals when all

internal sources are set to zero too.

If a load impedance ZL is connected across output terminals, we can find the current

through it IL = Vth/ (Zth + ZL).

45 | P a g e

CIRCUIT DIAGRAM:

EQUVALENT CIRCUIT:

TABULATION:

Vth Rth IL(mA)

Theoretical Practical Theoretical Practical Theoretical Practical

46 | P a g e

PROCEDURE:


2. Check your connections before switch on the supply.

3. Find the Thevenin’s voltage (or) open circuit voltage.

4. Replace voltage source by internal resistor.

5. Determine the Thevenin’s resistance.

6. Find IL by using Thevenin’s formula.

7. Compare the observation reading to theoretical value.

8. switch off the supply

9. Disconnect the circuit.

RESULT:

Thus the Thevenin’s theorem was verified.

Theoretical: Practical:

Vth = Vth =

Rth = Rth =

IL = IL =

B)VERIFICATION OF NORTON’S THEOREM

AIM:

47 | P a g e

To verify Norton’s theorem and to determine the current flow through the load resistance.

COMPONENTS REQUIRED:



2. Resistor 10KΩ,5.6KΩ Each 1

3. Resistor 8.2KΩ,6KΩ Each 1

4. Ammeters (0-10) mA,mc 1No

5. Ammeters (0-5)mA,mc 1No

6. Bread board

7. Connecting wires

Norton’s theorem:

Any linear active network with output terminals can be replaced by a single current source.

Isc in parallel with a single impedance Zth. Isc is the current through the terminals of the active

network when shorted. Zth is called Thevennin`s impedance.

Current through RL= Isc Zth/( Zth+ZL)

CIRCUIT DIAGRAM:

48 | P a g e

NORTON`S EQUIVALENT CIRCUIT:

TABULATION:

Theoretical Practical

Isc

Rth

Isc

Rth

PROCEDURE:


49 | P a g e


3. Find the Norton’s current (or) short circuit current in load resistance.

4. Replace voltage source by internal resistor.

5. Determine the equivalent’s resistance.

6. Find IL by using Norton’s formula.


8. Switch off the supply


RESULT:

Thus the Norton’s theorem was verified.

Theoretical: Practical:

Isc = Isc =

Rth = Rth =

IL = IL =

Viva Questions:

1. State thevenin theorem.

2. What is the need of thevenin & Norton theorem?

3. List the application of these twotheorems.

4. Define voltage and current division rule.

EXP.No.09 VERIFICATIONS OF KVL & KCL

AIM:

50 | P a g e

To verify (i) kirchoff’s current law (ii) kirchoff’s voltage law

(i) KIRCHOFF’S CURRENT LAW:





3. Ammeters (0-10) mA,mc 3No

4. Bread board 1No

5. Connecting wires As

required

THEORY:

Krichoff’s current law: The algebraic sum of the currents entering in any node is Zero. The

law represents the mathematical statement of the fact change cannot accumulate at a node. A node

is not a circuit element and it certainly cannot store destroy (or) generate charge. Hence the current

must sum to zero. A hydraulic analog sum is zero. For example consider three water pipes joined

pn the shape of Y. we defined free currents as following into each of 3 pipes. If we insists that

what is always

CIRCUIT DIAGRAM:

1. Kirchhoff’s current law:

51 | P a g e

Practical measurement:

TABULATION:

Voltage (V) Total current I(mA) I1(mA) I2(mA)

PROCEDURE:



3. Vary the regulated supply.

4. Measure the current using ammeter.

5. Note the readings in the tabulation.


ii) KIRCHOFF’S VOLTAGE LAW:


52 | P a g e

THEORY:

(i) Kirchhoff’s voltage law

The algebraic sum of the voltage around any closed path is zero. The law represents the

mathematical statement of the fact change cannot accumulate at a node. A node is not a circuit

element and it certainly cannot store destroy (or) generate charge. Hence the current must sum to

zero. A hydraulic analog sum is zero. For example consider three water pipes joined pn the shape

of Y. we defined free currents as following into each of 3 pipes. If we insists that what is always

CIRCUIT DIAGRAM:

Krichoff’s voltage law:

Kirchoff`s voltage law

Practical measurement:

Practical measurement



2. Resistor 1KΩ,2.2KΩ, 3.3

KΩ

Each 1

3. Voltmeter (0-20) V, 3No

4. Bread board 1No

5. Connecting wires As required

53 | P a g e

TABULATION:

Voltage (V) V1 (volts) V2 (volts) V3 (volts)

PROCEDURE:



3. Vary the regulated supply.

4. Measure the voltage using voltmeter.

5. Note the readings in the tabulation.


RESULT:

Thus the Kirchhoff’s current law and voltage law were verified.

EXP.No.10 VERIFICATIONS OF SUPER POSITION THEOREM

54 | P a g e

AIM:

To verify the superposition theorem and also to determine the current following through the

load resistance.

APPARATUS REQUIRED:

Superposition theorem

In a linear circuit containing more than one source, the current that flows at any point or the

voltage that exists between any two points is the algebraic sum of the currents or the voltages that

would have been produced by each source taken separately with all other sources removed.

PROCEDURE:



3. Determine the current through the load resistance.

4. Now one of the sources is shorted and the current flowing through the resistance IL measured by

ammeter.

5. Similarly, the other source is shorted and the current flowing through the resistance IL measured

by ammeter.

6. Compare the value obtained with the sum of I1&I2 should equal to I


8. Switch off the supply.




2. Resistor 1KΩ,220KΩ,

470 KΩ

Each 1

3. Voltmeter (0-5) V, 1No

4. Ammeters (0-1)mA,mc 1No

5. Bread board 1No


55 | P a g e

Circuit diagram

Superposition

Tabulation:

V(volt) I1(mA) I2(mA) I3(mA)

V1 V2 Theoretical Practical Theoretical Practical Theoretical Practical

PROCEDURE:



3. Determine the current through the load resistance.

56 | P a g e

4. Now one of the sources is shorted and the current flowing through the resistance IL measured by

ammeter.

5. Similarly, the other source is shorted and the current flowing through the resistance IL measured

by ammeter.

6. Compare the value obtained with the sum of I1&I2 should equal to I


8. Switch off the supply


RESULT:

Thus the superposition theorem was verified.

EXP. No. 11 VERIFICATIONS OF MAXIMUM POWER TRANSFER & RECIPROCITY

THEOREM

AIM:

57 | P a g e

To find the value of resistance RL in which maximum power is transferred to the load

resistance.

APPARATUS REQUIRED:

Maximum power transfer theorem:

Maximum power transfer to the load resistor occurs when it has a value equal to the

resistance of the network looking back at it from the load terminals.

CIRCUIT DIAGRAM:

MODEL GRAPH:



2. Resistor 1KΩ,2.2KΩ Each 1

3. Ammeter (0-10) mA, 1No

4. Bread board 1No


6. DRB (0-10)KΩ 1No

58 | P a g e

TABULATION:

Resistance (RL) Current I(mA) Power =I2RL

PROCEDURE:

1. Connections are given as per the circuit diagram.

2. By giving various values of the resistance in DRB, note the ammeter Reading.

3. Calculate the power and plot the power Vs resistance graph.

4. Note the maximum power point corresponding resistance from the graph.

RESULT:

Thus the value of unknown resistance in which the maximum power is transferred to the

load was found.

Theoretical load resistance =

Practical load resistance =

Maximum power =

B) VERIFICATION OF RECIPROCITY THEOREM

59 | P a g e

AIM:

To verify Reciprocity theorem and also to determine the current flow through the load

resistance.

APPARATUS REQUIRED:

THEORY:

Reciprocity theorem

In a linear, bilateral network a voltage source V volt in a branch gives rise to a current I, in

another branch. If V is applied in the second branch the current in the first branch will be I. This

V/I are called transfer impedance or resistance. On changing the voltage source from 1 to branch 2,

the current in branch 2 appears in branch 1.

CIRCUIT DIAGRAM:



2. Resistor 100Ω,470Ω,

820Ω, 100Ω

Each 1

3. Ammeter (0-30) mA, 1No

4. Bread board 1No


60 | P a g e

TABULATION:

Practical value :( circuit -I)

V(volt)

I(mA)

Z=V/I

PRACTICAL VALUE :( CIRCUIT -I)

V(volt)

I(mA)

Z=V/I

PROCEDURE:

61 | P a g e

1. Connect the circuit as per the circuit diagram.

2. Switch on the supply and note down the corresponding ammeter readings.

3. Find ratio of input voltage to output current.

4. Interchange the position of the ammeter and power supply. Note down the Corresponding

ammeter readings

5. Verify the reciprocity theorem by equating the voltage to current ratio.

RESULT:

Thus the reciprocity theorem was verified.

62 | P a g e

EXP. No.12 DETERMINATION OF RESONANCE FREQUENCY OF SERIES &

PARALLEL RLC CIRCUITS

AIM:

To obtain the resonance frequency of the given RLC series electrical network.

FORMULA USED:

Series resonance frequency F=1/ (2п √ (LC))

CIRCUIT DIAGRAM:

Series resonance:

TABULATION:

FREQUENCY

(HZ)

VR(VOLT)

63 | P a g e

CIRCUIT DIAGRAM

Parallel resonance:

TABULATION:

FREQUENCY

(HZ)

VR(VOLT)

PROCEDURE:


2. Vary the frequency of the function generator from 50 Hz to 20 KHz.

3. Measure the corresponding value of voltage across the resistor R for series RLC circuit.

4. Repeat the same procedure for different values of frequency.

5. Tabulate your observation.

6. Note down the resonance frequency from the graph.

RESULT:

Thus the resonance frequency of series RLC circuit is obtained.

Practical value =

Theoretical value =

Thus the resonance frequency of Parallel RLC circuit is obtained.

Practical value =

Theoretical value =

64 | P a g e

EXP. No.13 TRANSIENT ANALYSIS OF RL AND RC CIRCUITS

AIM:

To construct RL & RC transient circuit and to draw the transient curves.

APPARATUS REQUIRED:

THEORY:

Electrical devices are controlled by switches which are closed to connect supply to the

device, or opened in order to disconnect the supply to the device. The switching operation will

change the current and voltage in the device. The purely resistive devices will allow instantaneous

change in current and voltage.

An inductive device will not allow sudden change in current and capacitance device will

not allow sudden change in voltage. Hence when switching operation is performed in inductive

and capacitive devices, the current & voltage in device will take a certain time to change from pre

switching value to steady state value after switching. This phenomenon is known as transient. The

study of switching condition in the circuit is called transient analysis.The state of the circuit from

instant of switching to attainment of steady state is called transient state. The time duration from

the instant of switching till the steady state is called transient period. The current & voltage of

circuit elements during transient period is called transient response.

FORMULA:

S.No Name of the apparatus Range Type Quantity

1. Regulated Power supply (0-30V) DC 1No

2. Voltmeter (0-10)V MC 1No

3. Ammeter (0-30) mA, MC 1No

4. Resistor 10 K Ω, 3No

5. Capacitor 1000 μ F 1No

6. Bread board

7. Connecting wires

65 | P a g e

Time constant of RC circuit = RC

PROCEDURE:

Connections are made as per the circuit diagram.

Before switching ON the power supply the switch S should be in off position

Now switch ON the power supply and change the switch to ON position

The voltage is gradually increased and note down the reading of ammeter and voltmeter for

each time duration in RC.In RL circuit measure the Ammeter reading.

Tabulate the readings and draw the graph of Vc(t)Vs t

CIRCUIT DIAGRAM:

RL CIRCUIT:

66 | P a g e

TABULATION:

S.No. TIME (msec) CHARGING

CURRENT (I) A

DISCHARGING

CURRENT (I) A

MODEL GRAPH:

CIRCUIT DIAGRAM:

RC CIRCUIT:

67 | P a g e

MODEL GRAPH:

CHARGING DISCHARGING

TABULATION:

CHARGING:

S.No. TIME

(msec)

VOLTAGE

ACROSS ‘C’(volts)

CURRENT

THROUGH‘C’ (mA)

68 | P a g e

TABULATION:

DISCHARGING:

S.No. TIME (msec) VOLTAGE

ACROSS ‘C’(volts)

CURRENT

THROUGH‘C’ (mA)

RESULT:

Thus the transient response of RL & RC circuit for DC input was verified.

69 | P a g e

EXP. No.14 Study the V-I Characteristics of LED

AIM:- A study of V-I characteristics of light emitting diode (LED).

APPARATUS REQUIRED:

CIRCUIT DIAGRAM:-

Theory: -

A Light Emitting Diode (LED) is a semiconductor diode mode by creation of junction of n type

and p type material. Thus the principle of LED action works precisely the same way that we

described the creation of permanent light radiation. Alternatively w can say that the external

energy provided by V excites electrons at the conduction band to the valence band and recombine

with hole. The net result is the light radiation.

S.No Name of the apparatus Range Type Quantity

1. Regulated Power supply (0-30V) DC 1No

2. Voltmeter (0-10)V MC 1No

3. Ammeter (0-50) mA, MC 1No

4. LED 3V 1No

5. Rheostat

- - 1No

70 | P a g e

Fig. 1. Working Principle of LED

It consists of an encapsulated chip of semiconductor diode with a suitable lens. The length of

anode terminal is greater than cathode terminal. LEDs are based on the semiconductor diode.

When the diode is forward biased (switched on), electrons are able to recombine with holes and

energy is released in the form of light. This effect is called electroluminescence and the color of

the light is determined by the energy gap of the semiconductor. The LED is usually small in area

(less than 1 mm) with integrated optical components to shape its radiation pattern and assist in

reflection.

PROCEDURE:-

Make the connections as shown in circuit diagram. Switch on the power supply.

The voltage is set at 0 V and the current through the LED shown by milliammeter is

recorded.

With the help of slider of rheostat, the voltage is increased in steps of 0.2 V.

For each setting of the voltage, corresponding current shown by the microammeter is noted.

The observatuions are recorded in table.

71 | P a g e

TABULATION:

Forward Voltage

(Volts)

Forward Current (mA)

0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

MODEL GRAPH:-

The graph is plotted, by taking forward voltage on the positive x axis and forward current on the

positive y axis

RESULT:-

1. The LED characteristics are similar to pn-junction forward characteristics.

2. The cut-in voltage (the voltage at which conduction begins) for LED is Volts.

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