designing for low power with programmable system solutions · 2008. 5. 29. · computing...
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Designing for Low Power with Programmable System Solutions
Designing for Low Power with Programmable System SolutionsDr. Yankin Tanurhan, Vice President, System Solutions and Advanced Applications
23/14/2008DATE 2008 – Reconfigurable Hardware
OverviewOverview
Why is power a problem?
What can FPGAs do?
Are we safe now?
What else can FPGAs do?
Summary
33/14/2008DATE 2008 – Reconfigurable Hardware
The Shrink and Its ImpactThe Shrink and Its Impact
Speed Cost Power
43/14/2008DATE 2008 – Reconfigurable Hardware
Semiconductor Industry Challenges Semiconductor Industry Challenges
Static power increases significantly at <100nm geometriesSub-threshold Leakage
Raising VT helps, but there’s a limitStrain helps, but that’s already been doneWorsens with reduced voltage
Power and speed at odds Power is becoming a market limiter
Source: Int’l Technology Roadmap for Semiconductors (ITRS)
Static Power(leakage)
Dynamic Power
Process Node (nm)
1990 1995 2000 2005 2010 2015 2020
0.0000001
0.0001
0.01
1
100
500 250 180 90 45 22
Nor
mal
ized
Pow
er
53/14/2008DATE 2008 – Reconfigurable Hardware
What about Dynamic Power?What about Dynamic Power?
Power = CV2F
C - Low K helps, but increasing due to higher densities
V - Fell previously, but now same
F - Increasing steadily
63/14/2008DATE 2008 – Reconfigurable Hardware
Semiconductor Fab Cost TrendSemiconductor Fab Cost Trend
Rising Fab Cost
Wafer 4”/5” 5”/6” 6” 6”/8” 8” 8” 12” 12”
Process 1.2um 1.0um 0.8um 0.5um 0.35um 0.25um 0.13um 0.09um
0
500
1000
1500
2000
2500
3000
3500
4000
4500
5000
1983 1987 1990 1994 1997 1999 2001 2003 2005 2007
Source: UMC
$200M$300M $400M
$700M
$1,250M
$1,750M
$3,000M
$3,600M
$4,300M
$5,000M
73/14/2008DATE 2008 – Reconfigurable Hardware
Trends Continue to Drive Demand for Low-power FPGAsTrends Continue to Drive Demand for Low-power FPGAs
Portable and battery-operated electronics proliferationHyper-competitive markets with shorter product lifecycles and evolving standards
Increasing need for interfacing, bridging and control
Power budgets tightenFeatures, performance and complexity grow, but not at expense of draining the battery or increasing footprint
Static power consumption and low-power modes most important for portables
83/14/2008DATE 2008 – Reconfigurable Hardware
Substantial leakage per cellHigh static current
Bit Line Vdd Vdd Bit Line
Word Line
Typical Competitors SRAM Cell – 6T
Flash Cell – 1T
Flash’s Fundamental AdvantageFlash’s Fundamental Advantage
Negligible leakage per cellUltra-low static current
93/14/2008DATE 2008 – Reconfigurable Hardware
What have we done?What have we done?
Technology and DesignIntegrate flash and high-speed embedded logic process
Deploy low power Vt options, multiple threshholds
Single supply for core and I/OsAs low as 1.2V
Seamless low-power implementation modesStatic, Flash*Freeze
Feature-richRAM, PLL, I/O standards, Cortex-M1
103/14/2008DATE 2008 – Reconfigurable Hardware
Power-Aware ToolsPower-Aware Tools
Power-driven LayoutYields lowest power consumption possibleReduces dynamic power by 30%
Timing-driven layout Power-driven layout
SmartPowerCreate power profiles based on functional modesCycle-accurate analysisSpurious transitions analysisBattery life estimation toolEnable variable voltage use modes
113/14/2008DATE 2008 – Reconfigurable Hardware
A Static Power ComparisonA Static Power Comparison
IGLOO PLUS 5µW
CompetitorsLow-power CPLDs
SRAM-based, low-power PLDs
10x higher power
Mic
row
atts
5µW10µW
IGLO
O PLUS
Competitor A
Competitor B
IGLO
O PLUS
Competitor A
Competitor B
52µW59µW 58µW
90µW
30k system gates 60k system gates
123/14/2008DATE 2008 – Reconfigurable Hardware
Declare victory and go homeDeclare victory and go home
133/14/2008DATE 2008 – Reconfigurable Hardware
Server FarmsServer Farms
1.2% of electricity consumed in the US is used in server farms
143/14/2008DATE 2008 – Reconfigurable Hardware
Power for:
i.e. Total Power = 2.2x Server Power
Server MathServer Math
100% Server60% Fan and Air Conditioning 60% Switch, Router and Network
220%
153/14/2008DATE 2008 – Reconfigurable Hardware
Industry Reacts with System Management StandardsIndustry Reacts with System Management Standards
Telecommunications Computing Architecture (TCA)
Standards by PCI Industrial Computer Manufacturers Group (PICMG)
Advanced Telecommunications Computing Architecture (ATCA)
Architecture for high-performance, high-density, packet-based systemsCurrent rev is PICMG 3.0 R2.0 ECN002 adopted April 2006
Advanced Mezzanine Card (AMC)Extends ATCAs high-bandwidth multi-protocol interface to hot-swappable modules for easy design, scaling and servicingCurrent rev is PICMG AMC.0 R2.0 adopted November 2006
163/14/2008DATE 2008 – Reconfigurable Hardware
Industry System Management Standards (cont.)Industry System Management Standards (cont.)
MicroTCA (μTCA)Smaller form-factor chassis delivers central power management, lower cost, high availabilityCurrent rev is PICMG MTCA.0 R1.0 adopted 06 July 2006
Intelligent Platform Management Interface (IPMI)Intelligent Platform Management Bus (IPMB) defines internal management bus for extending platform management within a chassis Intelligent Chassis Management Bus (ICMB) defines external management bus between IPMI enabled systemsATCA, AMC and MicroTCA all communicate using IPMI protocolCurrent rev is IPMI v2.0 rev. 1.0 spec markup for IPMI v2.0/v1.5errata rev 3 dated February 2006
173/14/2008DATE 2008 – Reconfigurable Hardware
Customers Need System ManagementCustomers Need System Management
Manage power uppower sequencing status monitoring
Monitor sensors and report status, sensor dataTemperatureVoltageCurrentBoot Status
Take immediate actions based on sensor readingsOver/under-voltageCurrent & temp
Communicate with system controllers/hubsOversee system inventoriesImplement system-level redundancyManage hot swapRespond to management queries and commands
183/14/2008DATE 2008 – Reconfigurable Hardware
Bridging Analog and Digital Worlds- Fusion Programmable System ChipBridging Analog and Digital Worlds- Fusion Programmable System Chip
Integrated solution today with compelling featuresFusion system management solutions are here today
System management includes following benefits:Overall lower power, with intelligent power managementBOM reduction
Fusion roadmap will continue to extend these benefits
Integrated clock resourcesConfigurable Analog
Embedded FlashMemory
ProgrammableSystem Chip
Flash FPGA Fabric
LUT
193/14/2008DATE 2008 – Reconfigurable Hardware
GPIO
FLASH Memory
JTAG Port
A3P FPGA Fabric
(incl. SRAM, CCC/PLL, IO)
Xtal OSC,RC OSC,
RTC, Vreg
Fusion Analog FeaturesFusion Analog Features
Successive Approximation Register (SAR) ADC
Up to 12 bit or 600 KspsBetter than 1% total channel accuracy with calibrationInternal reference voltage
Built in sample and holdIncreases accuracy of dynamic signals
Analog I/O± 12 V TolerantUp to 30 channels inputCurrent monitor block
2 mV resolutionTemperature monitor block
+ 30 C accuracy+50 C Offset
MOSFET Gate driver outputProgrammable drive strengthP and N channel devices
AnalogInputs
MOSFETOutputs
A/DAna
Mux
Ana
Mux
203/14/2008DATE 2008 – Reconfigurable Hardware
Fusion Flash FeaturesFusion Flash Features
Flash memory 2 Mb density1 – 4 blocks/deviceEach 2 Mb array operates independently supporting multiple partitionsSmall page size (1kb)Independent JTAG access
Supports High performance60 ns random accessPipelined 10 ns access of sequential memory addresses
Flash Memory level:FPGA accessPassword securityJTAG access for programming
Page level:JTAG read / write protectionProgram/erasePartition on page boundaries
Block level error detect:Single error correctDouble error detect
GPIO
AnalogInputs
MOSFETOutputs
A/DAna
Mux
JTAG Port
Ana
Mux
A3P FPGA Fabric
(incl. SRAM, CCC/PLL, IO)
Xtal OSC,RC OSC,
RTC, VregFLASH Memory
213/14/2008DATE 2008 – Reconfigurable Hardware
GPIO
FLASH Memory
AnalogInputs
MOSFETOutputs
A/DAna
Mux
JTAG Port
Ana
Mux
A3P FPGA Fabric
(incl. SRAM, CCC/PLL, IO)
Comprehensive Clocking ResourcesComprehensive Clocking Resources
Fusion builds up clocking resources:
On chip clock sources:CCC (6) / PLLs (1 or 2)RC oscillatorCrystal Oscillator
Real Time Counter (RTC)Use Models
Internal 100MHz RC oscillator±2% over I-temp range
Crystal OSC circuit32 KHz – 20 MHz
CCC/PLLs can multiply, divide, and phase shifts clock signals for user applications
Sources include: crystal Osc, RC Osc, or external clock
RTC enables low power standby mode
Xtal OSC,RC OSC,
RTC, Vreg
223/14/2008DATE 2008 – Reconfigurable Hardware 22Feb.19, 2008
SummarySummary
Power-conscious design is becoming more critical
Not only choice of components, but power-smart design Actel is focused on attacking power consumption at chip and system levels with
Innovative low-power FPGAs and programmable system chips Targeted FPGA-based reference designs and boardsPower optimization tools
At 5µW, Actel’s IGLOO family is the low-power programmable logic leader