differential six-port transceiver design and analysis from a

Department of Science and Technology Institutionen för teknik och naturvetenskap Linköping University Linköpings universitet

gnipökrroN 47 106 nedewS ,gnipökrroN 47 106-ES

LiU-ITN-TEK-A--12/044--SE

Differential Six-PortTransceiver Design and

Analysis from a WirelessCommunication System

PerspectiveMuhammad Umar

Umair Yasir

2012-06-12

LiU-ITN-TEK-A--12/044--SE

Differential Six-PortTransceiver Design and

Analysis from a WirelessCommunication System

PerspectiveExamensarbete utfört i Elektroteknik

vid Tekniska högskolan vidLinköpings universitet

Muhammad UmarUmair Yasir

Handledare Magnus KarlssonExaminator Adriana Serban

Norrköping 2012-06-12

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© Muhammad Umar, Umair Yasir

i

Differential Six-Port Transceiver Design and Analysis from a Wireless Communication System Perspective

Muhammad Umar

Umair Yasir

iv

Abstract

In modern telecommunication there is the demand of high data rates using wideband component

design. FCC has introduced the UWB spectrum for high speed data communication. UWB

systems have attracted the attention of researchers. Six-port transmitters and receivers are strong

candidates for UWB systems and research is being done on six-port modulators and

demodulators. In this work an effort is made to compare the performance of conventional single-

ended six-port transmitter and receiver with differential six-port transmitters and receivers.

In this thesis, single ended and differential six-port correlators are designed on 7.5 GHz using

Agilent Inc. EDA tool ADS and their performance is evaluated. A new wide-band differential

six-port correlator is implemented using rat-race couplers and double-sided parallel strip-line

phase inverter.

The designed six-port correlators are used for 8-PSK modulation and demodulation. For

transmitter-receiver system, mixed analog-DSP designing is used. The integral components of

the system are evaluated individually and behavioral modeling is used to evaluate the complete

transmitter-receiver system. The single-ended and differential systems are evaluated for noise-

figure, dynamic range, bit error rate and data rate.

v

Acknowledgements We would like to recognize the effort and support of following persons who have helped and

enabled us to successfully complete the thesis work:

Our examiner Dr. Adriana Serban for her support, guidance and giving us the opportunity to

work with her.

Our Supervisor Dr. Magnus Karlsson for his support in the thesis, especially in PCB fabrication

and measurements.

Mr. Gustav Knutsson for his help in PCB fabrication.

All WNE degree students specially Ionut-Alexandru Apolozan.

Never ending support of our beloved families who have always encouraged and supported us

throughout the life.

vi

List of Abbreviations

ADS Advanced Design System

ASK Amplitude Shift Keying

BLC Branch Line Coupler

BPF Band Pass Filter

DSP Digital Signal Processing

DSPSL Double Sided Parallel Strip Line

EDA Electronic Design Automation

EM Electromagnetic

EMI Electromagnetic Interference

FCC

Federal Communications

Commission

FSK Frequency Shift Keying

HPF High Pass Filter

I/Q In-Phase and Quadrature Phase

IC Integrated Circuit

IF Intermediate Frequency

LNA Low Noise Amplifier

LO Local Oscillator

LPF Low Pass Filter

NF Noise Figure

PA Power Amplifier

PCB Printed Circuit Board

PSK Phase Shift Keying

QAM

Quadrature Amplitude

Modulation

RF Radio Frequency

SMA Subminiature version A

SNR Signal to Noise Ratio

UWB Ultra Wide Band

VCO Voltage Controlled Oscillator

VGA Variable Gain Amplifier

VNA Vector Network Analyzer

WPD Wilkinson Power Divider

viii

Table of Contents

ABSTRACT ............................................................................................................................................................. IV

ACKNOWLEDGEMENTS .......................................................................................................................................... V

LIST OF ABBREVIATIONS ....................................................................................................................................... VI

TABLE OF CONTENTS ........................................................................................................................................... VIII

1 INTRODUCTION ............................................................................................................................................ 1

1.1 THE UWB COMMUNICATION TECHNOLOGY ............................................................................................................... 2 1.2 MOTIVATION AND OBJECTIVE OF THE THESIS ............................................................................................................. 3 1.3 METHOD ............................................................................................................................................................ 4 1.4 CONTRIBUTIONS ................................................................................................................................................... 4

2 THEORETICAL BACKGROUND ........................................................................................................................ 5

2.1 MODULATION SCHEMES ........................................................................................................................................ 5 2.1.1 Amplitude modulation ........................................................................................................................... 6 2.1.2 Phase modulation .................................................................................................................................. 6 2.1.3 Frequency modulation ........................................................................................................................... 9

2.2 TRANSCEIVER ARCHITECTURES ................................................................................................................................. 9 2.2.1 Transmitter designs ............................................................................................................................... 9 2.2.2 Receiver designs ................................................................................................................................... 12

2.3 DIFFERENTIAL SIGNALING ..................................................................................................................................... 14 2.3.1 Two wire signaling ............................................................................................................................... 15 2.3.2 Voltages and currents in differential signaling .................................................................................... 16 2.3.3 Differential impedance ........................................................................................................................ 17 2.3.4 Mixed-mode S-Parameters .................................................................................................................. 17 2.3.5 PCB structures for differential signaling .............................................................................................. 18

3 SIX-PORT CORRELATOR............................................................................................................................... 19

3.1 IDEAL SIX-PORT CIRCUIT ....................................................................................................................................... 19 3.1.1 Wilkinson Power Divider ...................................................................................................................... 20 3.1.2 Quadrature Branch line coupler ........................................................................................................... 21 3.1.3 180

o Branch Line Coupler ..................................................................................................................... 22

3.2 MODULATION USING SIX-PORT CORRELATOR ........................................................................................................... 23 3.3 DEMODULATION USING SIX-PORT CORRELATOR ....................................................................................................... 25

4 DESIGN AND IMPLEMENTATION OF SIX-PORT CORRELATOR ...................................................................... 29

4.1 SINGLE-ENDED DESIGNS ....................................................................................................................................... 30 4.1.1 Classical single-ended design ............................................................................................................... 30 4.1.2 Single-ended design with matching stubs............................................................................................ 35

4.2 DIFFERENTIAL DESIGNS ........................................................................................................................................ 38 4.2.1 Classical differential design ................................................................................................................. 38 4.2.2 Wideband differential design ............................................................................................................... 44

4.3 WIDEBAND 180O

COUPLER DESIGN ....................................................................................................................... 50

5 SIX-PORT MODULATOR AND DEMODULATOR DESIGN ............................................................................... 54

5.1 SIX-PORT MODULATOR IMPLEMENTATION ............................................................................................................... 54

ix

5.1.1 Variable port impedances .................................................................................................................... 55 5.1.2 8-PSK modulation using mixed analog-DSP designing ......................................................................... 55

5.2 SIX-PORT DEMODULATOR IMPLEMENTATION ............................................................................................................ 59 5.2.1 Diode modeling .................................................................................................................................... 60 5.2.2 Notch filter ........................................................................................................................................... 61 5.2.3 Digital judgment circuit ....................................................................................................................... 61

5.3 SIX-PORT TRANSMITTER-RECEIVER SYSTEM .............................................................................................................. 61

6 DESIGNED SIX-PORT TRANSCEIVER SYSTEM EVALUATION .......................................................................... 64

6.1 NOISE FIGURE COMPARISON ................................................................................................................................ 64 6.2 BER AND DYNAMIC RANGE COMPARISON .............................................................................................................. 65 6.3 BER AND DATA RATE COMPARISON ....................................................................................................................... 67 6.4 MODULATED SIGNAL CONSTELLATION DIAGRAMS AND POWER SPECTRUM COMPARISON ................................................ 67

7 CONCLUSION & FUTURE WORK .................................................................................................................. 70

7.1 CONCLUSION ..................................................................................................................................................... 70 7.2 FUTURE WORK .................................................................................................................................................. 70

8 REFERENCES ............................................................................................................................................... 72

1

1 INTRODUCTION

Wireless communication is ubiquitous nowadays. We can find its presence everywhere around

us. From indoor communication applications to long range communication systems which not

only connect the world together but can also communicate with the Rovers sent to Mars, wireless

communication has redefined the possibilities. There are numerous applications and standards

varying in data rate from some Kbits/s to Gbits/s and coverage distance from some meters to

hundreds of kilometers. The trend is to replace wired communication with wireless devices

which can communicate with similar efficiency and reliability. Advancements in the research

and design of wireless devices and techniques are going on for improving the reliability and

robustness in the communication and to introduce new innovations to the everyday life.

It all dates back to the prediction and description of Electromagnetic waves by James Clerk

Maxwell in 1873 [1]. Maxwell, on mathematical grounds, suggested that a varying Electric field

produces a varying Magnetic field and same in vice versa. Heinrich Hertz carried out a set of

experiments in 1887-1891 and validated the theory presented by Maxwell [2]. Guglielmo

Marconi, an Italian inventor, carried out first demonstration of wireless communication in 1895.

In 1940s, during the World War 2, research and development of RADAR (RAdio Detection And

Ranging) attracted much attention to the field of Wireless communication specifically

Microwave communication. Also, parallel advancements in the field of Solid state physics such

as invention of first Silicon transistor at Texas instruments in 1954 and its use as a switch in

electronic devices paved the way for development of complex digital communication devices.

The cellular mobile communication started in the late 1970s and early 1980s. The first

commercial analog cellular system was launched by NTT (Nippon Telephone & Telegraph) in

Tokyo, Japan in December 1979. In 1981 NMT (Nordic Mobile Telephone) introduced cellular

system in Nordic countries. Cellular mobile system started to evolve and expand rapidly. The

advent of 2G (2nd

Generation) systems in 1991 came with Digital version of cellular systems

which offered more spectral efficiency and security. The second generation got the name of

GSM (Global System of Mobiles).The consequent introductions of various data transmission

technologies and standards such as GPRS (General Packet Radio Service) and EDGE (Enhanced

Data rates for GSM Evolution) to GSM started a new era of wireless communication and spread

the use of cell phones dramatically.

In addition to these WANs (Wide Area Networks), short range wireless communication

networks or WPANs (Wireless Personal Area Networks) got evolved tremendously as well.

Bluetooth was introduced in 1999. It is a short range (1-100 meters) wireless alternative for

communication wires/cables. The technology’s latest version 3.0 + HS incorporates with 802.11

(Wi-Fi) and can serve up to data rates as high as 24 Mbit/sec. Before that version 2.0 + EDR was

able to provide 3 Mbit/sec data rate [3]. On the other hand IEEE (Institute of Electrical and

Electronic Engineers) developed specifications for 802.11 in 1997 [4]. 802.11 is a WLAN

(Wireless Local Area Network) specification and is popularly known as Wi-Fi. The technology

2

now has different versions namely 802.11 a, b, e, g and n with the latest in practice i.e. 802.11 n

can reach up to net data rates of 300 Mbit/sec.

Following is a summary of various short range communication standards and technologies:-

IEEE 802.11 a/b/g/n (Wi-Fi)

Bluetooth, IEEE 802.15.1

ZigBee, IEEE 802.15.4

UWB (Ultra wideband)

These technologies in terms of coverage distance and data rates are depicted in Figure 1.1

Figure 1.1 Different wireless communication technologies in terms of distance and data rates.

The last mentioned i.e. UWB is the focus of this thesis and will now be discussed in detail.

1.1 The UWB communication technology

Ultra-Wideband is a recent inclusion to the short range wireless communication technologies and

it was first authorized by FCC (Federal Communications Commission) of USA in 2002 [5]. FCC

allocated a wideband i.e. 3.1-10.6 GHz and with emission limitation on power spectral density of

-41 dBm/MHz. This limitation was implemented to reduce interference with other

communication technologies. A larger bandwidth and lower power offers a massive increase in

data rates compared to other narrowband short range standards such as Bluetooth and 802.11 Wi-

Fi.

The interrelation between channel capacity with bandwidth is described by Shannon equation:-

C = B × log2(1 + SNR)

Where C = channel capacity or data rate or throughput

B = channel bandwidth

SNR = Signal to noise ratio or

3

This means that for higher channel capacity we can either allocate more bandwidth or increase

the signal to noise ratio. Increasing SNR in wireless communication implies that we increase the

transmitting power which in turn can increase interference with other communication systems so

it is not desirable. Also its relation is logarithmic with the channel capacity. Then other option is

increasing bandwidth, which the UWB has employed.

The suggested bandwidth by FCC of 3.1-10.6 GHz is roughly 7 GHz. The first half of this band

overlaps with the unlicensed 5.725 – 5.875 GHz ISM (Industrial, Scientific and Medical) band.

Therefore in Europe, Asia and Japan there are further requirements of LDC (Low Duty Cycle)

and DAA (Detect and Avoid) techniques in the 3.1 – 4.8 GHz band to avoid interference with

existing technologies. EC (European Commission) has limited the UWB bandwidth for devices

without requirements for DAA mitigation techniques to 6-8.5 GHz. NICT (National Institute of

Information and Communications Technology) in Japan has divided the UWB band into separate

bandwidths of 3.4 - 4.8 GHz and 7.25 – 10.25 GHz. In the first band interference mitigation

techniques are required and further the allowed average transmission power is reduced to -70

dBm/MHz. In China, the approved bands for UWB operation are 4.2 - 4.8 GHz and 6 – 9 GHz

[6].

UWB communication can be categorized in two ways when it comes to transmission of channel

signaling i.e. (i) carrier free UWB communication (ii) carrier based UWB communication.

Carrier free UWB, also known as impulse radio UWB, the data is sent in the form of short or low

duty cycle pulses utilizing the whole allocated band. Carrier based UWB is further divided into

(a) single carrier (b) multi carrier. Example of single carrier is the use of DSSS (Direct sequence

spread spectrum) technique. Multi carrier UWB involves OFDM (Orthogonal Frequency

Division Multiplexing) technique in which signal is sent using multiple modulated orthogonal

carriers [7].

1.2 Motivation and Objective of the Thesis

Wireless communication in UWB requires new components designed and optimized for this

frequency band. A lot of research and design work has been going on designing LNA (Low

Noise Amplifier), Antenna (transmit/receive), Mixer, Band Pass filter, Power Amplifier, Six port

Direct carrier modulator and other components in the wireless communication system hierarchy,

for UWB band. Several studies have been carried out in Linköping University prior to this [6],

[8] and [9]. All of the above mentioned works were concentrated on communication system

architectures employing Six-port direct carrier modulator.

Six-port systems are made up of passive microwave components and are simpler than

conventional heterodyne radio transceivers involving IF (Intermediate Frequency) components.

The main advantages of Six-port correlator are of large frequency bandwidth and less power

consumption [10] [11]. Both these aspects make it a suitable choice for short range, high data

rate UWB systems.

As mentioned above, research in [8] was the study on implementing differential six-port

transceiver. Differential six-port promises the advantages of signal integrity, reduced common

mode noise, crosstalk suppression, compactness of the system and increased dynamic range [12].

4

The goal of this thesis is to implement 8-PSK (Phase shift keying) modulation/demodulation on

both single-ended and differential six port designs with a central frequency of 7.5 GHz. The

objective is the system level implementation of both designs and their comparison from a

wireless communication system perspective.

1.3 Method

The EDA (Electronic Design Automation) software tool used for the simulation tasks is ADS

(Advanced Design Systems) version 2011 from Agilent Inc. The bandwidth chosen among the

total UWB bandwidth is 6 – 9 GHz. This bandwidth is not subjected to the requirement of

interference mitigation techniques by any country’s laws. Individual components of Six-port

modulator/demodulator i.e. Wilkinson power divider and Branch line coupler are designed and

optimized for 7.5 GHz centre frequency. They are then combined together to make the six-port

correlator and the frequency, phase and amplitude responses were analyzed.

The layout components are generated for both single ended and differential designs and EM

(Electromagnetic) simulation are done using the ADS Momentum tool. The next part is the 8-

PSK signal modulation/demodulation. DSP (Digital Signal Processing) blocks in ADS are used

to produce/recover the baseband signals. A communication system as a whole is simulated and

system level parameters are analyzed.

1.4 Contributions

The work is done by two persons, Muhammad Umar and Umair Yasir. The individual

contributions are mentioned in Table 1.1.

Table 1.1 Individual contributions in work

Muhammad Umar Umair Yasir

Design of Six-port Correlators on

schematic and layout levels

Optimization of the designs for

modulation

Development of mixed analog-DSP 8-

PSK modulation scheme with port-5

signal digital control technique

Demodulation of the 8-PSK signal on

single-ended design

PCB fabrication and measurement

Report writing Ch 2,4,5

Design of Six-port Correlators on

schematic and layout levels

Study of ADS DSP blocks

DSP processing of the signal for mixed

analog-DSP simulations

Study of voltage-controlled switch to

replace the ideal switches in the

modulator

PCB fabrication and measurement

Report writing Ch: 1,3,6,7

5

2 THEORETICAL BACKGROUND

Telecommunication systems are an important constituent of life nowadays. A variety of

telecommunication systems are being used depending on the need of the situation. The simplest

scenario is a one way transmission and reception of information (depicted in Figure 2.1) where a

source wants to send the information to a sink through a channel [13]. To make the information

message appropriate for the channel the sender and detectors are used. The sender interprets the

source’s message to the form appropriate for the channel and detector interprets the message in

the channel back to original form. The task is to design this sender and detector to optimize the

speed, efficiency and cost.

Figure 2.1 A simple telecommunication model

Starting from the simple one way communication scenario the telecommunication technology is

advancing towards more and more complex architectures exploiting the sophisticated signal

processing techniques. The modern communication systems use several additional techniques

including source coding, channel coding interleaving, multiplexing and frequency spreading

[14]. All these efforts are being made to make the sender and detector (in Figure 2.1) more

efficient.

2.1 Modulation schemes

The appropriate utilization of a communication channel requires shift of the information signal

frequency into other frequency band suitable for transmission over the channel. For example a

radio system operates by converting audio signal of 20 Hz – 20 kHz to radio signal of 30 kHz

and upward. This process of shifting the range of the frequency to higher frequencies appropriate

for transmission over the channel is called modulation [15]. Usually modulation is performed by

varying the characteristics of a higher frequency sinusoidal wave according to the modulating

signal (modulating wave). On the receiver side the reverse process of the modulation is

performed known as demodulation.

Modulation types are classified as analog modulation and digital modulation depending on the

type of the modulating signal.

Source Sender Channel Detector Sink

6

2.1.1 Amplitude modulation

In amplitude modulation the amplitude of the carrier wave is varied according to the modulating

wave. In case of digital baseband data the modulating signal is input symbols in form of

distinctive voltage levels. So the modulated output wave also has distinct amplitude levels as

input symbols with the frequency of carrier wave. An amplitude modulated wave can be

expressed as:

(2.1)

SRF is the output modulated signal, Am(t) is the amplitude of the baseband signal and 𝛚c = 2πf is

the angular frequency of the carrier wave.

If the baseband signal is digital then this type of modulation is called Amplitude shift keying

(ASK). If the input signal is an ordinary bit stream with levels of 0 and 1, it will control the

modulated wave like a switch as shown in Figure 2.2. This type of modulation is also called on-

off keying (OOK) [16].

The demodulation of amplitude modulated signal can be done by passing the signal from a low

pass filtering circuit e.g. envelop detector, with removes the high frequency components of

carrier wave and baseband signal is retrieved.

Figure 2.2 Carrier wave, modulating signal and ASK modulated signal

2.1.2 Phase modulation

In phase modulation the phase of the carrier signal is varied according to the modulating wave.

In other words the information is inserted in the phase of the modulated wave. This type of

modulator is implemented using a multiplier.

Carrier wave

Modulating bits

ASK Modulated wave

7

(2.2)

Where AC is the amplitude of carrier and m(t) is modulating signal.

In case of the digital baseband signal where the baseband signal is represented by unique voltage

levels the output modulated wave takes discrete phase shifts. This is called phase shift keying

(PSK). For a single bit stream of 0s and 1s the simplest phase modulation is done by transmitting

the carrier with phase of 0o and 180

o to represent a binary 0 and 1 respectively. This kind of

modulation is called binary phase shift keying (BPSK). Figure 2.3 illustrates the BPSK

modulated wave.

Figure 2.3 Modulating signal, carrier wave, BPSK and BFSK signals

In order to utilize bandwidth more efficiently higher order PSK techniques are employed called

M-PSK. M represents the number of symbols carried by the modulated wave in form of identical

phase shifts. For this purpose the baseband data stream is divided into two or more parallel data

steams which modulate two orthogonal carrier waves which are called in-phase wave and

quadrature-phase wave. These two waves are then added together to get M-PSK modulated

signal. QPSK, 8-PSK and 16-PSK use 4, 8 and 16 phase shifts respectively. Each phase

represents an identical symbol in baseband. Figure 2.4 shows the QPSK and 8-PSK modulation

points in signal space diagram (constellation diagram).

Carrier wave

Modulating bits

PSK Modulated wave

FSK Modulated wave

8

Figure 2.4 (a) QPSK and (b) 8-PSK modulated constellation diagram. Phase difference between any two symbols is 90O

for QPSK and 45

O for 8-PSK

An M-PSK modulated wave is represented by the equation:

[

] (2.3)

where i represents the symbol number.

The data capacity per symbol increases with increased order modulation but on the cost of

increased probability of bit error rate because the Euclidean distance between the two symbols in

signal space decreases.

In digital modulation a combination of ASK and PSK can be used to increase the number of

symbols in signal space, increasing data rate [16]. This type of modulation is called Quadrature

Amplitude Modulation (QAM). In QAM two orthogonal carrier waves are amplitude modulated

and added together to get QAM signal. Figure 2.5 represents constellation diagrams for two

types of QAM symbols. A QAM signal can be represented by the equation:

[ ] (2.4)

Where XI and XQ are the baseband signals respectively called in-phase and quadrature-phase

components of the baseband signal.

I

Q

1

1

-1

-1

45O

I

Q

1

1

-1

-1

90O

(a) (b)

9

Figure 2.5 (a) 4-QAM and (b) 16-QAM modulated constellation diagram

2.1.3 Frequency modulation

Frequency modulation exploits the frequency shifting of the carrier wave according to the

modulating signal. The information to be transmitted is inserted in the frequency of the carrier

wave. Figure 2.3 shows a frequency modulated wave. For digital modulation the discrete

frequency values are used to represent the baseband symbols. It is called frequency shift keying.

The frequency shift between the two values must be as small as possible to save bandwidth. The

minimum shift which can be used is 1/2Tb, (Tb is the bit interval). FSK implemented using this

criterion is called minimum-shift keying or fast-frequency shift keying [16].

2.2 Transceiver architectures

The word transceiver is a combination of “transmitter” and “receiver”. Transceiver is a device

which can behave like transmitter as well as receiver. Efficient transceiver design in wireless

communication is crucial [17]. The design should be capable of supporting high data rates with

minimum errors maintaining communication over a long distance. A transceiver is supposed to

be able to combat channel noises, attenuation and fading.

2.2.1 Transmitter designs

The task of the transmitter is to mix the information signal with a higher frequency carrier to

produce a high power modulated signal in appropriate frequency band. The output power varies

from few mW up to several kW [17]. The generalized output wave equation can be written as:

I

Q

1

1

-1

-1

Q

1

1

-1

-1

(a) (b)

10

(2.5a)

(2.5b)

Usually two types of transmitter architectures are used. One technique is to modulate directly at

the transmission frequency and second is to do modulation at some lower frequency called

intermediate frequency (IF) and then upconvert the signal to some higher frequency for

transmission [6]. The former one is called Homodyne and latter one is called heterodyne

transmitter as shown in Figure 2.6.

Figure 2.6 (a) Homodyne transmitter, (b) Heterodyne transmitter architecture

In Figure 2.6a the VCO (LO) frequency is exactly equal to the carrier frequency; the modulation

and upconversion are directly done at a single stage simultaneously. While in Figure 2.6b a

relatively low frequency (f1) carrier is used for modulation and a second carrier with relatively

I

Q

Baseband

processing

circuit

VCO

sin cos

+ PA

LPF

LPF

BPF &

Matching

network

Self-modulation

LO-leakage

(a)

I

Q

IF VCO

sin cos

LPF

LPF

+

VCO

PA

BPF BPF

BPF &

Matching

networkBaseband

processing

circuit

(b)

11

higher frequency (f2) is used to further upconvert the modulated wave to a higher frequency

(f1+f2). In both type of designs the signal is amplified by a power amplifier (PA).

Quadrature Imbalance

For a homodyne transmitter it is difficult to produce LO signals perfectly at quadrature phase at

high frequency. The inaccuracy in the phase shift and mismatches in I- and Q-paths distorts the

resultant constellation [6]. In heterodyne transmitter the modulation is performed at relatively

low frequency reducing the quadrature errors.

LO leakage and Self Modulation

LO leakage is prominent when there is poor isolation between LO and RF ports of mixer causing

LO signal to escape towards the antenna. In homodyne transmitters the LO leakage signal cannot

be eliminated by the band-pass filter as it is exactly at the signal frequency [6]. While in

heterodyne transmitter LO leakage is not a notable problem. LO leakage causes unnecessary

power dissipation and constellation offset.

Self modulation is caused when the modulated signal is reflected by PA backwards and escapes

from mixer to VCO, disturbing the VCO spectrum. This problem is prominent in heterodyne

transmitters as the VCO is not at the carrier frequency [6].

We can summarize the advantages and disadvantages for both types of transmitter structures as

[18]:

Transmitter

Type Advantages Disadvantages

Homodyne Low cost

High integratibilty

Simple structure


LO leakage

Self modulation

Heterodyne

Reliable

performance

No LO leakage

Expensive

Larger in size

Additional filtering

Increased power

dissipation

Table 2.1 Comparison summary of transmitter architectures

12

2.2.2 Receiver designs

The tasks of a RF receiver are to down-convert the signal frequency and demodulate it to get the

original information back. The receiver has to be able to detect a very low-power signal in a

noisy environment in the presence of other unwanted frequencies. Receiver front-end designs are

much complex than transmitter designs due to above mentioned requirements [6]. A simplest

receiver is a tuned radio receiver which contains a BPF, a LNA to amplify the signal power,

demodulator, LPF and a PA.

Depending on the scenarios a variety of receiver architectures are implemented including

homodyne (direct conversion or zero-IF), heterodyne, super-heterodyne and low IF receivers [6].

Figure 2.7 presents the structures for homodyne and heterodyne receivers.

Figure 2.7 Receiver architectures (a) Homodyne (direct-conversion receiver) (b) Heterodyne receiver

Homodyne receiver converts the RF signal to baseband in a single stage as presented in Figure

2.7a. The signal is first filtered then amplified by low-noise amplifier (LNA) to increase its

power to some detectable level. After amplification the signal is down-converted and

demodulated to baseband signal in a single stage. The signal is then low-pass filtered to remove

I

Q

Baseband

processing

circuit

VCO

sin cos

VGA

LPF

LPF

VGA

LNA

BPF

(a)

I

Q

IF VCO

sin cos

LPF

LPF

VCO

VGA

BPFBaseband

processing

circuit

VGA

LNA

Image reject

BPF BPF

(b)

13

high frequency components and variable gain power amplifier (VGA) adjusts the signal power to

appropriate level for analog to digital conversion.

Heterodyne receivers are more popular than homodyne. Heterodyne receivers works in two

stages as illustrated in Figure 2.7b. First the signal is filtered then amplified by LNA, after

amplification it is further filtered to suppress image frequencies. In first stage it is down-

converted to a lower frequency and in second stage it is demodulated to get the baseband signal.

The signal is further filtered and amplified by VGA.

A receiver can be evaluated in terms of its noise figure, sensitivity, selectivity and dynamic range

[17][19]. High performance components and careful design approach must be applied to design a

high fidelity receiver. The main RF receiver design aspects are:


The imperfect quadrature phase shift and difference in amplitudes of LO signals cause distorts

the demodulated signal. This problem becomes prominent in homodyne receivers. In addition,

mismatches in I- and Q- signal paths also corrupts the signal constellation. In heterodyne

receivers the demodulation is performed at relatively low frequency reducing the quadrature

imbalance problem.

LO leakage

LO leakage is caused by the poor isolation between LO and RF ports of the mixer. In receivers

the LO signal escapes from the mixer toward the RF port get passed through the parasitic in the

LNA. It may get radiated by the antenna causing unwanted radiations by the receiver or it may

get back to the input of the LNA getting amplified and fed to the mixer. Mixing with original LO

signal it causes self-mixing producing DC components at the output of the mixer. In homodyne

receiver designs this DC component is superimposed on the baseband signals distorting them [6].

Image frequencies

In heterodyne receivers the carrier frequency is first down-converted to an IF frequency. During

mixing the frequencies at a distance of 2fIF from the carrier are also shifted to IF band causing

interference with the original signal. To eliminate image frequency an image rejection filter is

used to filter out the image frequencies prior to mixing. In homodyne receivers image

frequencies are not a problem.

Sensitivity

Sensitivity is defined as minimum signal level required at the antenna to obtain a defined signal

to noise ratio (SNR) at the receiver output [17]. Wireless communication range depends upon the

smallest level of the signal a receiver can process. Homodyne receives exhibit relatively good

sensitivity compared to heterodyne [17].

Selectivity

14

Selectivity is the ability of the receiver to receive a particular band while rejecting the adjacent

bands [17]. In multiband radio communication several radio transmissions are done on adjacent

bands with a guard-band. The band-pass filters in the receivers affect the selectivity most.

Heterodyne receivers have relatively good selectivity than homodyne due to increased filtering

[17].

Noise figure

Noise figure is defined as the ratio of input SNR to output SNR. The noise figure of the whole

receiver system is dominated by the noise figure of first active component. For that reason the

amplifier in the beginning of RF receiver is optimized for the low noise figure hence called Low

noise amplifier (LNA). The receiver sensitivity depends on the receiver’s noise figure.

Comparing homodyne with heterodyne receiver, the advantages and disadvantages can be

summarized as [18][17]:

Receiver Type Advantages Disadvantages

Homodyne

Low cost

High integratable

No image

frequency problem

Reduced filtering

Better sensitivity


LO leakage

Low selectivity

Heterodyne

Reliable

performance

No LO leakage

problem

Better selectivity

Expensive and bulky

Additional filtering

Increased power

dissipation

Table 2.2 Comparison summary of receiver architectures

2.3 Differential signaling

Typically the electronic systems share a single conductor for current return path between

transmitter and receiver called ground. This use of a single reference conductor (ground) is

called single ended signaling. The IC package pins have resistance and parasitic causing shifts in

the ground plane. One receiver may be acting as a transmitter for other receivers adding further

shifts in the ground plane as explained in Figure 2.8a. Moreover noise exists between each two

points on the ground conductor. If the reference voltage on the ground conductor is shifted too

15

much the single ended signaling no longer works. The noise produced by unnecessary voltage

drop on the impedance of ground connection on signal return path is called ground bounce [20].

Figure 2.8 Signal transmission systems between two devices with package resistances ZA and ZB (a) Single-ended system with shared ground as current return path (b) two-wire system.

2.3.1 Two wire signaling

Two wire signaling can solve the ground shift problem at cost of one extra wire used as signal

return path instead of common ground as shown in Figure 2.8b. In high frequency circuits the

wires or PCB traces have coupling with the system chassis or other conducting materials. It

causes the current induced in the chassis which can be modeled as added parasitic. The

transmitted signal current finds this parasitic as an option for the return path. The current that

returns from the parasitic is called stray current [20]. In high speed circuits the stray current may

cause malfunctioning of the system.

TxTxRx

GndGnd

Shared Ground

Package connection resistance


ZA

ZB

Currentpath

Current to next device

currentreturnpath

(a)

TxTxRx

GndGnd

Shared Ground



ZA

ZB

Signal wireCurrent to next wire

currentreturnwire

Signal return

(b)

16

The solution of the above mentioned problem is the transmission of the signals mutually opposite

on the both conductor wires (or traces). This type of signaling is called differential signaling. If

both the conductors have the identical coupling with the reference (or the chassis) both wires

induce opposite signals cancelling the effect of each other. If both wires do not have the same

coupling or the signals are not perfectly complementary, some amount of current will flow in the

reference called common mode current.

2.3.2 Voltages and currents in differential signaling

Let denote the instantaneous voltages on the two wires as v1 and v2 with respect to an arbitrary

reference. The difference in the instantaneous voltages v1 and v2 is called differential voltage vd

and the average of the instantaneous voltages is called common-mode voltage vc [20].

(2.6a)

(2.6b)

Common-mode voltage causes production of common mode current. Common-mode current is

not cancelled by noise cancellation property of the differential signaling. Moreover it contributes

a lot in electromagnetic interference (EMI) radiations [21].

Another decomposition of the differential signaling is the even-mode and odd-mode voltages. An

odd-mode voltage in a conductor is one whose opposite exists in the second conductor. Odd

mode voltage vo is half of differential voltage vd. Even-mode voltage is one which is same on

both conductor wires. It is same as common mode voltage vc.

(2.7a)

(2.7b)

Voltage on one conductor is the sum of even- and odd-mode voltages and on the other it is the

difference. Current on one conductor is the sum of differential- and common-mode currents and

on the other it is the difference [20][21].

(2.8a)

17

(2.8b)

(2.8c)

(2.8d)

2.3.3 Differential impedance

Similar to voltage and currents, impedance for differential signaling is also categorized as

differential, common-mode, even and odd impedances. The definitions are as follows [22]:

Differential impedance is the impedance seen into a transmission line when exited in differential

mode.

Common-mode impedance is seen into a transmission line when excited with same signals on

both conductors.

Odd-mode impedance is the impedance of single conductor of transmission line while the other

is excited with opposite signal. Odd-mode impedance is half of differential impedance.

Even-mode impedance is the impedance of single conductor of transmission line while the other

excited with the same signal. Even-mode impedance is the double of common-mode impedance

2.3.4 Mixed-mode S-Parameters

S-parameters or scattering parameters are used to define the response of a microwave network at

RF frequencies. S-parameters for port n are defined by the normalized input and output power

waves (an and bn respectively) when all the ports are terminated in matched conditions.

S-parameters for a single-ended two port network can be defined by a 2×2 matrix. For to define a

two port differential network a 4×4 matrix is required as there is a pair of signals on each port

[23]. The differential signaling contains both differential- and common-mode signaling so single

ended S-parameters cannot be used to fully define the behavior of transmission in differential

signaling. For that purpose mixed-mode s-parameters are used. The mixed-mode s-parameters

for a differential two-port network are defined by [24]:

[

] [

] [

] (2.9)

18

Where adn and acn are the normalized incident power waves for differential- and common-mode

respectively and bdn and bcn are the normalized reflected power waves for differential and

common-mode respectively for the port n. The S-matrix provides information for various

transmission behaviors as explained as follows:

Sdd: differential-mode S-parameters

Scc: common-mode S-parameters

Scd: conversion from common- to differential-mode

Sdc: conversion from differential- to common-mode

With mixed-mode S-parameters the details of wave propagation in differential signaling and

mode conversion are represented. More details on mode conversion can be found in [23].

2.3.5 PCB structures for differential signaling

Different PCB configurations for differential signaling are in use including edge-coupled

differential microstrip, edge-coupled stripline, broadside-coupled stripline and double-sided

parallel stripline (DSPSL) [20][25]. Only double-sided parallel stripline structure is discussed

here. It is like double sided microstrip structure without ground plane with strips on the both

sides of PCB exactly on top and bottom of each other as shown in Figure 2.9c.

Figure 2.9 Cross sections of (a) microstrip and (b) double-sided parallel strip-lines. (a-c) showing conversion of a microstrip line into differential strip line

The design of DSPSL is related to design of simple microstrip line. The characteristic impedance

of a DSPSL of width w on a substrate of height 2h is double the characteristic impedance of a

microstrip line with same width on the same material substrate with height h [26]. It means if we

join two microstrip PCBs back-to-back without ground planes as shown in Figure 2.9, we get a

DSPSL with the characteristic impedance double of microstrip line. If we place a conductor

sheet of infinite size between these two PCBs it will not disturb the field distribution for the

transmission lines but it will convert the DSPSL to two identical microstrip lines with half of the

impedance that of DSPSL [26]. This technique can be used to convert the differential DSPSL

structure to single-ended structure, especially in the case of measuring the differential structure

with single-ended laboratory equipment.

+

_

+

_

(b)(a) (c)

19

3 SIX-PORT CORRELATOR

The six-port correlator was first used as laboratory instrument for measurement of reflection

coefficients and S-parameters of components from 1972-1994 [27] [28] [29]. It was first

demonstrated in 1994 by Ji Li, R.G.Bosisio and Ke Wu that six-port correlator can be used in

radio receiver operated at millimeter-wave frequencies [30]. They used six-port correlator to

demodulate the digitally modulated signal at microwave/millimeter-wave frequencies. Since then

intensive research work is going on designing radio systems employing six-port

modulator/demodulator. Different types of modulation schemes such as 16-QAM, 64-QAM and

QPSK have been successfully implemented. The six-port promises wide bandwidth so its use in

UWB applications has been the focus of the research [31].

3.1 Ideal six-port circuit

Six-port correlator, also known as six-port junction or network is made up of passive microwave

components such as Wilkinson power divider and Quadrature 90o branch line couplers joined

together through transmission lines. Six-port correlator is the fundamental component of the

direct-carrier six-port modulator/demodulator circuit which is an alternative radio transceiver

architecture approach for broadband wireless communication systems.

Based on different combinations and arrangements of WPD (Wilkinson power divider) and

BLCs (branch line couplers), various configurations of six-port correlator are available. One of

the most commonly used configurations consists of one WPD and three BLCs and is shown in

Figure 3.1 [32]. This configuration has been used in this thesis as well.

Figure 3.1 Six-port Correlator--made up of one WPD and three Quadrature BLCs [33]

λ/4

λ/4

50 Ω

Wilkinson Power Divider

QuadratureBranch Line Coupler

Port 1

Port 3

Port 4

Port 5

Port 6

Port 2

20

The individual components i.e. WPD and BLC will now be discussed in detail.

3.1.1 Wilkinson Power Divider

Wilkinson power divider is a three-port network made up of transmission lines and is used to

divide the power of a signal equally in two with introduction of 90o phase shift in both. The S-

parameters matrix of WPD is given below:-

(

√ ) [

] (3.1)

An ideal WPD would exactly divide the input power provided at port 1 into two equal power

outputs at ports 2 and 3. WPD with transmission line lengths is shown in Figure 3.2.

Figure 3.2 Wilkinson Power Divider with corresponding lengths and impedances of transmission lines

If Vn is the incident voltage wave at port n, and Vn

is the reflected wave from same port, then

ideal WPD has the following characteristics:-

if V1 = A cos(t)

V1 = 0 (ideal matching, no reflections)

then V2- = V3

- =

√ (cos(t) – 90

o)

ZO

ZO

ZO

Port 1

Port 2

Port 3

λ/4

λ/4

2ZO

21

3.1.2 Quadrature Branch line coupler

The Quadrature BLC is a four-port network made up of transmission lines and divides the input

power at port 1 into two equal but mutually 90o shifted output powers at ports 2 and 3. Port 4 is

isolated from port 1. The S-parameters matrix is given below:-

√ [

] (3.2)

Quadrature BLC is shown in Figure 3.3.

Figure 3.3 Quadrature Branch Line Coupler with corresponding lengths and impedances of transmission lines

In terms of incident and reflected voltage signals, we can write the characteristics as:-

if V1 = A cos(t) is the input voltage at port 1 and port 4 is terminated with Zo i.e. V4

= 0

V1 = 0, (ideal matching, no reflections)

then V2- =

√ (cos(t) – 90

o)

V3- = -

√ (cos(t) ) ±180

o phase shift

Port 4 is usually terminated with Zo, characteristic impedance of the transmission line. But as can

be seen in the S-parameter matrix, if a signal is applied to this port, it is divided in two and

experiences a phase shift of -90o at port 2 and -180

o at port 3. So in terms of individual voltage

components at ports 2 and 3, resulting from the voltage signals at ports 1 and 4, we have

V2 = V2- =

√ V1 -

√ V4

V3 = V3- =

√ V1 -

√ V4

λ/4

ZO

ZO ZO

ZO

ZO ZO

λ/4

Port 1 Port 2

Port 3Port 4

22

3.1.3 180o Branch Line Coupler

180o

Branch Line Coupler is also called Ring Coupler or Rat-race coupler. It has a different

orientation of transmission lines and their impedances than that of Quadrature BLC. It consists of

ring of transmission line with the total length of six quarter wave-lengths and characteristic

impedance of √ Zo. Four ports are connected with the ring in such a way that three mutual

distances are equal i.e. one quarter wave-length while one mutual distance is three quarter wave-

lengths. Ring coupler is shown in Figure 3.4.

Figure 3.4 Ring Coupler with corresponding lengths and impedances of transmission lines

Based on the selection of input and output ports, it can give two equal outputs of either the same

phase or 180o apart. The S-parameters matrix is given below:-

√ [

] (3.3)

If input is given at port 1, two equal amplitude signals with same phase are at ports 2 and 3,

while port 4 is isolated. If 2 is the input port, we get two equal amplitude but 180o phase apart

signals at ports 1 and 4 while port 3 is isolated. Both configurations are shown in Figure 3.5.

Figure 3.5 Ring coupler with different setting of input port and the corresponding outputs.

/4 3/4

Port1

Port2

Port3

Port4

ZO

Input

Output 0o

Output 0o

Isolated

Input

Output 180o

Output 0o

Isolated

23

3.2 Modulation using Six-port Correlator

For signal modulation using the Six-port correlator (depicted in Figure 3.1) first the S-parameters

of six-port are analyzed. Using WPD and BLC S-parameters matrices, S-parameters of six-port

correlator can be calculated as [6]:

[

]

(3.4)

So S-parameters matrix gives the following general relationships:-

(3.5a)

(3.5b)

(3.5c)

(3.5d)

(3.5e)

(3.5f)

The six-port modulator circuit with respective incident and reflected power waves and variable

impedance terminations at the ports is shown in Figure 3.6.

24

Figure 3.6 Six port Correlator being used a modulator with variable impedance terminations. ai and bi are input and output waves respectively from port i.

The six-port shown above is a common configuration of the Six-port correlator used as a

modulator. Port 1 is used as input port for LO (Local Oscillator) signal and ports 3 to 6 are

terminated with variable impedances controlled by the baseband signals at these ports. Port 2 is

the output port for RF modulated signal.

In Figure 3.6 Assume that ports 1 and 2 are perfectly matched i.e. there is no reflection; port 1 is

the input port for LO signal and port 2 is the output RF signal port. Assuming perfect matching

we get,

b1 = 0, a2 = 0.

Applying the LO signal at port 1,

( )

√ , as

√ (3.6)

and for the rest of ports,

(3.7)

where ai is the incident power wave and bi is the reflected wave at ports i where i = 3,4,5 and 6.

Then applying equations 3.5a - 3.5e, we obtain the output RF signal at port 2

(3.8)

a1

λ/4

λ/4

LO inRF out

b1

Zi1

Zi2

Zi1

Zi2

Zi1

Zi2

Zi1

Zi2

Γ3

Γ4

Γ5

Γ6

i = 3,4,5,6

b2 a2

50 Ω

6

1

2

3

4

5

25

In equation 3.8, the reflection coefficients Г3, Г4, Г5 and Г6 are realized by applying the baseband

signals to the variable impedances at these ports. These variable impedances can be any type of

switch which can take two or more values based on the state of the baseband signal. For higher

order modulation such as 16-QAM or 64-QAM more values or states of the impedances are

required such as 8 for 64-QAM [31]. For lower order modulation such as QPSK, only 2 states

(either short or open) for the impedance termination are enough [34].

In equation (3.8) Г3, Г4 represent the in-phase component (ГI) and Г5, Г6 represent the quadrature

component (ГQ). If for a particular case such as in QPSK we assume Г3 = Г4 and Г5 = Г6 then

equation 3.8 can be written in voltage signal form as

[ ] (3.9)

In time domain, equation 3.9 can be written as [6]:-

√

( (

)) (3.10)

Equation (3.10) describes an RF modulated signal. The amplitude and phase of this signal is

dependent on the variations of the reflection coefficients of the in-phase and quadrature phase

components.

Equation 3.10 can also be written in simplified form as

(3.11)

Where A(t) is the modulated amplitude and (t) is the modulated phase of the RF signal.

3.3 Demodulation using Six-port Correlator

The demodulation of the RF signal is achieved by mixing the received RF signal with the LO

signal which is equal in frequency to the LO signal at the transmitter. Schottky diodes are used

for the mixing purpose. The configuration is shown in Figure 3.7 [35].

26

Figure 3.7 Six-port Demodulator with Diodes, LPFs and Differential Amplifiers

The squared terms after the diode stage are then low pass filtered to reject the higher frequency

components and these low frequency signals are then fed into differential amplifier.

The LO signal is fed into port 1 and RF signal is fed at port 2. We assume perfect matching at

these ports so that

(3.12a)

(3.12b)

(3.12c)

where √

(3.13a)

and

(3.13b)

(3.14a)

(3.14b)

b2

a1

LO in

b1

1

LPF

LPF

LPF

LPF

+

+

I

Q

bi ai =Γibi

6

3

4

5

i = 3,4,5,6

(o)2

(o)2

(o)2

(o)2

50 Ω

RF in

a2

2

Six-portCorrelator

27

Now according to the S-parameters matrix in (3.4), we deduce the following signals at the ports

3, 4, 5 and 6

[ ( )] (3.15a)

[ ( )] (3.15b)

[ ( )] (3.15c)

[ ( )] (3.15d)

After squaring of the these signals by the diodes, they are passed to LPF (Low Pass Filter) to

reject the higher order harmonics such as 2LO(t), 2c(t) and LO(t)+ c(t). We have for V3 [6]:

(3.16a)

Similarly at other ports,

(3.16b)

(3.16c)

(3.16d)

Now to be able to recover the baseband signal from the resulted signals above, the first two

unwanted component terms are to be eliminated from each signal. In order to achieve this,

differential amplifier is used. Secondly the LO signal at the receiver end should be exactly equal

to the LO signal at the transmitter i.e. the carrier signal such that

ct - LOt = 0

Differential amplifiers give the output baseband signals i.e.

28

( ) (3.17a)

( ) (3.17b)

In this way both the in-phase and quadrature components of the baseband signal can be

recovered.

29

4 Design and implementation of six-port correlator

The task is to design single-ended and differential six-port correlator for UWB with centre

frequency of 7.5 GHz with minimum amplitude and phase imbalance for maximum bandwidth.

Various structures of six-port correlators are designed, simulated and fabricated. First, the

components of six-port are designed as standalone structures. These designs are simulated to

evaluate the performance, then optimized and integrated to make the six-port correlator. The six-

port structures are then optimized and fabricated.

Advance Design System (ADS) from Agilent Inc. is used for circuit simulations and evaluations.

Rogers 4350B substrate is used for PCB fabrication of the designs. Substrate specifications are

mentioned in Table 4.1. Single-ended designs are fabricated for 50 Ω and differential designs for

100 Ω port impedances. 50 Ω SMA female connectors for ports are used in PCB fabrication.

To measure the differential designs with available single-ended vector network analyzer (VNA)

a single-ended to differential conversion mechanism is used and a wideband 180O coupler is

designed and fabricated to be used as the converter.

The design and evaluation process is divided into three parts. First, the six-port designs are

simulated in ADS on schematic level to have a look on the ideal results. Second, the schematic

structure is converted to layout structure and simulated using ADS momentum field-solver. In

third step the layout design is modified to be suitable for fabrication and then fabricated for

practical evaluation.

Table 4.1 Rogers4350B substrate specifications

Relative dielectric constant 3.66

Substrate thickness 254 µm

Conductor thickness 35 µm

Metal conductivity 5.8×10

7

S/m

Loss tangent 0.004

Surface roughness 0.001 mm

30

4.1 Single-ended designs Initially single-ended designs are simulated, fabricated and analyzed for the performance. The

designs are optimized for 50 Ω port impedances and for best performance on 7.5 GHz. Two type

of single-ended structures are designed: i) classical design ii) design with matching stubs.

4.1.1 Classical single-ended design

This six-port design has been frequently used in the research [36][37]. It contains a Wilkinson

divider with three quadrature couplers. This is a simple and compact design. The layout of the

design is shown in Figure 4.1. The design dimensions are 20 mm × 25 mm.

Figure 4.1 Layout design of single-ended classical six-port correlator

Port 1 is referred as LO (local oscillator) and port 2 as RF (radio frequency) port. Port 3 and 4

are used as in-phase and port 5 and 6 are used as quadrature-phase ports. Port 7 is not used and

terminated by 50 Ω termination.

From fabrication point this design could not be fabrication with available equipment because of

smaller size. To make the design feasible for fabrication, extra transmission-line lengths are

added to the interconnects, increasing the design size to 31 mm × 34 mm. The electrical length of

added transmission-line on each port is λ/4 (6 mm). The modified design layout is shown in

Figure 4.2 and fabricated design in Figure 4.3.

25

mm

20 mm

P3 P4

P6 P5

P1(LO)

P2(RF)

P7

31

Figure 4.2 Layout design of single-ended classical six-port correlator modified for fabrication. The design dimensions are 31 mm × 34 mm

Figure 4.3 Manufactured Single-ended classical six-port correlator prototype

The simulated and measured S-parameter results for this design are shown in Figure 4.4 to 4.11.

34

mm

31 mm

P3 P4

P6 P5

P1(LO)

P2(RF)

P7

P1

P3 P4

50 ΩTermination

P2

P5P6

32

Figure 4.4 Measured and simulated input reflection coefficients

Figure 4.5 Measured and simulated isolations between Port 1 and Port 2

Figure 4.6 Measured and simulated S-parameters for transmission from Port 1 to Port 3 and 4

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (GHz)

Inp

ut R

efle

ctio

n (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))

dB(_2_SixportSE..S(1,1))


6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Measured S11

Measured S22

Simulated S11

Simulated S22

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (GHz)

Iso

latio

n b

etw

ee

n P

1 a

nd

P2

(d

B)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Simulated

Measured

6.5 7.0 7.5 8.0 8.56.0 9.0

-12

-9

-6

-3

-15

0

Frequency (GHz)

Fo

rwa

rd T

ran

sm

issio

n fro

m P

ort

1 (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Measured S31

Measured S41

Simulated S31

Simulated S41

33




6.5 7.0 7.5 8.0 8.56.0 9.0

-12

-9

-6

-3

-15

0

Frequency (GHz)

Fo

rwa

rd T

ran

sm

issio

n fro

m P

ort

1 (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Measured S61

Measured S51

Simulated S61

Simulated S51

6.5 7.0 7.5 8.0 8.56.0 9.0

-12

-9

-6

-3

-15

0

Frequency (GHz)

Fo

rwa

rd T

ran

sm

issio

n fro

m P

ort

2 (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Measured S32

Measured S42

Simulated S32

Simulated S42

6.5 7.0 7.5 8.0 8.56.0 9.0

-12

-9

-6

-3

-15

0

Frequency (GHz)

Fo

rwa

rd T

ran

sm

issio

n fro

m P

ort

2 (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Measured S62

Measured S52

Simulated S62

Simulated S52

34

Figure 4.10 Simulated phase difference between Port 4 and 3, and between Port 5 and 6, when Port 1 or Port 2 is used as input port

Figure 4.11 Measured phase difference between Port 4 and 3, and between Port 5 and 6, when Port 1 or Port 2 is used as

input port

Figure 4.4 shows the input reflection coefficients for Port 1 and 2. The simulated results shows

the input reflection less than -20 dB at the centre frequency but measured results are not in good

agreement with the simulated results. Measured results have input reflections coefficients higher

than -10 dB for the centre frequency. It can also be noticed in Figure 4.4 the isolation between

Port 1 and Port 2 is in simulated results is -50 dB for the centre frequency and for the extreme

sides of selected band it goes to approximately -9dB but again the measured results are not that

good as simulated. The best isolation is measured to be -22 dB on 8.5 GHz.

6.5 7.0 7.5 8.0 8.56.0 9.0

0

100

200

-100

300

Frequency (GHz)

Sim

ula

ted

Ph

ase

Diffe

ren

ce

(D

eg

ree

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



S31 – S41

S61 – S51

S32 – S42

S61 – S51

6.5 7.0 7.5 8.0 8.56.0 9.0

-300

-200

-100

0

100

200

300

-400

400

Frequency (GHz)

Measure

d P

hase D

iffere

nce (

Degre

e)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



S31 – S41

S61 – S51

S32 – S42

S62 – S52

35

The forward transmission response is depicted in Figure 4.5 and 4.6. Simulated results shows the

values around -6 dB for transmission to all ports. The measured results are deviated from the

simulated results specially the transmission to Port 4 and 5 which have the transmission loss of

approximately -9 dB at centre frequency . Transmission to Port 3 and 6 have relatively better

measured response and are close to simulated values. A same behavior is visible in Figure 4.7

and 4.8 for transmission to same ports but now Port 2 as input port. The simulated results hover

around -6 dB for centre frequency (7.5 GHz) and the measured results have more loss and float

around -9 dB at centre frequency.

Figure 4.9 and 4.10 shows the phase response of simulated and measured values respectively.

The phase difference between Port 3 and 4, and Port 6 and 5 for transmission when Port 1 or 2 is

used as input port is close to 90O for both simulated and measured results at centre frequency.

The phase difference deviate smoothly as frequency is changed from the centre frequency.

The measured results have deviations from the simulated because of bad etching, substrate

errors, SMA connectors and soldering. The main problem encountered in this project is uneven

etching of copper on PCB changing the width of transmission lines. The transmission line with

different widths exhibits different impedance causing high input reflection coefficients as in this

case.

4.1.2 Single-ended design with matching stubs

The classical design presented in previous topic has compact size but exhibits a narrow band

response. The Wilkinson divider has a relatively uniform response on a larger bandwidth than

the quadrature couplers. To make the quadrature couplers wideband, matching networks with

open-circuited stubs are applied on the ports. The idea is to exploit the fact that coupling depends

upon the admittance of the ports [38]. The matching network is presented in Figure 4.11.

Figure 4.11 Matching network applied on the coupler ports to broadband the response

The optimized values for Zstub and Zline are 50 Ω and 80 Ω respectively. The open-circuited stub

is folded inward to save the space on PCB.

λ/2

λ/2

Zstub

Zline

Zo

36

To increase the bandwidth of the six-port correlator, the simple quadrature couplers are replaced

with these optimized quadrature couplers with matching networks. The layout design is shown in

Figure 4.12. The design dimensions are 52 mm × 47 mm. The port assignment is same as

specified for the previous design.

Figure 4.12 Layout design for single-ended six-port correlator with matching networks

The simulated results for this six-port correlator design are shown in Figure 4.12 to 4.15

Figure 4.12 Simulated input reflection coefficients on Port 1 and 2

47

mm

52 mm

P3

P4

P6

P5

P1(LO) P2

(RF)

P7

6.3 6.6 6.9 7.2 7.5 7.8 8.1 8.4 8.76.0 9.0

-30

-20

-10

-40

0

Frequency (GHz)

Inp

ut R

efle

ctio

n (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Simulated S11

Simulated S22

37

Figure 4.13 Simulated S-parameters for transmission from Port 1 to Port 3, 4, 5 and 6

Figure 4.14 Simulated S-parameters for transmission from Port 2 to Port 3, 4, 5 and 6

Figure 4.16 Simulated phase difference between Port 4 and 3, and between Port 5 and 6, when Port 1 or Port 2 is used as

input port

6.5 7.0 7.5 8.0 8.56.0 9.0

-12

-9

-6

-15

-3

Frequency (GHz)

Forw

ard

tra

nsm

issio

n fro

m P

ort

1 (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Simulated S31

Simulated S41

Simulated S51

Simulated S61

6.5 7.0 7.5 8.0 8.56.0 9.0

-12

-9

-6

-15

-3

Frequency (GHz)

Forw

ard

tra

nsm

issio

n fro

m P

ort

2 (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Simulated S32

Simulated S42

Simulated S52

Simulated S62

6.3 6.6 6.9 7.2 7.5 7.8 8.1 8.4 8.76.0 9.0

-300

-200

-100

0

100

200

300

-400

400

Frequency (GHz)

Sim

ula

ted

Ph

ase

Diffe

ren

ce

(D

eg

ree

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



S31 – S41

S61 – S51

S32 – S42

S62 – S52

38

Figure 4.12 presents the input reflection coefficients for Port 1 and 2. The values at centre

frequency are less than -20 dB and for the worst condition it is less than -12 dB. The response for

forward transmission to Port 3, 4, 5 and 6, when Port 1 or Port 2 is used as input port are shown

in Figure 4.13 and 4.14 respectively. The both figures show a flat response around -7dB. The

design exhibits a wideband response from 6 – 9 GHz.

The phase response is depicted in Figure 4.15. The phase difference between Port 3 and 4, and

between Port 5 and 6 is close to 90O on 6 – 9 GHz frequency band.

4.2 Differential designs

The differential designs are optimized for 100 Ω port impedance and for centre frequency of 7.5

GHz. For differential designs, the same substrate (Rogers4350B) with double thickness is used.

For manufacturing the prototypes, two single-sided PCBs are fabricated and then joined back-to-

back to make differential designs.

Two type of differential six-port correlator structures are designed.

i) Classical differential design

ii) Wideband differential design

4.2.1 Classical differential design

This design is exactly same to the classical single-ended one but it is implemented on DSPSL

(double-sided parallel strip-line) instead of microstrip structure, i.e. the ground plane is removed

and same pattern of transmission lines is printed on both sides of PCB. This design has been used

in research [8]. The design dimensions are 20 mm × 25 mm, same to its single-ended counter-

part. The 3D view of layout design is shown in Figure 4.17.

The design is then modified according to fabrication and measurement requirements. The

available measuring equipment is single-ended vector network analyzer (VNA). To make the

differential design compatible with single-ended VNA, the differential ports are converted to

single ended by inserting the ground-plane on the boundaries of the design. By inserting the

ground plane between DSPSL, a single 100 Ω differential port is converted to two single-ended

50 Ω ports. An electrical length of λ/2 (12 mm) is added on each port to make is feasible for

fabrication. The modified layout design and manufactured prototype are shown in Figure 4.18

and 4.19 respectively. The design dimensions after modifications are 35 mm × 48.5 mm.

To measure the design a single-ended wideband 180O coupler is designed (discussed in section

4.3). The purpose of this coupler is to divide the single-ended signal from VNA to two

complementary signals; these two single-ended complementary signals are used to feed the

differential design.

39

Figure 4.17 3D view of layout design for classical differential six-port correlator. The front view is exactly same as its single-ended counter-part

Figure 4.18 Layout design of classical differential six-port correlator modified for fabrication. The design dimensions are 35 mm × 48.5 mm

P3

P4

P6

P5

P1(LO)

P2(RF)

P7

Top layer

Bottomlayer

35 mm

48

.5 m

m

Top+Bottom layer(Differential signal here)

Top layer (SE signal here)

Bottom layer (SE signal here)

Ground layerbetween two PCBsjoined back to back

P1+

(LO +)

P1

(LO )

P3+

P3

P4+

P4

P5+

P5

P6+

P6

P7

40

(a) (b)

Figure 4.19 Manufactured classical differential six-port correlator prototype. (a) Top-side (b) Bottom-side


Figure 4.20 Measured and simulated input reflection coefficient for Port 1 and 2

P1+

P3+

P3-

P1-

P4+

P4-

P5-

P5+

P6-

P6+

P6+

P6-

P6+

P6-

P3+

P3-P4+

P4-

P5-

P5+

P6-

P6+

P1+

P1-

(a) (b)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

0

-60

10

Frequency (GHz)

Inp

ut R

efle

ctio

n (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Measured S11

Measured S22

Simulated S11

Simulated S22

41

Figure 4.21 Measured and simulated isolation between Port 1 and 2

Figure 4.22 Measured and simulated S-parameters response for transmission from Port 1 to Port 3 and 4


6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-60

-10

Frequency (GHz)

Iso

latio

n b

etw

ee

n P

1 a

nd

P2

(d

B)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Simulated

Measured

6.5 7.0 7.5 8.0 8.56.0 9.0

-24

-18

-12

-6

-30

0

Frequency (GHz)

Fo

rwa

rd T

ran

sm

issio

n fro

m P

ort

1 (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Measured S31

Measured S41

Simulated S31

Simulated S41

6.5 7.0 7.5 8.0 8.56.0 9.0

-24

-18

-12

-6

-30

0

Frequency (GHz)

Fo

rwa

rd T

ran

sm

issio

n fro

m P

ort

1 (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Measured S61

Measured S51

Simulated S61

Simulated S51

42



Figure 4.26 Simulated phase difference between Port 4 and 3, and between Port 5 and 6, when Port 1 and Port 2 is used as

input port

6.5 7.0 7.5 8.0 8.56.0 9.0

-24

-18

-12

-6

-30

0

Frequency (GHz)

Fo

rwa

rd T

ran

sm

issio

n fro

m P

ort

2 (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Measured S32

Measured S42

Simulated S32

Simulated S42

6.5 7.0 7.5 8.0 8.56.0 9.0

-24

-18

-12

-6

-30

0

Frequency (GHz)

Fo

rwa

rd T

ran

sm

issio

n fro

m P

ort

2 (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Measured S62

Measured S52

Simulated S62

Simulated S52

6.5 7.0 7.5 8.0 8.56.0 9.0

0

100

200

-100

300

Frequency (GHz)

Sim

ula

ted

Ph

ase

Diffe

ren

ce

(D

eg

ree

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



S31 – S41

S61 – S51

S32 – S42

S62 – S52

43

Figure 4.27 Measured phase difference between Port 4 and 3, and between Port 5 and 6, when Port 1 and Port 2 is used as input port

Figure 4.20 shows the input reflection coefficients on Port 1 and 2 for the simulated and

measured values. The values of input reflection coefficients for simulated response are less than -

20 dB for the centre frequency and less than -10 dB for the whole 6 – 9 GHz frequency band.

The measured response has the undesired values above -10 dB for the centre frequency showing

improper input impedance. At 8 GHz the measured values have complete mismatch. Also the

simulated response for isolation between Port 1 and 2 (Figure 4.21) have better isolation of more

than 50 dB on centre frequency compared to measured response with 27 dB isolation on centre

frequency. The best isolation for measured response is 44 dB at 6.1 GHz.

The forward transmission response from Port 1 to Port 3, 4, 5 and 6 is presented in Figure 4.22

and 4.23. Simulated design has loss close to -6 dB for transmission to all ports on the centre

frequency and values change smoothly as the frequency changes. The measured structure does

not have good response for forward transmission. At 8 GHz a huge insertion loss is due to large

input mismatching on this frequency.

Figure 4.24 and 4.25 shows the measured and simulated behaviors for transmission from Port 2

to Port 3, 4, 5 and 6. The simulated values shows -6 dB loss at the centre frequency and the loss

increases rapidly but smoothly as move on the frequency axis. The measured response is not

following any trend and changing rapidly. The measured values have high insertion loss. The

highest insertion loss occurs on 8.0 GHz due to input mismatching.

Phase response (Figure 4.26) for simulated values has 90O phase difference between transmission

to Port 3 and 4, and between Port 5 and 6. The Measured phase response (Figure 4.27) has the

phase difference between Port 3 and 4, and between Port 5 and 6 floating around 180O.

Some reasons of measured results deviations from the simulated results are discussed in single-

ended design section. The additional non-idealities in differential design are that the differential

design is produced by joining two separate PCBs back-to-back with glue. The glue and the air

6.5 7.0 7.5 8.0 8.56.0 9.0

-300

-200

-100

0

100

200

300

-400

400

Frequency (GHz)

Me

asu

red

Ph

ase

Diffe

ren

ce

(D

eg

ree

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



S31 – S41

S61 – S51

S32 – S42

S62 – S52

44

trapped inside changes the effective dielectric constant of the substrate. While joining the PCBs,

one PCB should be exactly collocated on top of other. The human error in joining the PCBs is

also there. In addition, the coupler used for single-ended to differential conversion is not ideally

splitting the power in half with ideal 180O phase. All these problems tend to change the measured

results from the simulated results.

4.2.2 Wideband differential design

It is a novel six-port design using rat-race couplers (180O hybrid couplers) instead of quadrature

couplers. To make the six-port correlator wideband, the rat-race couplers are designed with flat

amplitude response on a wide frequency range.

A typical rat-race coupler contains six λ/4 (quadrature phase) transmission lines in its main ring

as shown in Figure 4.28a. To miniaturize and broadband the differential design two of the three

quadrature-phase transmission lines between port 2 and 4 are replaced by DSPSL phase inverter

(crossing the conductors of both layers using VIAs) [39]. Two quadrature-phase transmission

lines perform 180O phase shift and a same effect is performed by DSPSL phase inverter. Figure

4.10b shows the differential wideband rat-race coupler with layers’ crossing for phase inversion

and Figure 4.10c presents the structure of DSPSL phase inverter. VIA holes with 0.15 mm

diameter are used in DSPSL phase inverter.

Figure 4.28 (a) A typical rat-race coupler (b) Wideband miniaturized differential rat-race coupler with phase inverter (c) 3D view of a DSPSL phase-inverter

The wideband rat-race couplers are used with Wilkinson divider to get a wideband six-port

correlator depicted in Figure 4.29. Port 1 and 4 of designed couplers are joined together and port

2 and 3 are used for external interface. Unlike quadrature coupler the rat-race coupler combines

and divides power with 0O or 180

O phase difference. In six-port correlator we require 90

O phase

difference in division or combination by each coupler. Extra transmission lines are added in this

design to adjust the phase difference. The overall design dimensions are 33 mm × 23 mm.

/4

/4

/4

/8

/8

/4

/4

/4

3/4

Top layer

Bottomlayer

(b)(a) (c)

P3

P4

P1

P2

P1 P2

P3 P4

45

Figure 4.29 Layout design for Wideband differential six-port correlator. The total design dimensions are 33 mm × 23 mm

The design is then modified to be suitable for fabrication and measurement with single-ended

VNA. Same technique of converting differential port to two single-ended ports as described in

previous section is used Transmission-lines with electrical length of λ/2 are added on each port

and diameter of VIA hole is increased to 0.4 mm to make the design feasible for fabrication.

Figure 4.30 and 4.31 shows the modified layout and manufactured prototype respectively.


23

mm

33 mm

P3

P4

P6

P5

P1 (LO)

P2 (RF)

P7

46

Figure 4.30 Layout design for wideband differential six-port correlator modified for fabrication

Figure 4.31 Manufactured prototype of wideband differential six-port correlator

60

mm

61 mm

P3+

P1+ (LO +) P1 (LO )

P3 P6+P6

P4+

P4

P2+ (RF +) P2 (RF )

P5+

P5

P7

P1+

P1-

P3+

P6+

P2+

P2-

P4+

P4-

P5+

P5-

P1+

P1-

P3-

P6-

P4+

P4-

P5+

P5-

P2+

P2-

(a) (b)

47

Figure 4.32 Measured and simulated input reflection coefficient for Port 1 and 2

Figure 4.33 Measured and simulated isolation between Port 1 and Port 2


6.5 7.0 7.5 8.0 8.56.0 9.0

-25

-20

-15

-10

-5

0

-30

5

Frequency (GHz)

Input re

flectio

n (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Measured S11

Measured S22

Simulated S11

Simulated S22

6.5 7.0 7.5 8.0 8.56.0 9.0

-40

-35

-30

-25

-45

-20

Frequency (GHz)

Iso

latio

n b

etw

ee

n P

1 a

nd

P2

(d

B)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Simulated

Measured

6.5 7.0 7.5 8.0 8.56.0 9.0

-25

-20

-15

-10

-30

-5

Frequency (GHz)

Forw

ard

Tra

nsm

issio

n fro

m P

ort

1 (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Measured S31

Measured S41

Simulated S31

Simulated S41

48




6.5 7.0 7.5 8.0 8.56.0 9.0

-25

-20

-15

-10

-30

-5

Frequency (GHz)

Fo

rwa

rd T

ran

sm

issio

n fro

m P

ort

1 (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Measured S61

Measured S51

Simulated S61

Simulated S51

6.5 7.0 7.5 8.0 8.56.0 9.0

-25

-20

-15

-10

-30

-5

Frequency (GHz)

Fo

rwa

rd T

ran

sm

issio

n fro

m P

ort

2 (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Measured S32

Measured S42

Simulated S32

Simulated S42

6.5 7.0 7.5 8.0 8.56.0 9.0

-25

-20

-15

-10

-30

-5

Frequency (GHz)

Fo

rwa

rd T

ran

sm

issio

n fro

m P

ort

2 (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Measured S62

Measured S52

Simulated S62

Simulated S52

49

Figure 4.38 Simulated phase difference between Port 4 and 3, and between Port 5 and 6, when Port 1 and Port 2 is used as

input port

Figure 4.39 Measured phase difference between Port 4 and 3, and between Port 5 and 6, when Port 1 and Port 2 is used as

input port

Figure 4.32 shows the input reflection coefficients for Port 1 and 2. The simulated values have

input reflection for Port 1 less than -10 dB and for Port 2 less than -20 dB for the whole

frequency band of 6 – 9 GHz. The measured results show high reflection at input ports. The

values deviate rapidly with frequency. At 8.5 GHz the reflection coefficient is approximately 0

dB showing complete mismatching. The isolation between Port 1 and Port 2 (depicted in Figure

4.33) is more than -20 dB for the simulated design on whole 6 – 9 GHz band. The measured

values show more isolation than simulated values.

6.5 7.0 7.5 8.0 8.56.0 9.0

-200

-100

0

100

200

-300

300

Frequency (GHz)

Sim

ula

ted

Ph

ase

Diffe

ren

ce

(D

eg

ree

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



S31 – S41

S61 – S51

S32 – S42

S62 – S52

6.5 7.0 7.5 8.0 8.56.0 9.0

-300

-200

-100

0

100

200

300

-400

400

Frequency (GHz)

Measure

d P

hase D

iffere

nce (

Degre

e)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



S31 – S41

S61 – S51

S32 – S42

S62 – S52

50

Forward transmission from Port 1 to Port 3, 4, 5 and 6 is depicted in Figure 4.34 and 4.35. The

simulated values for transmission to Port 3 and 4 shows values of -6dB and transmission to Port

5 and 6 shows values of approximately -6.5 dB for whole 6 – 9 GHz frequency band. A same

behavior is visible in Figure 4.36 and 4.37 for simulated values showing a flat response around -

6.5 dB. The simulated results show the designed six-port as a wideband device. The measured

results for forward transmission are not in agreement with simulated results. The forward

transmissions show a loss of more than -10 dB for whole frequency band in all cases (Figure

4.34 – 4.37) with the response rapidly changing with the frequency. At 8.5 GHz the forward

transmission has the worst response in all cases with insertion loss more than -20 dB as the

reflection coefficient at this frequency is approximately 0 dB.

Phase response (Figure 4.38) for simulated values has flat 90O phase difference (on whole

frequency band) between transmission to Port 3 and 4, and between Port 5 and 6. The Measured

phase response (Figure 4.27) has the phase difference between Port 3 and 4, and between Port 5

and 6 floating around 180O.

The reasons of measured result deviations are explained in section 4.1.1 and 4.2.1. In addition to

all these problems this design uses PCB VIAs to connect the transmission line on one side of

PCB to other side. These VIAs were implemented by drilling the PCB and soldering a small wire

on both sides. These solder joints come very close to each other introducing an undesired

capacitance.

4.3 Wideband 180O coupler design

To measure the manufactured prototypes of differential designs with available single-ended

vector network analyzer, each 100 Ω differential port of the six-port correlator is split into two

50 Ω single-ended ports. For conversion, ground plane is inserted between the DSPSLs on the

design boundaries. These two single-ended ports represent one differential port and carry single-

ended signals equal in magnitude but out of phase with 180O.

To connect the pair of 50 Ω ports (carrying complementary signals) to one 50 Ω VNA port a

wideband 180O coupler is designed which can split the one single-ended signal from VNA to two

signals equal in magnitude and out of phase by 180O and the same operation in reverse. A simple

rat-race coupler can be used for this purpose but rat-race coupler has a very limited bandwidth.

A Wilkinson divider is a broadband device in terms of equal power splitting. For equal phase

shift on large frequency-band a broadband phase-shifter using loaded transmission lines is

designed [40]. To achieve a high bandwidth with 3db coupling and constant 180O phase shift the

Wilkinson divider in combination with the broadband phase-shifter is used. Figure 4.40 and 4.41

shows the layout design and manufactured prototype respectively.

51

Figure 4.40 Layout design of wideband 180O

coupler

Figure 4.41 Manufactured prototype of wideband 180s coupler


22 m

m

33 mm

P1(Input)

P2(Output)

P3(Output)

P1P3

P2

52

Figure 4.42 Input reflection coefficients for Port 1 to 3

Figure 4.43 S-parameters for transmission between the Ports

Figure 4.44 Phase difference between the output signals

6.5 7.0 7.5 8.0 8.56.0 9.0

-40

-30

-20

-10

-50

0

Frequency (GHz)

Inp

ut

refle

ctio

ns (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



S11 Measured

S33 Measured

S22 Measured

S11 Sim

S33 Sim

S22 Sim

6.5 7.0 7.5 8.0 8.56.0 9.0

-30

-25

-20

-15

-10

-5

-35

0

Frequency (GHz)

Tra

nsm

issio

n c

oe

ffic

ien

ts (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



S21 Measured

S23 Measured

S31 Measured

S21 Sim

S23 Sim

S31 Sim

6.5 7.0 7.5 8.0 8.56.0 9.0

-100

0

100

200

-200

300

Frequency (GHz)

Ph

ase

Diffe

ren

ce

(D

eg

ree

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



Measured

Simulated

53

The input reflection coefficients (Figure 4.42) for simulated values shows input reflection of less

than -10 dB on Port 1 and less than -20 dB on Port 2 and 3. The measured values show a higher

reflection on all ports. The worst reflection occurs at 8.2 GHz with -3dB of reflection.

The forward transmission from Port 1 to 2 and 3 are shown in Figure 4.43. The simulated results

shows a wideband response from 6 – 9 GHz. Measured results have deviation from the simulated

results. The maximum deviation occurs at 8.2 GHz. Both simulated and measured results show

more than 15 dB of isolation between Port 2 and 3.

Figure 4.44 shows the simulated and measured phase difference between the outputs on Port 2

and 3 when Port 1 is used as input port. The simulated values show a maximum of 5O phase error

on 7 GHz. The measured response has 28O of maximum error on 6 GHz. At the centre frequency

(7.5 GHz) simulated results have 4O and measured results have 12

O of phase error.

The reasons for differences between the simulated and measured results are already discussed as

bad etching, substrate errors, SMA connector losses, soldering and bad grounding. Here the

uneven etching can be easily noticed in Figure 4.41. An example is the transmission line

connecting Wilkinson divider to Port 2. The transmission line gets thicker as it goes from left to

right.

54

5 Six-Port modulator and demodulator design

A six-port correlator can be used as a modulator or demodulator. Its theory and mathematics is

explained in detail in chapter 3. In this chapter the implementation of modulator and

demodulator using the designed six-port correlators is presented. The simulated electromagnetic

models of the designs are used to implement the modulator and demodulator.

The modulation scheme used is 8-PSK and a mixed analog-DSP designing is used. The baseband

signal processing is done by DSP algorithms. The digital baseband signal is then converted to

analog signal and modulated, transmitted and demodulated using six-port correlators.

5.1 Six-port modulator implementation

A six-port modulator utilizes the reflections of LO signals from port 3-6 by changing reflection

coefficients (Γ3 to Γ6) to modulate the signal. For this purpose variable impedance loads are

used which are controlled by the baseband signal to be transmitted. To check the performance of

the designs, initially 16-QAM modulation is implemented in analog environment because 16-

QAM can be easily implemented in analog environment unlike 8-PSK which need some DSP

processing. 16-QAM can be implemented by switching Γ3 and Γ6 between +1/-1 and Γ4 and Γ5

between +0.5/-0.5 [41]. Figure 5.1 depicts a simple analog six-port 16-QAM modulator.

Figure 5.1 A six-port QAM modulator. Z1 and Z2 are selected to get reflection coefficients of +0.5 and -0.5

LO RF out

Z1Z2

Z1

Z2

55

The designed six-port correlators are then optimized for modulation by minimizing the I-Q

imbalances and carrier leakage.

5.1.1 Variable port impedances

The reflection coefficients on the port 3 to 6 are altered (controlled) by the baseband data for

modulation. To obtain variable reflection coefficients, voltage controlled impedances are

required. Different design approaches have been used in research including hetero-junction FET

as variable impedance [33] and Schottky Diode as High-Speed Variable Impedance [42].

In this project an attempt was made to use the PIN diode as RF-switch or variable voltage-

controlled impedance. A PIN diode can behave like voltage-controlled impedance and PIN

diodes are also widely used as RF-switches [43]. The impedance of PIN diode decrease as

applied voltage increases, this phenomenon was exploited to switch the PIN-diode impedance

between two values generating two reflection coefficient values. Various circuits with different

models of PIN diode were simulated and some noticeable results were obtained but an optimized

design with accurate results could not be achieved because of limited time.

The task of PIN diode based variable impedance is left for future work and ideal switch model in

ADS is used as voltage controlled variable impedance, depicted in Figure 5.2. Each out of four

ports of six-port (Port 3 to 6) is terminated by an ideal switch. The switch is controlled by the

baseband input bits and it terminates the port with two different impedances. When the switch is

in open state, input impedance is Z1, and when the switch is closed, Z2 comes in parallel with Z1.

Figure 5.2 Ideal switch in ADS used as voltage controlled variable impedance. Z1 and Z2 are adjusted to get two desired input impedance values

5.1.2 8-PSK modulation using mixed analog-DSP designing

8-PSK modulation uses three baseband data bits to encode one symbol. Three baseband data-

sources are required for 8-PSK modulation or a single data-source can be divided into three

parallel bit-streams with 1/3 data rate as of original source.

56

The proposed encoding scheme uses two data-sources to map the symbol in I-axis and third data-

source to map the symbol in Q-axis. Switches on Port 3 and 6 are toggled between reflection

coefficients of +1/-1 and switches on Port 4 and 5 are toggled between reflection coefficients of

+0.414/-0.414. Two baseband sources are used to operate switches of Port 3 and 4 (toggling Γ3

& Γ4) mapping in-phase data symbol in the signal space (shown in Figure 5.3a). The third

baseband source operates the switch on Port 6 (toggling Γ6) and shifts the mapped symbol along

Q-axis (shown in Figure 5.3b), upward or downward depending on the value of bit.

Figure 5.3 Stepwise constellation diagrams for 8-PSK proposed scheme. (a) Symbols are mapped on I-axis using data-bits from two baseband source (b) Third baseband data source is used to move the symbol in Q-axis (c) Symbols without

proper 8-PSK positions (d) Symbols moved to proper positions using baseband processing

Port 5 is used to further move the symbol along Q-axis to give the constellation proper shape

(shown in Figure 5.3c-d). If the mapped symbol on I-axis is on the edges, port 5 moves it

vertically inwards by generating signal opposite to the Port 6. If the mapped symbol on I-axis

was not on the edge, Port 5 generates same signal as on port 6 supporting it to take the symbol

further away from the origin on Q-axis.

To decide about Port 5 first Port 3 and Port 4 data bits are compared, if the bits are same then

inverted bit of Port 6 is fed to Port 5 and viceversa. DSP baseband processing is used to conduct

this operation. A simple combination of XOR and XNOR gate (shown in Figure 5.4) can do this

job. Table 5.1 shows the possible values for Port 5.

57

Table 5.1 Possible combinations of data for Port 5

Port

3

Port

4

Port

6

Port

5

0 0 0 1

0 0 1 0

1 1 0 1

1 1 1 0

0 1 0 0

0 1 1 1

1 0 0 0

1 0 1 1

The complete 8-PSK modulator based on analog-digital mixed design is shown in Figure 5.4

Figure 5.4 Six-port 8-PSK modulator based on analog-DSP mixed designing

58

Three bit-sources generates baseband data. The data is processed by the combination of XOR

and XNOR gates for Port 5. The digital signal is converted to analog and applied to analog part

of six-port modulator to control the port switches.

The resultant constellation diagrams and signal spectrums are presented in Figure 5.5

(a)

(b)

6.4 6.6 6.8 7.0 7.2 7.4 7.6 7.8 8.0 8.2 8.4 8.66.2 8.8

-100

-80

-60

-40

-120

-20

Frequency (GHz)

Mo

du

late

d S

ign

al P

ow

er

(dB

m)

6.4 6.6 6.8 7.0 7.2 7.4 7.6 7.8 8.0 8.2 8.4 8.66.2 8.8

-90

-80

-70

-60

-50

-40

-100

-30

Frequency (GHz)

Mo

du

late

d S

ign

al P

ow

er

(dB

m)

59

(c)

Figure 5.5 Constellation diagrams and spectrum of 8-PSK modulated signal with data rate of 500 Mbps and modulator LO power of 0 dBm for (a) Single-ended design (b) Differential design (c) Wideband Differential design with crossed

conductors

5.2 Six-port demodulator implementation

The six-port demodulator is implemented according to the demodulation process explained in

Chapter 3. The LO signal is applied on Port 1 and received RF signal is applied on Port 2. The

output signals on Port 4 to 6 are squared, filtered by a LPF and signal on Port 3 and Port 6 are

subtracted from signal on Port 4 and 5 respectively. The schematic diagram of six-port receiver

is shown in Figure 5.6

Figure 5.6 Schematic diagram of a Six-port demodulator

7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.97.0 8.0

-80

-70

-60

-50

-40

-30

-90

-20

Frequency (GHz)M

od

ula

ted

Sig

na

l P

ow

er

(dB

m)

60

Zero-biased Schottky diodes are used for squaring the signals. As an alternative of LPF, open-

circuited radial stubs are used as notch filters on first and second harmonics of the carrier

frequencies. Operational-amplifiers are used as signal subtracting device. The detail of each

device is presented in the following sections.

5.2.1 Diode modeling

To square the signals, zero-biased Schottky diodes are used. Schottky diodes have fast switching

speed and low cut-in voltage [44]. The diode model HSMS-286B from Avago Technologies is

used. The diode is modeled in ADS along with the package-parasitic effects provided in the

datasheet. The ADS model of the diode is shown in Figure 5.7.

Figure 5.7 ADS model for HSMS-286B Schottky diode according to parameters provided in the datasheet

Along with the package-parasitic effects the input impedance of the diode model is measured to

be 49.84-j8.09 Ω, so no matching network is used between each port of correlator and diode as

the value is nearly equal to 50 Ω. The data for input impedance values for the diode model is

shown in Figure 5.8.

Figure 5.8 Input impedance of the modeled Schottky diode

7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.97.0 8.0

0

20

40

-20

60

Frequency (GHz)

Inp

ut Im

pe

da

nce

(O

hm

)

Readout

m1

Readout

m2

m1freq=real(Zin1)=49.85

7.50GHz

m2freq=imag(Zin1)=-8.09

7.50GHz

7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.97.0 8.0

0

20

40

-20

60

Frequency (GHz)

Input Im

pedance (

Ohm

)

Readout

m1

Readout

m2

m1f req=real(Zin1)=49.85

7.50GHz

m2f req=imag(Zin1)=-8.09

7.50GHz

real(Zin1)

imag(Zin1)

Real

Imag

61

5.2.2 Notch filter

The squaring device (Schottky diode) produces the harmonics of the fundamental frequency of

the carrier wave. To remove the harmonics, LPF can be used. Here notch filters instead of LPF

are used. The notch filter can be implemented by an open-circuited quarter-wave stub. To

broadband the filter, radial-stubs are used. Notch filters for first-order and second-order

harmonics are implemented and higher order harmonics are neglected as they have quite weak

power. The response of the implemented notch filter is shown in Figure 5.9. The insertion loss is

more than 50 dB at 7.5 GHz and 15 GHz.

Figure 5.9 Response of implemented notch filter for demodulation.

5.2.3 Digital judgment circuit

The demodulated signal represents each transmitted symbol by some voltage level. To decide

about the received data a judgment circuit is used to compare the demodulated signal with

threshold values and adjust the voltage to the accurate levels. The judgment circuit can be an

analog or a digital circuit. In analog processing, judgment circuit can be implemented by

instrumentation amplifier [45]. In this project digital technique is used. ADS Quantizer block in

DSP processing is used. This block takes the demodulated signal as input, compares it with the

preset thresholds to decide about the transmitted symbol and gives the baseband bits as its

output.

5.3 Six-port transmitter-receiver system

A full six-port transmitter-receiver system is implemented using behavioral modeling of

modulator and demodulator. The full transmitter-receiver system block diagram is shown in

Figure 5.10.

2 4 6 8 10 12 14 16 180 20

10

20

30

40

50

60

0

70

Frequency (GHz)

Inse

rtio

n L

oss (

dB

)

62

Figure 5.10 Complete six-port 8-PSK transmitter-receiver system implemented using mixed analog-DSP design

Transmitter-side baseband processing

Three binary bit-sources with same data-rate are used as input baseband signals. The input data

sources are processed to produce Port 5 data by the operation explained in section 5.1.2. The

digital signals are then converted to analog signals and applied to Port 4 – 6 of modulator six-

port. In parallel, the baseband binary signals are sampled exactly in the middle of each bit and

delayed. The output of this operation is used to be compared with the output of receiver after

demodulation.

Modulator, channel and demodulator

The modulator six-port uses 8-PSK scheme to modulate the applied 7.5 GHz LO signal

according to the baseband data. The modulator’s block diagram is shown in Figure 5.1. The

values of Z1 and Z2 are chosen to produce reflection coefficients of +0.414 and -0.414.

The modulated wave is transmitted over a line-of-sight (LOS) wireless link. The model of LOS

link provided in ADS is used.

The channel output is applied to demodulator six-port. The internal working of demodulator is

shown in Figure 5.6.

Down sampling and delay

BER calculation

Processing for Port 5

data

Down sampling

A/D conversion

Modulation, LOS link,

DemodulationD/A

conversionQuantiz-

ation

Baseband Signal

Generation

63

Receiver-side baseband processing

The demodulated symbols are converted to digital signal to be processed by DSP. The Quantizer

blocks in ADS are used to decide about the received symbol with number of preset threshold

levels 4 and 2 for in-phase and quadrature-phase data respectively. Two symbols are recovered

from in-phase data and one symbol from quadrature-phase data. The recovered binary bits are

sampled in the middle of the bit interval and compared with the sampled bits on transmitter side

to calculate bit error rate (BER).

64

6 Designed Six-port Transceiver System Evaluation

In this chapter the system level evaluation of single-ended, simple differential and differential

with cross-conductors (wideband) Six-port transceiver designs is discussed. ADS simulation

results of the Six-port transceiver system comprising the electromagnetic models of single-ended

and differential designs are presented and different system level parameters such as Noise figure,

BER (Bit Error Rate) and Dynamic Range are evaluated and compared.

6.1 Noise Figure Comparison

Noise figure of a component is defined as the ratio of input SNR to output SNR. The noise figure

of the whole receiver system is dominated by the noise figure of first active component. The

sensitivity of a wireless receiver depends on the receiver’s noise figure [19].

For single-ended and differential six-port designs the noise figures are obtained using S-

parameter simulations with “noisecalc” option enabled. For the six-port modulator, Port 3 to Port

6 are terminated with voltage-controlled variable impedances. Noise figure simulations are

performed with Port 1 as input (LO signal) and Port 2 as output port (RF output signal). For the

six-port demodulator, Port 1 is used as LO port, Port 3 to Port 6 are attached with diodes, notch

filters and differential amplifiers to recover baseband signals and modulated RF signal is applied

on Port 2. The simulations are performed to obtain noise figure between the input modulated

signal (Port 2) and output demodulated signal.

Differential systems are claimed to have the advantage of better noise rejection [12]. The

simulated results showed the same phenomena. The compared results of all three designs for

transmitter-side or modulator-side are shown in Figure 6.1.

In Figure 6.1 noise figure for Differential designs is less than that for Single-ended design. The

differential system does not depend on ground reference-plane for working so it does not

experience ground noise. For single-ended design, the NF was relatively low until 7.0 GHz but

with increase in frequency, it started to increase. For differential design the maximum noise

figure is 3.3 dB at 7.3 GHz.

65

Figure 6.1 Transmitter-side Noise Figure comparison of Single-ended, Differential and Differential with crossed conductors

Figure 6.2 Receiver-side Noise Figure comparison of Single-ended, Differential and Differential with crossed conductors

Figure 6.2 shows the receiver noise figure for all three systems. The differential design has the

best noise figure with value less than 2 dB for 6 – 8.5 GHz. The differential design with crossed

conductors has more noise than simple differential. The reason for this is that signal is passed

through VIA holes several times.

6.2 BER and Dynamic Range Comparison

The dynamic range of a receiver is the range of RF input power over which the receiver can

correctly demodulate the received signal. The lower boundary of the range is restricted by the

sensitivity of the receiver. A more sensitive receiver can sense a minor signal increasing dynamic

6.5 7.0 7.5 8.0 8.56.0 9.0

2

3

4

5

1

6

Frequency (GHz)

No

ise

Fig

ure

(d

B)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)dB(S(1,1))

dB(S(2,2))


dB(_2_SixportSE..S(2,2))Diff with VIAsDifferentialSingle-ended

6.5 7.0 7.5 8.0 8.56.0 9.0

0.5

1.0

1.5

2.0

2.5

3.0

0.0

3.5

freq, GHz

Tra

nsm

itte

r N

ois

e F

igu

re (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

2

3

4

5

6

7

8

9

1

10

Frequency (GHz)

Re

ce

ive

r N

ois

e F

igu

re (

dB

)

6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))



6.5 7.0 7.5 8.0 8.56.0 9.0

-50

-40

-30

-20

-10

-60

0

Frequency (dB)

Inp

ut R

efle

ctio

n (

dB

)

dB(S(1,1))

dB(S(2,2))


dB(_2_SixportSE..S(2,2)) Diff with VIAsDifferentialSingle-ended

66

range. The upper boundary of dynamic range is usually restricted by the 1-dB compression point

of the power amplifier used in the receiver [19].

For the designed six-port receiver the BER and Dynamic Range comparison is performed by

varying the RF power at the receiver side and recording the corresponding BER while keeping

all other system parameters constant. For that purpose the transmitter and receiver are connected

through an ideal amplifier model provided in ADS. The amplifier gain is first decreased below 0

dB in steps, using amplifier as an attenuator. The RF power and BER are recorded for each

simulation. Then the gain is increased in steps above 0 dB (amplifying the signal) and again RF

power and BER are recorded. The same simulation setup is used for all three six-port

transceivers. The results are plotted in Figure 6.3 as obtained BER vs. receiver input RF power.

Figure 6.3 Dynamic range comparison of single-ended, differential and differential with crossed conductors design

As can be seen in Figure 6.3, generally for all three designs there is a lower and an upper limit

beyond which the BER is very high. The lower limit is regarded as the Sensitivity of the receiver

and is a certain threshold value of RF signal power below which it can’t interpret the signal. The

upper limit is dependent on the threshold power levels of the Quantizer above which the digital

decision making circuitry is unable to decode the signal properly.

The results show the similarity in behavior among the Single-ended and Simple Differential

designs whereas the Differential with cross conductors require more power to interpret the signal

properly and has less dynamic range.

The sensitivity of the single-ended and differential are found approximately the same. The proper

signal reception starts at approximately 0 dBm which is a high value as compared to

commercially available systems. The values recorded are without using low noise amplifier

(LNA). A LNA can be embedded in the system to increase the sensitivity.

67

6.3 BER and Data rate comparison

BER of the single-ended design is also compared with differential design by varying the data-

rate of the system. Symbol rate of the transceiver system is varied from 100 Msymbols/s to 500

Msymbols/s and the corresponding BER is recorded. The results are shown for the Single-ended

and simple differential design in Figure 6.4

Figure 6.4 BER vs Datarate comparison for Single-ended and Simple differential design

The BER for differential design is less than single ended for symbol rate upto 250 MSymbol/s.

From 300 to 400 MSymbol/s single-ended performs better. Although the noise figure for

differential is better but for certain data-rates its BER is more than single-ended. The reason is

that bit-error rate not only depends on noise conditions but also on the designing, I/Q mismatches

and detecting circuitry.

6.4 Modulated Signal Constellation Diagrams and Power Spectrum Comparison

The modulated signal I/Q constellation diagrams and power spectrum is compared for all three

designs. The analysis is done on data-rate of 500 Mbit/s and LO signals power of 0 dBm. For

I/Q constellation the ADS sub-circuit block “TkConstellation” is used which is present in the

DSP components library “Interactive Controls and Displays”. For viewing Signal power

spectrum, “Spectrum Analyzer” is used.

68

(a)

(b)

6.4 6.6 6.8 7.0 7.2 7.4 7.6 7.8 8.0 8.2 8.4 8.66.2 8.8

-100

-80

-60

-40

-120

-20

Frequency (GHz)M

od

ula

ted

Sig

na

l P

ow

er

(dB

m)

6.4 6.6 6.8 7.0 7.2 7.4 7.6 7.8 8.0 8.2 8.4 8.66.2 8.8

-90

-80

-70

-60

-50

-40

-100

-30

Frequency (GHz)

Mo

du

late

d S

ign

al P

ow

er

(dB

m)

69

(c)

Figure 6.5 8-PSK modulated signal constellation and spectrum for (a) Single-ended (b) Differential (c) Differential with crossed conductors

The 8-PSK constellation for single-ended design is almost same as for the differential design.

For Differential with crossed conductors the constellation diagram (Figure 6.5c) shows a

displacement from central point. This shows that LO signal leakage is present in the modulator.

Also in its signal power spectrum there is a spike at centre frequency of 7.5 GHz which is

evidence of carrier leakage. Rest of the spectrum shows lesser power compared to single ended

and simple differential design.

7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.97.0 8.0

-80

-70

-60

-50

-40

-30

-90

-20

Frequency (GHz)M

od

ula

ted

Sig

na

l P

ow

er

(dB

m)

70

7 Conclusion & Future Work

7.1 Conclusion

In this thesis work, the main focus was on the design of Six-port Direct carrier

modulator/demodulator for 8-PSK modulation/demodulation with Single ended, Differential and

Differential with crossed conductors (or phase inverter) signaling types and their performance

comparison based on system level parameters. The designing for the above mentioned three

types was done in ADS and prototypes were fabricated in PCB lab. 8-PSK modulation and

demodulation was done on simulated electromagnetic models of the three designs. For this

purpose co-simulation was performed involving Analog/RF and DSP simulations. DSP

simulation was used to produce/recover the baseband signals and to observe the modulated

signal constellation and power spectrum whereas Analog/RF simulation was done for

modulation/demodulation through Six-port correlator. After that a whole communication system

was modeled and performance comparison on the basis of different system parameters was done

in ADS. Noise Figure, BER, Dynamic range, I/Q constellation diagrams and Power spectrum

was compared for the designs.

Through noise figure comparison, we observed that both differential designs showed much better

performance than single-ended. This proves the fact that differential system offers the advantage

of better noise rejection. There was not much to choose between different designs through BER

vs. dynamic range and BER vs. data-rate comparison i.e. they were almost the same. I/Q

constellation was best for simple differential design and worst for differential with crossed

conductors due to the presence of carrier leakage. The results show that differential is better

choice in terms of noise rejection but on the other hand it has a disadvantage of complexity.

Differential signaling is harder to manage. The fabrication process demands much more

accuracy. The source should be able to provide perfect complementary signals i.e. with equal

magnitude and 180o phase apart signals. Also, the differential circuit should be able to maintain

this coupling.

7.2 Future Work

In this thesis work, the variable impedance termination was managed through ideal switches in

ADS. In order to design whole system on real-component basis, the ideal switch can be replaced

with a PIN, Schottky diode switches or a transistor. An effort was done in this work too but it

required lot more work and time so it is suggested for future work.

Also, for complete and accurate comparison between single ended and differential systems, this

system level designing can be performed on lower frequency such as 2.5 GHz so the parasitic

71

losses would not much affect the results. This can be useful in future research on the comparison

between single ended and differential systems.

72

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