digital integrated circuitdesign - een.iust.ac.ireen.iust.ac.ir/profs/abrishamifar/digital...
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Adib AbrishamifarEE Department
IUST
Lecture 1 - History
Digital Integrated Circuit Design
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 20082/43
} History and the road map} Moore’s Law} Physical design fundamentals} Performance issues
Outline
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 20083/43
The BabbageDifference Engine(1832)25,000 partscost: £17,470
The First Computer
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 20084/43
} John Bardeen, Walter Brattain & Wiliam Shockley invented “The first transistor” in 1947
The Invention of Transistor
First transistorBell Labs, 1948
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 20085/43
} Jack Kilby & Robert Noyce invented “The Integrated Circuit” in 1958
The Invention of Integrated Circuit
Bipolar logic1960’s
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 20086/43
The First Electronic (Vacuum Tube) Computer (1946)
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 20087/43
} In 1965, Gordon Moore (Co-Founder of Intel) predicted that transistors would continue to shrink, (number of transistors per chip would grow exponentially) allowing :} Doubled transistor density every 18-24 months} Doubled performance every 18-24 months
} History has proven Moore right} But, is the end is in sight?} Physical limitations} Economic limitations
I’m smilingbecause I was right!
Gordon MooreIntel Co-Founder and Chairmain Emeritus
BUT, no exponential
Is forever!
Moore’s Law
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 20088/43
19711000 transistors1 MHz operationL=10µm
Intel 4004 Micro-Processor
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 20089/43
PowerPC 7400 (G4)6.5M transistors / 450MHz / 8-10W
L=0.15µm
Pentium® III28M transistors / 733MHz-1GHz / 13-26W
L=0.25µm shrunk to L=0.18µm
Previous Processors
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200810/43
Pentium® 442M transistors / 1.3-1.8GHz / 49-55W
L=0.18µm
Pentium® 4 “Northwood”55M transistors / 2-2.5GHz
L=0.13µm
Previous Processors
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200811/43
PowerPC® 940 (G5)58M transistors / 2GHz / 97W
L=0.13µm Area=118mm2
Intel Itanium® 2410M transistors / 1.3GHz / 130W
L=0.13µm Area=374mm2
Previous Processors
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200812/43
nVidia GeForce457M transistors / 300MHz / L=0.15µm
Graphics Processors
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200813/43
} Penrym} 45nm Intel® Core™2 quad-core processors will have 820
million transistors. Thanks to high-k metal transistor invention, think of 820 million more power efficient light bulbs going on and off at light-speeds. The dual-core version has a die size of 107mm2, which is 25 percent smaller than Intel's current 65nm products
Current Processors
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200814/43
Year Chip L transistors1971 4004 10µm 2.3K1974 8080 6µm 6.0K1976 8088 3µm 29K1982 80286 1.5µm 134K1985 80386 1.5µm 275K1989 80486 0.8µm 1.2M1993 Pentium® 0.8µm 3.1M1995 Pentium® Pro 0.6µm 15.5M1999 Mobile PII 0.25µm 27.42000 Pentium® 4 0.18µm 42M2002 Pentium® 4 (N) 0.13µm 55M
Microprocessor Trends (Intel)
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200815/43
400480088080
8085 8086286
386486 Pentium® proc
P6
0.001
0.01
0.1
1
10
100
1000
1970 1980 1990 2000 2010Year
Tran
sist
ors
(MT)
2X growth in 1.96 years!
Courtesy, Intel
Moore’s law in Microprocessors
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1,000,000
100,000
10,000
1,000
10
100
11975 1980 1985 1990 1995 2000 2005 2010
808680286
i386i486
Pentium®Pentium® Pro
K 1 Billion 1 Billion TransistorsTransistors
Source: IntelSource: Intel
ProjectedProjected
Pentium® IIPentium® III
Transistor Counts
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200817/43
Source: Textbook, Industry Reports
0.0625
0.25
1
4
16
64128
256512
0.01
0.1
1
10
100
1000
1975 1980 1985 1990 1995 2000 2005
Size (Mb)
DRAM Memory Trends (Log Scale)
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200818/43
Evolution in Complexity
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40048008
80808085
8086286
386486 Pentium ® procP6
1
10
100
1970 1980 1990 2000 2010Year
Die
siz
e (m
m)
~7% growth per year~2X growth in 10 years
Die size grows by 14% to satisfy Moore’s LawDie size grows by 14% to satisfy Moore’s Law
Die Size Growth
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200820/43
P6Pentium ® proc
48638628680868085
8080800840040.1
1
10
100
1000
10000
1970 1980 1990 2000 2010Year
Freq
uenc
y (M
hz)
Lead Microprocessors frequency doubles every 2 yearsLead Microprocessors frequency doubles every 2 years
Doubles every2 years
Frequency
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200821/43
P6Pentium ® proc
486386
2868086
808580808008
4004
0.1
1
10
100
1971 1974 1978 1985 1992 2000Year
Pow
er (W
atts
)
Lead Microprocessors power continues to increaseLead Microprocessors power continues to increase
Power Dissipation
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200822/43
5KW 18KW
1.5KW 500W
400480088080
80858086
286386
486
Pentium® proc
0.1
1
10
100
1000
10000
100000
1971 1974 1978 1985 1992 2000 2004 2008Year
Pow
er (W
atts
)
Power delivery and dissipation will be prohibitivePower delivery and dissipation will be prohibitive
Power will be a major problem
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200823/43
Summary - Technology Trends
} Processor} Logic capacity increases ~ 30% per year} Clock frequency increases ~ 20% per year} Cost per function decreases ~20% per year
} Memory} DRAM capacity: increases ~ 60% per year
(4x every 3 years)} Speed: increases ~ 10% per year} Cost per bit: decreases ~25% per year
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200824/43
What we’re going to do
} Chip design: MOSIS (MOS IC Service)
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200825/43
We Need
} Fabrication Basics: Photolithography} Processing Steps } Transistor Structure} Layout Design
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Wafer
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Wafer
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Mask
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} Current cost: $2-3 billion} Typical Fab line occupies about 1 city block,
employs a few hundred people} Most profitable period is first 18 months-2 years
The Cost of Fabrication
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200830/43
} For large-volume ICs:} packaging is largest cost} testing is second-largest cost
} For low-volume ICs, design costs may swamp all manufacturing costs
Cost Factors in ICs
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200831/43
specification
behavior
Register-transfer
logic
circuit
layout
English
executableprogram
sequentialmachines
Logic gates
transistors
rectangles
system throughput,design time
function units,clock cycles
literals, gate depth,power
nanoseconds
microns
function
cost
Hierarchy of Design Abstractions
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200832/43
“Microscopic Problems”• Ultra-high speed design• Interconnect• Noise, Crosstalk• Reliability, Manufacturability• Power dissipation• Clock distribution
Everything Looks a Little Different
“Macroscopic Issues”• Time-to-Market• Millions of Gates• High-Level Abstractions• Reuse & IP: Portability• Predictability• etc.
…and There’s a Lot of Them!
∝ DSM ∝ 1/DSM
?
Challenges in Digital Design
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200833/43
Why Scaling?
} Technology shrinks by 0.7/generation} With every generation can integrate 2x more functions per
chip; chip cost does not increase significantly} Cost of a function decreases by 2x} But …} How to design chips with more and more functions?} Design engineering population does not double every two
years…} Hence, a need for more efficient design methods} Exploit different levels of abstraction
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200834/43
DEVICE
n+n+S
GD
+
CIRCUIT
GATE
MODULE
SYSTEM
Design Abstraction Levels
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200835/43
Design Metrics
} How to evaluate performance of a digital circuit (gate, block, …)?} Cost (Area)} Reliability} Scalability} Speed (delay, operating frequency) } Power dissipation} Energy to perform a function
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200836/43
} NRE (non-recurrent engineering) costs} design time and effort, mask generation} one-time cost factor
} Recurrent costs} silicon processing, packaging, test} proportional to volume} proportional to chip area
Cost of Integrated Circuits
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200837/43
Single die
Wafer
Going up to 12” (30cm)
Die Cost
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0.00000010.0000001
0.0000010.000001
0.000010.00001
0.00010.0001
0.0010.001
0.010.01
0.10.111
19821982 19851985 19881988 19911991 19941994 19971997 20002000 20032003 20062006 20092009 20122012
cost: cost: ¢¢--perper--transistortransistor
Fabrication capital cost per transistor (Moore’s law)
Cost per Transistor
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$4179%402961.5$15000.803Pentium
$27213%482561.6$17000.703Super Sparc
$14919%532341.2$15000.703DEC Alpha
$7327%661961.0$13000.803HP PA 7100
$5328%1151211.3$17000.804Power PC 601
$1254%181811.0$12000.803486 DX2
$471%360431.0$9000.902386DX
Die cost
YieldDies/wafer
Area mm2
Def./ cm2
Wafer cost
Line width
Metal layers
Chip
Some Examples (1994)
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200840/43
0.70.90.91.01.01.0Supply voltage (V)
999888Metal layers
6.75.65.24.03.12.3Clock (GHz)
354045536575MPU Gate length (nm)
200720062005200420032002Production year
International Technology Roadmap for Semiconductors (ITRS)
Technology Trend
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200841/43
} Speed} Noise} Clock distribution} Power distribution } Low power
Performance Issues
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200842/43
1400
1200
1000
800
600
400
200
mW
/mm
mW
/mm
22
00.18 µm 0.13 µm 0.10 µm 0.05 µm
Leakage Leakage power power densitydensity
DynamicDynamicpower power densitydensity
Power
IUST: Digital IC Design LECTURE 1 : HistoryLECTURE 1 : History Adib Abrishamifar 200843/43
Summary
} Digital integrated circuits have come a long way and still have quite some potential left for the coming decades
} Some interesting challenges ahead} Getting a clear perspective on the challenges and potential
solutions is the purpose of this course} Understanding the design metrics that govern digital
design is crucial} Cost, reliability, speed, power and energy dissipation