Digital to Analog Converter / Comparator

Last updated 5/21/19

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D/A

• Digital to Analog Converter

• Converts a digital word to a fixed analog voltage level

• Many applications• Electronic music

• Audio conversion – cell phones

• Video conversion – digital TV

• Mechanical conversion – valve opening

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D/A

• Digital to Analog Converter

• Converts a digital word to a fixed analog voltage level

• Many types of D/A converters• Resistor DAC

• Current DAC

• Switched Capacitor DAC

• Delta-sigma DAC

• Pulse width modulator

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D/A

• Digital to Analog Converter Performance

• Resolution• n-bit digital word can represent 2n levels

• 8-bit DAC → 256 levels

• Frequency• Outputs are provided at a fixed rate – sampling rate

• Accuracy• Linearity

• Noise

• Many others

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D/A

• Digital to Analog Converter Performance

• 4 bit DAC, 5v range• 5v / 24

→ 0.3125v/step

Code Output

0000 0.0v

0001 0.3125v

0010 0.625v

0011 0.9375v

…

1101 4.0625v

1110 4.375v

1111 4.6875v

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D/A

• Digital to Analog Converter Performance

• 4 bit DAC, 5v range

Code

0010

0011

0100

0011

0111

0101

0011

0110

1001

0000

Tim

e

voltage

time

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D/A

• Digital to Analog Converter Performance

• Typically additional signal conditioning is required to ‘clean up’ the output

voltage

time

voltage

time

filtering

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D/A

• D to A Converter

• Converts a digital word to a fixed voltage level

• example: 4 bit code0000 → Vout = VrefL

1111→ Vout = VrefL+(VrefH-VrefL)(15

16)

b0 contributes 1/16

b1 contributes 1/8

b2 contributes ¼

b3 contributes ½

0110 → Vout = VrefL+(VrefH-VrefL)(1

4+

1

8)

1000 → Vout = VrefL+(VrefH-VrefL)(1

2)

2R

R

R

R

2R

2R

2R

2R

VrefL

“b0”VrefHVrefL

“b1”VrefHVrefL

“b2”VrefHVrefL

“b3”VrefHVrefL

vout

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D/A

• D to A Converter

• Converts a digital word to a fixed voltage level

• example: 4 bit code0000 → Vout = 0

1111→ Vout = VrefH*(15

16)

b0 contributes 1/16

b1 contributes 1/8

b2 contributes ¼

b3 contributes ½

0110 → Vout = VrefH(1

4+

1

8)

1000 → Vout = VrefH(1

2)

2R

R

R

R

2R

2R

2R

2R

Gnd

“b0”VrefHGnd

“b1”VrefHGnd

“b2”VrefHGnd

“b3”VrefHGnd

vout

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D/A

• D to A Converter

• Superposition and Thevenin Equivalents

2R

R

R

R

2R

2R

2R

2R

Gnd

“b0”

“b1”

“b2”

“b3” vout

R

R

R

R

2R

2R

2R

Gnd

“b1”

“b2”

“b3” vout

V+

-

b0 x VrefH2

2R

2R

Gnd

“b0”VrefHGnd

VrefHGnd

VrefHGnd

VrefHGnd

VrefHGnd

VrefHGnd

VrefHGnd

VrefHGnd

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D/A

• D to A Converter

voutvout

R

R

R

2R

2R

Gnd

“b2”VrefHGnd

“b3”VrefHGnd

V+

-

b0 x VrefH4

R

R

R

R

2R

2R

2R

Gnd

“b1”VrefHGnd

“b2”VrefHGnd

“b3”VrefHGnd

V+

-

b0 x VrefH2

R

R

2R

Gnd

V+

-

b0 x VrefH2

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D/A

• D to A Converter

R

R

2R

Gnd

“b3”VrefHGnd

vout

V+

-

b0 x VrefH8

R

R

R

2R

2R

Gnd

“b2”VrefHGnd

“b3”VrefHGnd

vout

V+

-

b0 x VrefH4

R

R

2R

Gnd

V+

-

b0 x VrefH4

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D/A

• D to A Converter

R

Gnd

vout

V+

-

b0 x VrefH16

R

R

2R

Gnd

“b3”VrefHGnd

vout

V+

-

b0 x VrefH8

R

R

2R

Gnd

V+

-

b0 x VrefH8

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D/A

• D to A Converter

• b2 analysis

2R

R

R

R

2R

2R

2R

2R

Gnd

“b0”VrefHGnd

“b1”VrefHGnd

“b2”VrefHGnd

“b3”VrefHGnd

vout

R

R

2R

Gnd

“b3”VrefHGnd

vout

V+

-

b2 x VrefH2

2R

R

R

2R

2R

2R

Gnd

“b2”VrefHGnd

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D/A

• D to A Converter

R

Gnd

vout

V+

-

b2 x VrefH4

R

R

2R

Gnd

“b3”VrefHGnd

vout

V+

-

b2 x VrefH2

R

R

2R

Gnd

V+

-

b2 x VrefH2

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D/A

• D to A Converter

• Vout = ((b0)/16 + (b1)/8 + (b2)/4 + (b3)/2) * VrefH

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D/A

• Example

Code Steps Volts

0000 0000 0 0

0000 0001 1 0.013

0001 0000 16 0.206

0111 1111 127 1.637

1000 0000 128 1.650

1100 0000 192 2.475

1111 1111 255 3.287

3.3V Vref8 bit convertor

3.3v / 28 steps= 12.89mv/step

Comparator

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Comparator

• Comparator• Compare the voltage of two inputs and generate

‘0’ if minus input > plus input

‘1’ if minus input < plus input

• Open Loop OpAmp

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MSP432P401R

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Comparator

• MSP432 Comparators

• Analog Comparator• 2 blocks

• Input Multiplexing (8)

• Hysteresis Generator

• Programmable RC filter

• Can Generate Interrupt

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Comparator

• Comparator

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Comparator

• ComparatorCOMP_E0->CTL0, …COMP_E1->CTL0, …

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Comparator

• Comparator

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Comparator

• Comparator

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Comparator

• Comparator

τ = R x C8-10 τ recommended for sample time

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Comparator

• Comparator

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Comparator

• Comparator

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Comparator

• Comparator

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Comparator

• Comparator

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Comparator

• Comparator

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Comparator

• Comparator

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Comparator

• Comparator Example

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Comparator

• Comparator Example

/** comparator_example.c** Created on: Jul 27, 2018* Author: johnsontimoj*/

////////////////////////////////////// use port 7.7 as + input (C02)// use port 8.0 as - input (C01)//// use port 7.1 as output//// use a potentiometer to sweep + input// use a fixed divider for – input//// toggle an LED with the output/////////////////////////////////////

// includes#include "msp.h"#include <stdio.h>

// prototypesvoid pin_setup(void);void comp_setup(void);

int main(void){// setup routinespin_setup();comp_setup();

while(1){; // do nothing in the main program

} // end while

return 0;}

void pin_setup(void){// setup pins// Port 8 pins 0 and Port 7 pin 7 "11" select mode// Port 7 pin 1 is output, mode '01'P8->SEL0 |= 0x01; // '11' pin functionalityP8->SEL1 |= 0x01;P7->SEL0 |= 0x80; // '11' pin functionalityP7->SEL1 |= 0x80;

P7->SEL0 |= 0x02; // '01' pin functionalityP7->SEL1 &= ~0x02;P7->DIR |= 0x02;

return;}

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Comparator

• Comparator Example

void comp_setup(void){// setup Comparator E0

// en - in xxx in1 en + in xxx in2// 1 000 0001 1 000 0010COMP_E0->CTL0 = 0x8182;

// xxx x x on normal xx no_ex no_sht no_int no_filt no_inv x// 000 0 0 1 01 00 0 0 0 0 0 0COMP_E0->CTL1 = 0x0500;

// no_ref// 0 00 00000 00 0 0000COMP_E0->CTL2 = 0x0000;

// disable buffer inputs 0 and 2// 0000 0000 0000 0101COMP_E0->CTL3 = 0x0005;

// no interrupts// xxx 0 xx 0 0 xxx x xx x xCOMP_E0->INT = 0x0000;

return;}