July 2002

Mark Webster, Intersil

Slide 1

doc.: IEEE 802.11-02/429r0

Submission

Scrambler Mismatch Correction Using the MAC FEC

Mark Webster, Mike Seals, Steve Halford, Paul Chiuchiolo

Intersil

July 2002

July 2002

Mark Webster, Intersil

Slide 2

doc.: IEEE 802.11-02/429r0

Submission

Overview• A forward-error-correction (FEC) option exists in the 802.11e

draft which uses an 8-octet correcting Reed-Solomon (255,239) block code.

• If the 802.11a PHY demodulator makes any bit-errors in the received scrambler seed (state), the FEC blocks will all error. (IEEE 802.11-02/050 and –02/221)

• An nice solution to this problem has been proposed (IEEE 802.11-02/325)

• Unfortunately, this solution weakens the performance of the Reed-Solomon FEC

• Herein, a simple technique is presented which restores 802.11a performance to 10-9 frame-error-rates

• No additional overhead is added to the FEC frames to make this technique work

• The FEC is used to help determine the scrambler mismatch

July 2002

Mark Webster, Intersil

Slide 3

doc.: IEEE 802.11-02/429r0

Submission

Solution Constraints• The MAC and PHY cannot coordinate.

The existing interface must remain as is.• The fix cannot be made in the PHY• Systematic property must remain, so

802.11e radios w/o the FEC option can process PHY-error-free frames

• Legacy radio’s (pre-802.11e) must be able to read the MAC header without any knowledge of 802.11e

July 2002

Mark Webster, Intersil

Slide 4

doc.: IEEE 802.11-02/429r0

Submission

Desirable Solution Features

• Works at frame-error-rates to 10-9

(IEEE 820.11-00/40 and 802.11-00/377)• Works for short frames and long frames• Introduces no extra frame overhead• Solution works for all 802.11 PHY’s

– Prevents MAC from being PHY dependent– Must fix the 802.11a problem (and 802.11g’s OFDM)– Must not introduce a new problem to other PHY’s– The MAC-level fix should be PHY blind

• Low complexity, low latency, little buffering

July 2002

Mark Webster, Intersil

Slide 5

doc.: IEEE 802.11-02/429r0

Submission

802.11e FEC Frame Format

32 16 208 16 208 16 4 to 208 16 4

MACHeader

VariableLengthFrame Body

FrameChecksum

FECParityOctets

MAC Header FEC Block: (48,32) shortened by m = 207Normal Data FEC Block: (224,208) shortened by m = 31

All numbers are in octets

July 2002

Mark Webster, Intersil

Slide 6

doc.: IEEE 802.11-02/429r0

Submission

An Existing Proposed Solution

July 2002

Mark Webster, Intersil

Slide 7

doc.: IEEE 802.11-02/429r0

Submission

A Proposed Solution• Presented in Sydney, May 2002

– Doc.: IEEE 820.11-02/325r0– Title: Dual Precoding with FEC Packets– Authors: Chris Heegard, Lior Ophir, Richard

Williams and Sid Schrum• Moving average bit-filters and recursive

bit-filters are used, exploiting the properties of the 802.11a scrambler mismatch sequence

July 2002

Mark Webster, Intersil

Slide 8

doc.: IEEE 802.11-02/429r0

Submission

Solution Presented in Sydney(doc:IEEE 802.11-02/325r0)

1/g(D)IIRx(D) FEC

Encodeg(D)FIR

1/g(D)IIR

+

x2(D)=0

1/g(D)IIR

FECDecodeg(D)

Self-SyncFIR x(D)

x(D) Equivalent802.11a PHY

Legacy StationsSee Systematic Data(MAC Header)

ScramblerMismatch Removed

Initial stateNo mismatch: state =0Mismatch: state ~=0

July 2002

Mark Webster, Intersil

Slide 9

doc.: IEEE 802.11-02/429r0

Submission

Issues With Sydney’s Solution• Precoding weakens the MAC FEC (IEEE 11-02-

364r3-E)• The receive self-synchronizing FIR filter causes

error multiplication– Up to 3 * (Number of bit errors)– Up to 2 * (Number of octet errors)

• Instead of the Reed-Solomon (255,239) correcting 8 octets in error, it can be limited by 4 octets in error at the PHY output

• The FEC effectiveness is lower-bounded to half the design goal for independent octet errors

July 2002

Mark Webster, Intersil

Slide 10

doc.: IEEE 802.11-02/429r0

Submission

Bit-Error Multiplication Problem

D4 D3

+ +

FIR Bit-Filter, g(D)

Input BitError Pattern00100000000

Output Bit Error Pattern00100010010

One input error 3 output errors

For every input bit error, up to 3 output bits errors can occur.

RX PHY OUTPUT TO FEC DECODER

July 2002

Mark Webster, Intersil

Slide 11

doc.: IEEE 802.11-02/429r0

Submission

Octet-Error Multiplication Problem

D4 D3

+ +

FIR Bit-Filter, g(D)

Input OctetError Pattern0100000000000000

Output Bit Error Pattern0100010010000000

One octetin error

2 octets in error

For every input octet in error, up to 2 output octets can be in error.

TO FEC DECODERX PHY OUTPUT

July 2002

Mark Webster, Intersil

Slide 12

doc.: IEEE 802.11-02/429r0

Submission

PHY Error Events• 1 and 2 Mbps DSSS & FH PHY’s

experience random bit errors• 5.5 Mbps CCK experiences nibble errors

(4 bit chunks)• 11 Mbps CCK experiences octet errors• OFDM experiences some form of error

clustering due to Viterbi trace-back re-sync behavior

July 2002

Mark Webster, Intersil

Slide 13

doc.: IEEE 802.11-02/429r0

Submission

A New Idea

July 2002

Mark Webster, Intersil

Slide 14

doc.: IEEE 802.11-02/429r0

Submission

A New Idea• MAC header is short compared to full

FEC blocks (32 vs. 208 data octets), so the MAC header is much more robust.

• Therefore, use dual-precoding on the MAC header only.

• Dual-precoding enables FEC decoding in the face of scrambler mismatch

• The FEC can then be used to help compute the scrambler mismatch

July 2002

Mark Webster, Intersil

Slide 15

doc.: IEEE 802.11-02/429r0

Submission

New Solution’s Frame Format• Use dual precoding only on the MAC header

– Little performance loss because MAC header is so short

• No additional overhead added to frame

32 16 208 16 208 16 4 to 208 16 4

MACHeader

VariableLengthFrame Body

FrameChecksum

• Correct scrambler mismatch • Switch to pure FEC• Do not use precoding here

• Use dual precoding• MAC computes scrambler mismatch

July 2002

Mark Webster, Intersil

Slide 16

doc.: IEEE 802.11-02/429r0

Submission

New Solution’s Block Diagram

1/g(D)IIR

FECEncodeg(D)

FIR

1/g(D)IIR

FECDecodeg(D)

Self-SyncFIR

PHY

x(D) MUX

MUX FEC

Encode

MUX

MUXFEC

Decode

x(D)

ComputeScramblerMismatch

Tx MUX ControlMAC HDR Blk: Upper PathData Blk: Lower Path

Rx MUX ControlMAC HDR Blk: Upper PathData Blk: Lower Path

+

ScramblerCorrect Jam State

July 2002

Mark Webster, Intersil

Slide 17

doc.: IEEE 802.11-02/429r0

Submission

Computing Scrambler Mismatch: Basic Concept

x(D)+(D)+E(D)+

DesiredData

ScramblerMismatchNoise Bit

Errors

(D)+E(D)

StripData

+

StripErrors

(D)

x(D) E(D)

PHY

Any 7 error-freebits specify state.Location specifiesstate phase offset.

Provided by FEC Decoder

Only exists for 802.11a

RecoveredData

ErrorPattern

July 2002

Mark Webster, Intersil

Slide 18

doc.: IEEE 802.11-02/429r0

Submission

Compute Scrambler Mismatch Using MAC Header

1/g(D)IIR

FECDecodeg(D)

Self-SyncFIR Rx Data

x(D)PHY

x(D)+(D)+E(D) +

DesiredData

ScramblerMismatch Bit

Errors(D)+E(D)

StripData

1/g(D) IIR

Trimmedg(D)E(D)

+

StripErrors

Trim InputTo Start atZero State Jam Error Pattern

State=0

(D)Unique State• Any 7 error-free bits (address) • Plus, location in frame (index)

g(D)x(D)+(D)+g(D)E(D)

Recovered Datag(D)x(D)

ScrmblrMismatchState

(D): Self-Sync start-up errors.Occur only in first 7 bits.(first octet).

Error Pattern(D)+g(D)E(D) Trimmed

E(D)

July 2002

Mark Webster, Intersil

Slide 19

doc.: IEEE 802.11-02/429r0

Submission

Performance with 802.11a• Performance reaches

10-9 frame error rates

• No degradation with 7 FEC payload blocks

• Small degradation with 1 FEC payload block

Error Rate vs. Bit SNR

July 2002

Mark Webster, Intersil

Slide 20

doc.: IEEE 802.11-02/429r0

Submission

Performance with 802.11b (mandatory modes)

• Uncorrelated octet errors

• Some performance loss exists if used on low-error-rate 802.11b packets

• Some MAC implementations may choose to not be PHY blind?

Error Rate vs. Byte Error Rate

July 2002

Mark Webster, Intersil

Slide 21

doc.: IEEE 802.11-02/429r0

Submission

Additional Detail

July 2002

Mark Webster, Intersil

Slide 22

doc.: IEEE 802.11-02/429r0

Submission

FEC Decoder Detail• Error pattern is easily output from FEC

decoderError Pattern(D)+g(D)E(D)

July 2002

Mark Webster, Intersil

Slide 23

doc.: IEEE 802.11-02/429r0

Submission

Recovering Bit Errors E(D):Linear Superposition

g(D)

Self-SyncFIR

PHY

1/g(D)

IIRg(D)E(D) E(D)E(D)

• IIR state must match FIR state• IIR is not self-synchronizing• IIR state must not contain false errors• IIR has infinite false-error propagation• It will be shown how to do this

In practice, • Provided by FEC decoder• 1st octet is discarded to eliminate self-sync start-up errors (D)Bit

Errors

July 2002

Mark Webster, Intersil

Slide 24

doc.: IEEE 802.11-02/429r0

Submission

Example: Trim Error Pattern and Jam IIR State

g(D)

Self-SyncFIR

PHY

Error Pattern provided by FEC Decoder10001001 00000000 00000000 00000000 00000000 00000000 1101010 00101101 …

At this point trim-off precursor.g(D) is error-flushed with probability = 1

Trim InputTo Start atZero State

1/g(D)IIR

Jam Error Pattern State=0

1101010 00101101 …TrimmedE(D)

July 2002

Mark Webster, Intersil

Slide 25

doc.: IEEE 802.11-02/429r0

Submission

Trim Error Pattern and Jam IIR State to Zero

• 8 octets in error maximum at FEC input, so 48 – 8 = 40 octets in MAC header are not in error

• Min-Max separation between FEC-input error octets is 48/8 = 6 octets. Therefore, >= 5 sequential octets are not in error in any given MAC header.

• Therefore, FEC-input error pattern always has a straight of 5*8 = 40 bit-zeros or longer

• At the end of 40 bits of zeros at FEC input, the self-sync FIR has been flushed (state=0) with essentially probability = 1– Jam IIR to same state (state=0) and start injecting error pattern into

IIR filter at this point• Only a PHY-output bit-error pattern which matches the

scrambling sequence can spoof this. But, if this occurs the bit-error-rate is nearly 50%, and the octet error rate is 100%. The spoof can only occur on frames impossible to FEC decode. Spoof rate rate << 2-40

July 2002

Mark Webster, Intersil

Slide 26

doc.: IEEE 802.11-02/429r0

Submission

Example Where g(D) Flush Event is Spoofed (<< 2-40

event)

(Matches scrambling pattern)PHY Output Thermal Bit-Error-Pattern00001110 11110010 11001001 00000010 00100110 00101110 10110110 00001100 11010100 11100111 10110100 00101010 11111010 01010001 10111000 1111111

g(D)

Self-SyncFIR

PHY

(Provided by FEC Decoder)FEC-Input Bit-Error-Pattern 00001110 11110000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 0000000

FECDecode

But, G(d) is never flushedOf errors

It appears g(D) FIR Is flushed of errors

Thermal bit-error-rate is 50%Thermal octet-error-rate is 100%

g(D)E(D)E(D)

July 2002

Mark Webster, Intersil

Slide 27

doc.: IEEE 802.11-02/429r0

Submission

Conclusion• This submission has described a

technique for restoring the full performance of the 802.11e FEC in the face of 802.11a scrambler mismatch

• No additional overhead is used• The technique is simple to

implement