document carrier symphony-board initial 1.1 1.1 released ... · block diagram var-som-mx8m-nano...
TRANSCRIPT
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PAGE NO. SCHEMATIC PAGE
CONTENT
Symphony-Board
Revision History
SchematicS are for reference only.Variscite LTD provides no warranty for the use ofthese schematics.Schematics are subject to change without notice.
Disclaimer:
Initial1.0
Document Carrier
1.01.1 1.1 Released
7
6
3 SOM
4
1
8
5
2
Cover
9
10
11
12
Headers
Camera, HDMI, DP
Debug UART, LEDs, SWs
LVDS, DSI, Touch
USB2 Host
Power, Reset, Boot, RTC, EEPROM
USB3, uSATA
PCIe
Ethernet
uSD, Audio,CAN
Block Diagram
VAR-SOM-MXxx Connector
13
14
1.11.2 Updated Block Diagrams
Updated Compatability value for SOM pins 68,69,176
Added SH1 wire short symbol
Updated SOM pin 22 net name
Fixed U22.B1, C113.1 net name
Fixed R1-R2,R35-R38 net name
1.3 1.2 Removed SH1 wire short, J1.68 routed to capacitive touch
Changed R29 to C185
Changed R123,R127 to N.C.
Added resistors R130-132
Removed ADC_INxx alternate function from VAR-SOM-MX8 Symbol
Updated PCIe resistor assembly note
1.21.4 Updated Parallel Camera/HDMI/DP Note
Fixed ETH pin names VAR-SOM-MX8X Symbol
1.5 1.2A Disconnected R129
Added VAR-SOM-MX8M-MINI Block Diagram and Symbol1.6 1.2APRE-RELEASE VERSION !!!!! Subject to change without notice
Changed U29,U30,U31 to P/N: FPF2193
Changed R60 to 47K
Fixed VAR-SOM-MX8M-MINI Symbol1.7 1.2B
1.8 1.2C Update VAR-SOM-MX8M-MINI Symbol to V1.1 with side notes for v1.0B(Early access customers)
POR circuitry fed by VCC_SOM: see U7 R60 R61 R40 R60D5 Removed
Update VAR-SOM-MX8M-MINI Block Diagram
1.9 1.2D
* Added x2 studs for heat plate support* Base_per_3v3 added slew rate limit* U7 (Base POR circuit) added CB_WDOG resistor assmbly options* U29 U30 U31 - Added assembly note* VAR-SOM-MX8M-NANO pages added with symbol pinout* VAR-SOM-MX6 Connector update - added NC on /*/ assembly options* Power switch in OFF position discharge of Custom rails added * Ethernet magnetics - support two Manf: Pulse & UDE; Base RJ45 LEDs matched to SOM behaviour;
Raise VCC_3V3 to Nominal 3.39V for VAR-SOM-MX8M-MINI/NANO power up threshold voltage requirement of >3.35V
1.10 1.2E
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
01. Cover
A3
1 14Tuesday, March 03, 2020Aviad H.
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
01. Cover
A3
1 14Tuesday, March 03, 2020Aviad H.
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
01. Cover
A3
1 14Tuesday, March 03, 2020Aviad H.
Symphony-Board
VPC1
PCB
VPC0342
5
5
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3
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2
1
1
D D
C C
B B
A A
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02. Block Diagram VAR-SOM-MX8M-NANO
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
02. Block Diagram VAR-SOM-MX8M-MINI
A3
2 14Tuesday, March 03, 2020Aviad H.
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
02. Block Diagram VAR-SOM-MX8M-MINI
A3
2 14Tuesday, March 03, 2020Aviad H.
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
02. Block Diagram VAR-SOM-MX8M-MINI
A3
2 14Tuesday, March 03, 2020Aviad H.
Symphony-Board
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03.SOM
Optional remove for TAMPER interfacing
Optional remove for connecting 1588
Assemble to support VAR-SOM-6UL BOOT
Optional remove for conneting LICELL
[/*/TAMPER/*/SNVS.TAMPER_IN0/SNVS.TAMPER_IN0]
In case using MX8X SOMs assembledwithout Touch screen controller,Optional Remove to prevent stubs on High speed lines
[/*/ENET_1588_EVENT2_OUT/*/CONN.ENET1.PPS/]
Optional remove for connecting 1588
[LICELL/*/LICELL/LICELL]
[///*/EMMC_BOOT]
[/*/ENET_1588_EVENT0_IN/*/CONN.ENET0.PPS/]
OFF Page connector index:1. Function# :Interface common to ALL SOMs2. J1.xxx-Function :Interface common to certains SOMs or Used for carrier board common function3. J1.xxx :No common interface
For cross probing between SOM symbol and the specific SOM Connector used,set the "Implementation" property value in SOM port symbolto one of the following:
1. VAR-SOM-MX62. VAR-SOM-MX83. VAR-SOM-MX8X4. VAR-SOM-MX8M-MINI5. VAR-SOM-MX8M-NANO
Compatability listDescribes the ALT per SOM for compatibility. Order of names: (MX6/MX8/MX8X/MX8MM)
CustomBoard ALTDescribes ALT which can be demonstrated on CustomBoard. '/*/' - denotes special SOM assembly optionOrder of names: [MX6/MX8/MX8X/MX8MM]
SOM MOUNTING STANDOFF
MECHANICSHEATPLATE SUPPORT STANDOFF
Fiducial
VCC_SOM
J.31_33_35_PWR
GND
SOM_3V3
GNDVCC_SOM
GND
GND
GNDGND
VCC_SOM
GND
GNDGND
GND
ETH#A_MDI_A_PETH#A_MDI_A_M
ETH#A_MDI_D_P ETH#A_MDI_B_PETH#A_MDI_D_M ETH#A_MDI_B_M
ETH#A_LED_LINK_10_100_1000 ETH#A_LED_ACT
AC#_DMIC_CLK PWM#AAC#_DMIC_DATA
SAI#A_RXC_USDHC#A_RESET_B SAI#A_RXD
SAI#A_TXFS SAI#A_RXFS_PCIE#A_RESET_B
SAI#A_TXD SAI#A_TXC
J1.30-ENET_MDIO EXP_INT
J1.38_POWERJ1.40-MIPI_CAM_RST SPI#A_CS0
BOOT#_SEL SPI#A_SDI
FLEXCAN#A_TX SPI#A_SCKFLEXCAN#A_RX SPI#A_SDO
J1.48
UART#BT_RTS_BUART#BT_TX UART#BT_CTS_B
J1.54-ENET1_RGMII_RXD3 UART#BT_RXJ1.56-ENET1_RGMII_TXD2 J1.55-ENET1_RGMII_TXD3
J1.57-ENET1_RGMII_RXCUSDHC#A_CLK
USDHC#A_DAT0 USDHC#A_DAT2USDHC#A_CMD USDHC#A_DAT1
USDHC#A_DAT3PWM#B_CPT_INT
J1.70-MIPI_CAM_SYNC PWM#CJ1.72-USB3_INTB J1.71-ENET1_RGMII_RXD2J1.74-ENET_MDC J1.73-ENET1_RGMII_TXD0
J1.75-MIPI_CAM_TRIGGERJ1.77-MIPI_CSI_PWDN
USDHC#A_CD_B J1.79
J1.82-USB#A_HOST_PWR J1.81-ENET1_RGMII_RXD1J1.84 UART#_DEBUG_RX
J1.86-MIPI_CAM_BUF_CTL UART#_DEBUG_TXI2C#A_SCL I2C#A_SDAI2C#C_SDAI2C#C_SCL J1.91-SATA_RXN-USB3_SS3_RX_N
USB#B_OTG_ID J1.93-SATA_RXP-USB3_SS3_RX_PJ1.96-ENET1_RGMII_TXC
POR_B#_3V3 J1.97-SATA_TXP-USB3_SS3_TX_PPCIE#A_REFCLK100M_N J1.99-SATA_TXN-USB3_SS3_TX_NPCIE#A_REFCLK100M_P
USB#A_HOST_VBUSUSB#B_OTG_VBUS
USB#A_HOST_DNUSB#A_HOST_DP
USB#B_OTG_DN J1.113-ENET1_RGMII_TX_CTLUSB#B_OTG_DP UART#B_RX
J1.117-MIPI_CAM_OPTJ1.120-ENET1_RGMII_RX_CTL MIPI_CSI#A_DATA0_P
J1.122-ENET1_RGMII_RXD0 MIPI_CSI#A_DATA0_NUART#A_TX MIPI_CSI#A_DATA1_N
MIPI_CSI#A_DATA1_PPCIE#A_TX0_N MIPI_CSI#A_DATA2_P
PCIE#A_TX0_P MIPI_CSI#A_DATA2_NMIPI_CSI#A_DATA3_N
PCIE#A_RX0_P MIPI_CSI#A_DATA3_PPCIE#A_RX0_N MIPI_CSI#A_CLK_P
MIPI_CSI#A_CLK_NJ1.140-DSI_CLK0PJ1.142-DSI_CLK0M J1.141-DSI_D0M
J1.143-DSI_D0PJ1.146-HDMI_D1P J1.145-DSI_D1MJ1.148-HDMI_D1M J1.147-DSI_D1P
J1.150-HDMI_CLKMJ1.152-HDMI_CLKP J1.151-HDMI_D2PJ1.154-HDMI_HPD J1.153-HDMI_D2M
J1.155-HDMI_D0PJ1.157-HDMI_D0M
LVDS#A_TX1_N
J1.156-HDMI_DDCCEC
LVDS#A_TX1_P LVDS#A_TX0_NLVDS#A_TX2_N LVDS#A_TX0_PLVDS#A_TX2_P LVDS#A_TX3_N
LVDS#A_CLK_N LVDS#A_TX3_PLVDS#A_CLK_P
UART#B_TXI2C#B_SCL J1.173I2C#B_SDA UART#A_RX
J1.177-ENET1_RGMII_TXD1LVDS#B_CLK_NLVDS#B_CLK_P LVDS#B_TX3_PLVDS#B_TX0_N LVDS#B_TX3_NLVDS#B_TX0_PLVDS#B_TX1_N TP#_TS_X- TP#_TS_X-_CONNLVDS#B_TX1_P TP#_TS_X+ TP#_TS_X+_CONNLVDS#B_TX2_N TP#_TS_Y+ TP#_TS_Y+_CONNLVDS#B_TX2_P TP#_TS_Y- TP#_TS_Y-_CONNAC#_HPOUTFB AC#_AGND
AC#_HPLOUT AC#_LINEIN_LPAC#_HPROUT AC#_LINEIN_RP
ETH#A_MDI_C_PETH#A_MDI_C_M
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
03. SOM
A2
3 14Tuesday, March 03, 2020Aviad H.
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
03. SOM
A2
3 14Tuesday, March 03, 2020Aviad H.
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
03. SOM
A2
3 14Tuesday, March 03, 2020Aviad H.
Symphony-Board
R55
0R
HOLE4NC
EA
RT
H1
FD2NC
C2147uF
12
���� MS2
TH-1.6-2.5-M2
���� MS6
TH-1.6-2.5-M2
Variscite_PN = VCN0262
���� MS3
TH-1.6-2.5-M2
HOLE3NC
EA
RT
H1
FD1NC
R39 0R
R8 0R
���� MS1
TH-1.6-2.5-M2
R13 0R
R570R
HOLE2NC
EA
RT
H1
FD4NC
���� MS5
TH-1.6-2.5-M2
R10 0R
HOLE1NC
EA
RT
H1
FD3NC
C2647uF
12
R54
10K
������ MS4
TH-1.6-2.5-M2
R18
0R
SOMImplementation = VAR-SOM-MX8M-NANO
GNDETH#A_MDI_C_PETH#A_MDI_C_MGNDETH#A_MDI_D_PETH#A_MDI_D_MGNDETH#A_LED_LINK_10_100_1000AC#_DMIC_CLKAC#_DMIC_DATASAI#A_RXC_USDHC#A_RESET_BSAI#A_TXFSSAI#A_TXDGNDJ1.30-ENET_MDIOVCC_SOMVCC_SOMJ1.36J1.38_POWERJ1.40-MIPI_CAM_RST
BOOT#_SELFLEXCAN#A_TXFLEXCAN#A_RXJ1.48UART#BT_RTS_BUART#BT_TXJ1.54-ENET1_RGMII_RXD3J1.56-ENET1_RGMII_TXD2J1.58USDHC#A_CLKUSDHC#A_DAT0USDHC#A_CMDGNDPWM#B_CPT_INTJ1.70-MIPI_CAM_SYNCJ1.72-USB3_INTBJ1.74-ENET_MDCGNDGNDUSDHC#A_CD_BJ1.82-USB#A_HOST_PWRJ1.84J1.86-MIPI_CAM_BUF_CTLI2C#A_SCLI2C#C_SDAI2C#C_SCLUSB#B_OTG_IDJ1.96-ENET1_RGMII_TXCPOR_B#_3V3PCIE#A_REFCLK100M_NPCIE#A_REFCLK100M_PUSB#A_HOST_VBUSUSB#B_OTG_VBUSUSB#A_HOST_DNUSB#A_HOST_DPGNDUSB#B_OTG_DNUSB#B_OTG_DPGNDJ1.120-ENET1_RGMII_RX_CTLJ1.122-ENET1_RGMII_RXD0UART#A_TXGNDPCIE#A_TX0_NPCIE#A_TX0_PGNDPCIE#A_RX0_PPCIE#A_RX0_NGNDJ1.140-DSI_CLK0PJ1.142-DSI_CLK0MGNDJ1.146-HDMI_D1PJ1.148-HDMI_D1MJ1.150-HDMI_CLKMJ1.152-HDMI_CLKPJ1.154-HDMI_HPDJ1.156GNDLVDS#A_TX1_NLVDS#A_TX1_PLVDS#A_TX2_NLVDS#A_TX2_PLVDS#A_CLK_NLVDS#A_CLK_PGNDI2C#B_SCLI2C#B_SDAGNDLVDS#B_CLK_NLVDS#B_CLK_PLVDS#B_TX0_NLVDS#B_TX0_PLVDS#B_TX1_NLVDS#B_TX1_PLVDS#B_TX2_NLVDS#B_TX2_PAC#_HPOUTFBAC#_HPLOUTAC#_HPROUT
J1.1ETH#A_MDI_A_P
GNDETH#A_MDI_A_M
ETH#A_LED_ACT
ETH#A_MDI_B_METH#A_MDI_B_P
GND
EXP_INT
SAI#A_RXFS_PCIE#A_RESET_BSAI#A_TXC
GND
GND
PWM#A
J.31_33_35_PWR
SAI#A_RXD
SPI#A_SDO
UART#BT_CTS_B
SPI#A_CS0
UART#BT_RX
SPI#A_SDI
J1.57-ENET1_RGMII_RXC
J.31_33_35_PWR
USDHC#A_DAT1
SPI#A_SCK
J1.55-ENET1_RGMII_TXD3
J.31_33_35_PWR
SOM_3V3GND
USDHC#A_DAT2GND
GND
MIPI_CSI#A_DATA0_P
VCC_SOM
J1.77-MIPI_CSI_PWDN
MIPI_CSI#A_DATA1_P
VCC_SOM
UART#_DEBUG_RX
J1.71-ENET1_RGMII_RXD2
VCC_SOM
UART#_DEBUG_TX
J1.73-ENET1_RGMII_TXD0
VCC_SOM
J1.117-MIPI_CAM_OPT
GND
GND
MIPI_CSI#A_DATA2_P
GND
J1.75-MIPI_CAM_TRIGGER
J1.113-ENET1_RGMII_TX_CTL
VCC_SOM
I2C#A_SDA
USDHC#A_DAT3
GNDJ1.99-SATA_TXN-USB3_SS3_TX_N
J1.81-ENET1_RGMII_RXD1J1.79
J1.97-SATA_TXP-USB3_SS3_TX_P
UART#B_RX
J1.93-SATA_RXP-USB3_SS3_RX_P
MIPI_CSI#A_DATA1_NMIPI_CSI#A_DATA0_N
J1.91-SATA_RXN-USB3_SS3_RX_N
PWM#C
LVDS#B_TX3_N
J1.173
J1.141-DSI_D0M
AC#_LINEIN_RP
TP#_TS_X+
GND
J1.147-DSI_D1P
MIPI_CSI#A_CLK_P
UART#B_TX
GND
MIPI_CSI#A_CLK_N
UART#A_RX
LVDS#B_TX3_P
J1.153-HDMI_D2M
MIPI_CSI#A_DATA3_N
TP#_TS_Y+
AC#_LINEIN_LP
GND
GND
AC#_AGND
J1.177-ENET1_RGMII_TXD1
LVDS#A_TX3_P
J1.151-HDMI_D2P
MIPI_CSI#A_DATA2_N
LVDS#A_TX3_NLVDS#A_TX0_P
J1.145-DSI_D1MJ1.143-DSI_D0P
LVDS#A_TX0_N
GND
J1.157-HDMI_D0M
TP#_TS_X-GND
J1.155-HDMI_D0P
TP#_TS_Y-
MIPI_CSI#A_DATA3_P
R12 0R
(MDI_C+/ETH0_MDI_C_P/ETH0_MDI_C_P/ETH_TRX2_P) (MDI_A+/ETH0_MDI_A_P/ETH0_MDI_A_P/ETH_TRX0_P)(MDI_C-/ETH0_MDI_C_M/ETH0_MDI_C_M/ETH_TRX2_N) (MDI_A-/ETH0_MDI_A_M/ETH0_MDI_A_M/ETH_TRX0_N)
(MDI_D+/ETH0_MDI_D_P/ETH0_MDI_D_P/ETH_TRX3_P) (MDI_B+/ETH0_MDI_B_P/ETH0_MDI_B_P/ETH_TRX1_P)(MDI_D-/ETH0_MDI_D_M/ETH0_MDI_D_M/ETH_TRX3_N) (MDI_B-/ETH0_MDI_B_M/ETH0_MDI_B_M)/ETH_TRX1_N)
(PME_N_LED1/ETH0_LED_LINK_10_100_1000/ETH0_LED_LINK_10_100_1000/LED_LINK10_100_1000) (GETH_LED2/ETH0_LED_ACT/ETH0_LED_ACT/LED_ACT)(DMIC_CLK/DMIC_CLK/DMIC_CLK/DMIC_CLK) (PWM2_OUT/LVDS0.PWM0.OUT/MIPI_DSI0.PWM0.OUT/PWM1_OUT)(DMIC_DATA/DMIC_DATA/DMIC_DATA/DMIC_DATA)(AUD4_RXC/AUD.SAI1.RXC/ADMA.SAI0.RXC/SAI2_RXC) (AUD4_RXD/AUD.SAI1.RXD/ADMA.SAI0.RXD/SAI2_RXD0)(AUD4_TXFS/AUD.SAI1.TXFS/ADMA.SAI0.TXFS/SAI2_TXFS) (AUD4_RXFS/AUD.SAI1.RXFS/ADMA.SAI0.RXFS/SAI2_RXFS)(AUD4_TXD/AUD.SAI1.TXD/ADMA.SAI0.TXD/SAI2_TXD0) (AUD4_TXC/AUD.SAI0.TXC/ADMA.SAI0.TXC/SAI2_TXC)
(/CONN.ENET0.MDIO/CONN.ENET0.MDIO/ENET_MDIO)
(GPIO3_IO05/LSIO.GPIO3.IO06/LSIO.GPIO0.IO12/GPIO1_IO13) (ECSPI1_SS0/DMA.SPI1.CS0/ADMA.SPI2.CS0/ECSPI1_SS0)
(ECSPI1_MISO/DMA.SPI1.SDI/ADMA.SPI2.SDI/ECSPI1_MISO)(FLEXCAN1_TX/FLEXCAN0_TX/ADMA.FLEXCAN2.TX/CAN_TX) (ECSPI1_SCLK/DMA.SPI1.SCK/ADMA.SPI2.SCK/ECSPI1_SCLK)(FLEXCAN1_RX/DMA.FLEXCAN0.RX/ADMA.FLEXCAN2.RX/CAN_RX) (ECSPI1_MOSI/DMA.SPI1.SDO/ADMA.SPI2.SDO/ECSPI1_MOSI)
(UART2_CTS_B/DMA.UART1.RTS_B/ADMA.UART0.RTS_B/UART2_CTS_B)(UART2_TX_DATA/DMA.UART1.TX/ADMA.UART0.TX/UART2_TXD)
(UART2_RTS_B/DMA.UART1.CTS_B/ADMA.UART0.CTS_B/UART2_RTS_B)
(/CONN.ENET1.RGMII_RXD3/CONN.ENET1.RGMII_RXD3/)(UART2_RX_DATA/DMA.UART1.RX/ADMA.UART0.RX/UART2_RXD)
(/CONN.ENET1.RGMII_TXD2/CONN.ENET1.RGMII_TXD2/)(/CONN.ENET1.RGMII_TXD3/CONN.ENET1.RGMII_TXD3/)(/CONN.ENET1.RGMII_RXC/CONN.ENET1.RGMII_RXC/)
(SD2_CLK/CONN.USDHC1.CLK/CONN.USDHC1.CLK/SD2_CLK)(SD2_DATA0/CONN.USDHC1.DATA0/CONN.USDHC1.DATA0/SD2_DATA0) (SD2_DATA2/CONN.USDHC1.DATA2/CONN.USDHC1.DATA2/SD2_DATA2)(SD2_CMD/CONN.USDHC1.CMD/CONN.USDHC1.CMD/SD2_CMD) (SD2_DATA1/CONN.USDHC1.DATA1/CONN.USDHC1.DATA1/SD2_DATA1)
(SD2_DATA3/CONN.USDHC1.DATA3/CONN.USDHC1.DATA3/SD2_DATA3)(PWM1_OUT/LSIO.PWM2.OUT/LSIO.PWM3.OUT/PWM2_OUT)(GPIO2_IO14/LSIO.GPIO3.IO03/LSIO.GPIO3.IO01/GPIO5_IO11) (PWM3_OUT/LSIO.PWM3.OUT/LSIO.PWM2.OUT/PWM3_OUT)(GPIO1_IO01/LSIO.GPIO3.IO11/LSIO.GPIO5.IO09/) (/CONN.ENET1.RGMII_RXD2/CONN.ENET1.RGMII_RXD2/)(/CONN.ENET0.MDC/CONN.ENET0.MDC/ENET_MDC) (/CONN.ENET1.RGMII_TXD0/CONN.ENET1.RGMII_TXD0/)
(GPIO3_IO21/LSIO.GPIO3.IO02/LSIO.GPIO0.IO28/GPIO5_IO10)(GPIO3_IO22/LSIO.GPIO3.IO04/LSIO.GPIO0.IO26/GPIO5_IO12)
(GPIO4_IO14/LSIO.GPIO0.IO14/LSIO.GPIO4.IO22/GPIO2_IO012)(GPIO4_IO15/LSIO.GPIO0.IO18/LSIO.GPIO4.IO21/GPIO5_IO01) (/CONN.ENET1.RGMII_RXD1/CONN.ENET1.RGMII_RXD1/)(GPIO4_IO15/LSIO.GPIO0.IO18/LSIO.GPIO4.IO21/GPIO4_IO03) (UART1_RX_DATA/DMA.UART0.RX/ADMA.UART3.RX/UART4_RXD)(GPIO3_IO19/LSIO.GPIO0.IO22/LSIO.GPIO3.IO24/GPIO4_IO05) (UART1_TX_DATA/DMA.UART0.TX/ADMA.UART3.TX/UART4_TXD)(I2C1_SCL/DMA.I2C1.SCL/ADMA.I2C1.SCL/I2C2_SCL) (I2C1_SDA/DMA.I2C1.SDA/ADMA.I2C1.SDA/I2C2_SDA)(I2C3_SDA/DMA.I2C4.SDA/ADMA.I2C2.SDA/I2C3_SDA)(I2C3_SCL/DMA.I2C4.SCL/ADMA.I2C2.SCL/I2C3_SCL) (SATA_RXN/CONN.USB_SS3.RX_M_LN_0/CONN.USB_SS3.RX_M_LN_0/)(GPIO1_IO04/CONN.USB_OTG2.ID/CONN.USB_OTG2.ID/USB1_OTG_ID) (SATA_RXP/CONN.USB_SS3.RX_P_LN_0/CONN.USB_SS3.RX_P_LN_0/)(/CONN.ENET1.RGMII_TXC/CONN.ENET1.RGMII_TXC/)(POR_B/POR_B_3V3/POR_B_3V3/POR_B) (SATA_TXP/CONN.USB_SS3.TX_P_LN_0/CONN.USB_SS3.TX_P_LN_0/)(CLK1_N/HSIO.PCIE_IOB.EXT_REFCLK100M_N/HSIO.PCIE_IOB.EXT_REFCLK100M_N/PCIE1_REF_CLK_N) (SATA_TXN/CONN.USB_SS3.TX_M_LN_0/CONN.USB_SS3.TX_M_LN_0/)(CLK1_P/HSIO.PCIE_IOB.EXT_REFCLK100M_P/HSIO.PCIE_IOB.EXT_REFCLK100M_P/PCIE1_REF_CLK_P)(USB_H1_VBUS/CONN.USB_OTG1.VBUS/CONN.USB_OTG1.VBUS/USB2_VBUS)(USB_OTG_VBUS/CONN.USB_OTG2.VBUS/CONN.USB_OTG2.VBUS/USB1_VBUS)(USB_HOST_DN/CONN.USB_OTG1.DN/CONN.USB_OTG1.DN/USB2_D_N)(USB_HOST_DP/CONN.USB_OTG1.DP/CONN.USB_OTG1.DP/USB2_D_P)
(USB_OTG_DN/CONN.USB_OTG2.DM/CONN.USB_OTG2.DM/USB1_D_N) (/CONN.ENET1.RGMII_TX_CTL/CONN.ENET1.RGMII_TX_CTL/)(USB_OTG_DP/CONN.USB_OTG2.DP/CONN.USB_OTG2.DP/USB1_D_P) (UART5_RX_DATA/DMA.UART4.RX/ADMA.UART2.RX/UART2_RXD)
(GPIO6_IO03/LSIO.GPIO4.IO00/LSIO.GPIO3.IO23/GPIO1_IO08)(/CONN.ENET1.RGMII_RX_CTL/CONN.ENET1.RGMII_RX_CTL/) (CSI_D0P/MIPI_CSI0.DP0/MIPI_CSI0.DP0/CSI_P1_D0_P)(/CONN.ENET1.RGMII_RXD0/CONN.ENET1.RGMII_RXD0/) (CSI_D0M/MIPI_CSI0.DN0/MIPI_CSI0.DN0/CSI_P1_D0_N)(UART4_TX_DATA/DMA.UART2.TX/ADMA.UART1.TX/UART3_TXD) (CSI_D1M/MIPI_CSI0.DN1/MIPI_CSI0.DN1/CSI_P1_D1_N)
(CSI_D1P/MIPI_CSI0.DP1/MIPI_CSI0.DP1/CSI_P1_D1_P)(PCIE_TXM/HSIO.PCIE0.TX0_N/HSIO.PCIE0.TX0_N/PCIE1_TX_N) (CSI_D2P/MIPI_CSI0.DP2/MIPI_CSI0.DP2/CSI_P1_D2_P)(PCIE_TXP/HSIO.PCIE0.TX0_P/HSIO.PCIE0.TX0_P/PCIE1_TX_P) (CSI_D2M/MIPI_CSI0.DN2/MIPI_CSI0.DN2/CSI_P1_D2_N)
(CSI_D3M/MIPI_CSI0.DN3/MIPI_CSI0.DN3/CSI_P1_D3_N)(PCIE_RXP/HSIO.PCIE0.RX0_P/HSIO.PCIE0.RX0_P/PCIE1_RX_P) (CSI_D3P/MIPI_CSI0.DP3/MIPI_CSI0.DP3/CSI_P1_D3_P)(PCIE_RXM/HSIO.PCIE0.RX0_N/HSIO.PCIE0.RX0_N/PCIE1_RX_N) (CSI_CLK0P/MIPI_CSI0.CKP/MIPI_CSI0.CKP/CSI_P1_CK_N)
(CSI_CLK0M/MIPI_CSI0.CKN/MIPI_CSI0.CKN/CSI_P1_CK_P)(DSI_CLK0P/MIPI_DSI0.CKP//)(DSI_CLK0M/MIPI_DSI0.CKN//) (DSI_D0M/MIPI_DSI0.DN0//)
(DSI_D0P/MIPI_DSI0.DP0//)(HDMI_D1P/HDMI_TX0_DATA1_EDP1_P//) (DSI_D1M/MIPI_DSI0.DN1//)(HDMI_D1M/HDMI_TX0_DATA1_EDP1_N//) (DSI_D1P/MIPI_DSI0.DP1//)(HDMI_CLKM/HDMI_TX0_CLK_EDP3_N//)(HDMI_CLKP/HDMI_TX0_CLK_EDP3_P//) (HDMI_D2P/HDMI_TX0_DATA2_EDP0_P//)(HDMI_HPD/HDMI_TX0_HPD//) (HDMI_D2M/HDMI_TX0_DATA2_EDP0_N//)
(HDMI_D0P/HDMI_TX0_DATA0_EDP2_P//)(HDMI_D0M/HDMI_TX0_DATA0_EDP2_N//)
(LVDS0_TX1_N/LVDS0.T0BN/MIPI_DSI0.DN1/LVDS0_CH0_TX1_N)
��(HDMI_DDCCEC/HDMI_TX0_CEC/)
(LVDS0_TX1_P/LVDS0.T0BP/MIPI_DSI0.DP1/LVDS0_CH0_TX1_P) (LVDS0_TX0_N/LVDS0.T0AN/MIPI_DSI0.DN0/LVDS0_CH0_TX0_N)(LVDS0_TX2_N/LVDS0.T0CN/MIPI_DSI0.DN2/LVDS0_CH0_TX2_N) (LVDS0_TX0_P/LVDS0.T0AP/MIPI_DSI0.DP0/LVDS0_CH0_TX0_P)(LVDS0_TX2_P/LVDS0.T0CP/MIPI_DSI0.DP2/LVDS0_CH0_TX2_P) (LVDS0_TX3_N/LVDS0.T0DN/MIPI_DSI0.DN3/LVDS0_CH0_TX3_N)(LVDS0_CLK_N/LVDS0.T0CLKN/MIPI_DSI0.CKN/LVDS0_CH0_CLK_N) (LVDS0_TX3_P/LVDS0.T0DP/MIPI_DSI0.DP3/LVDS0_CH0_TX3_P)(LVDS0_CLK_P/LVDS0.T0CLKP/MIPI_DSI0.CKP/LVDS0_CH0_CLK_P)
(UART5_TX_DATA/DMA.UART4.TX/ADMA.UART2.TX/UART2_TXD)(I2C2_SCL/DMA.I2C0.SCL or HDMI_TX0.DDC_SCL/ADMA.I2C3.SCL/I2C4_SCL)(I2C2_SDA/DMA.I2C0.SDA or HDMI_TX0.DDC_SDA/ADMA.I2C3.SDA/I2C4_SDA) (UART4_RX_DATA/DMA.UART2.RX/ADMA.UART1.RX/UART3_RXD)
(/CONN.ENET1.RGMII_TXD1/CONN.ENET1.RGMII_TXD1/)(LVDS1_CLK_N/LVDS0.T1CLKN/MIPI_DSI1.CKN/LVDS0_CH1_CLK_N)(LVDS1_CLK_P/LVDS0.T1CLKP/MIPI_DSI1.CKP/LVDS0_CH1_CLK_P) (LVDS1_TX3_P/LVDS0.T1DP/MIPI_DSI1.DP3/LVDS0_CH1_TX3_P)(LVDS1_TX0_N/LVDS0.T1AN/MIPI_DSI1.DN0/LVDS0_CH1_TX0_N) (LVDS1_TX3_N/LVDS0.T1DN/MIPI_DSI1.DN3/LVDS0_CH1_TX3_N)(LVDS1_TX0_P/LVDS0.T1AP/MIPI_DSI1.DP0/LVDS0_CH1_TX0_P)(LVDS1_TX1_N/LVDS0.T1BN/MIPI_DSI1.DN1/LVDS0_CH1_TX1_N) (TS_X-/TS_X-/TS_X-/TS_X-) TP#_TS_X-
(LVDS1_TX1_P/LVDS0.T1BP/MIPI_DSI1.DP1/LVDS0_CH1_TX1_P) (TS_X+/TS_X+/TS_X+/TS_X+) TP#_TS_X+
(LVDS1_TX2_N/LVDS0.T1CN/MIPI_DSI1.DN2/LVDS0_CH1_TX2_N) (TS_Y+/TS_Y+/TS_Y+/TS_Y+) TP#_TS_Y+
(LVDS1_TX2_P/LVDS0.T1CP/MIPI_DSI1.DP2/LVDS0_CH1_TX2_P) (TS_Y-/TS_Y-/TS_Y-/TS_Y-) TP#_TS_Y-
(AGND/HPOUTFB/HPOUTFB/HPOUTFB) (AGND/AGND/AGND/AGND)(HPLOUT/HPLOUT/HPLOUT/HPLOUT) (LINEIN1_LP/LINEIN1_LP/LINEIN1_LP/LINEIN1_LP)(HPROUT/HPROUT/HPROUT/HPROUT) (LINEIN1_RP/LINEIN1_RP/LINEIN1_RP/LINEIN1_RP)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
04. VAR-SOM-MX8M-NANO Connector
PIN NAMING MNEMONICS:"/" - Prefix number of "/" denotes alternate function number; none is ALT0=PAD name"/*/" - Prefix denotes pin connected to a configurable module on SOM; E.g. with "EC" pin ENET_TD3/////GPIO1_IO18/*/ETH_TRX0_P source is Ethernet PHY"~" - Prefix points to an alternate function optionally used or shared on SOM; Verify with SOM datasheet before using this pin;
SOM usage: RES-TOUCH_CS_B
SOM usage: CAN-FD_CS
IO Voltage set on SOM 1.8V/3.3V
Shared on SOM with "AC"
Shared on SOM with "AC"
SOM usage: RES-TOUCH_INT_B
Pin 71, 80 IO levels running from NVCC_SD2 set on SOM;
EXP_ENET_SEL - Set to Header
SETUP NOTES FOR VAR-SOM-MX8M-MINI:
SOM usage: CAN_INT_B
GND J1.1ETH#A_MDI_C_P ETH#A_MDI_A_PETH#A_MDI_C_M ETH#A_MDI_A_M
GND GND
ETH#A_MDI_D_P ETH#A_MDI_B_PETH#A_MDI_D_M ETH#A_MDI_B_M
GND GND
ETH#A_LED_LINK_10_100_1000 ETH#A_LED_ACTAC#_DMIC_CLK PWM#A
AC#_DMIC_DATA GND
SAI#A_RXC_USDHC#A_RESET_B SAI#A_RXDSAI#A_TXFS SAI#A_RXFS_PCIE#A_RESET_BSAI#A_TXD SAI#A_TXC
GND GND
J1.30-ENET_MDIO EXP_INTVCC_SOM J.31_33_35_PWRVCC_SOM J.31_33_35_PWR
J1.36 J.31_33_35_PWRJ1.38_POWER GND
J1.40-MIPI_CAM_RST SPI#A_CS0
BOOT#_SEL SPI#A_SDIFLEXCAN#A_TX SPI#A_SCKFLEXCAN#A_RX SPI#A_SDO
J1.48 GND
UART#BT_RTS_B SOM_3V3UART#BT_TX UART#BT_CTS_B
J1.54-ENET1_RGMII_RXD3 UART#BT_RXJ1.56-ENET1_RGMII_TXD2 J1.55-ENET1_RGMII_TXD3
J1.57-ENET1_RGMII_RXCJ1.58USDHC#A_CLK GND
USDHC#A_DAT0 USDHC#A_DAT2USDHC#A_CMD USDHC#A_DAT1
GND USDHC#A_DAT3GND
J1.70-MIPI_CAM_SYNCJ1.72-USB3_INTB J1.71-ENET1_RGMII_RXD2J1.74-ENET_MDC J1.73-ENET1_RGMII_TXD0
GND J1.75-MIPI_CAM_TRIGGERGND J1.77-MIPI_CSI_PWDN
USDHC#A_CD_B J1.79J1.82-USB#A_HOST_PWR J1.81-ENET1_RGMII_RXD1
J1.84 UART#_DEBUG_RXJ1.86-MIPI_CAM_BUF_CTL UART#_DEBUG_TX
I2C#A_SCL I2C#A_SDAI2C#C_SDA GND
I2C#C_SCL J1.91-SATA_RXN-USB3_SS3_RX_NUSB#B_OTG_ID J1.93-SATA_RXP-USB3_SS3_RX_P
J1.96-ENET1_RGMII_TXC GND
J1.97-SATA_TXP-USB3_SS3_TX_PPCIE#A_REFCLK100M_N J1.99-SATA_TXN-USB3_SS3_TX_NPCIE#A_REFCLK100M_P GND
USB#A_HOST_VBUS VCC_SOMUSB#B_OTG_VBUS VCC_SOM
USB#A_HOST_DN VCC_SOMUSB#A_HOST_DP VCC_SOM
GND VCC_SOMUSB#B_OTG_DN J1.113-ENET1_RGMII_TX_CTLUSB#B_OTG_DP UART#B_RX
GND J1.117-MIPI_CAM_OPTJ1.120-ENET1_RGMII_RX_CTL MIPI_CSI#A_DATA0_P
J1.122-ENET1_RGMII_RXD0 MIPI_CSI#A_DATA0_NUART#A_TX MIPI_CSI#A_DATA1_N
GND MIPI_CSI#A_DATA1_PPCIE#A_TX0_N MIPI_CSI#A_DATA2_PPCIE#A_TX0_P MIPI_CSI#A_DATA2_N
GND MIPI_CSI#A_DATA3_NPCIE#A_RX0_P MIPI_CSI#A_DATA3_PPCIE#A_RX0_N MIPI_CSI#A_CLK_P
GND MIPI_CSI#A_CLK_NJ1.140-DSI_CLK0P GNDJ1.142-DSI_CLK0M J1.141-DSI_D0M
GND J1.143-DSI_D0PJ1.146-HDMI_D1P J1.145-DSI_D1MJ1.148-HDMI_D1M J1.147-DSI_D1PJ1.150-HDMI_CLKM GNDJ1.152-HDMI_CLKP J1.151-HDMI_D2PJ1.154-HDMI_HPD J1.153-HDMI_D2M
J1.155-HDMI_D0PJ1.156GND J1.157-HDMI_D0M
LVDS#A_TX1_N GNDLVDS#A_TX1_P LVDS#A_TX0_NLVDS#A_TX2_N LVDS#A_TX0_PLVDS#A_TX2_P LVDS#A_TX3_NLVDS#A_CLK_N LVDS#A_TX3_PLVDS#A_CLK_P GND
GND UART#B_TXI2C#B_SCL J1.173I2C#B_SDA UART#A_RX
GND J1.177-ENET1_RGMII_TXD1LVDS#B_CLK_N GNDLVDS#B_CLK_P LVDS#B_TX3_PLVDS#B_TX0_N LVDS#B_TX3_NLVDS#B_TX0_P GNDLVDS#B_TX1_N TP#_TS_X-LVDS#B_TX1_P TP#_TS_X+LVDS#B_TX2_N TP#_TS_Y+LVDS#B_TX2_P TP#_TS_Y-AC#_HPOUTFB AC#_AGNDAC#_HPLOUT AC#_LINEIN_LPAC#_HPROUT AC#_LINEIN_RP
POR_B#_3V3
PWM#B_CPT_INTPWM#C
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project1.2E_R1.10
04. VAR-SOM-MX8M-MINI Connector
A2
4 14Tuesday, February 25, 2020Aviad H.
Symphony-BoardSymphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project1.2E_R1.10
04. VAR-SOM-MX8M-MINI Connector
A2
4 14Tuesday, February 25, 2020Aviad H.
Symphony-BoardSymphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project1.2E_R1.10
04. VAR-SOM-MX8M-MINI Connector
A2
4 14Tuesday, February 25, 2020Aviad H.
Symphony-BoardSymphony-Board
Version V1.1VAR-SOM-MX8MN
J1
GND2
ENET_RD0//SAI7_RXD0///PDM_BIT1/////GPIO1_IO26//////SD3_D4/*/ETH_TRX2_P4
ENET_RD1//SAI7_RXFS///PDM_BIT0/////GPIO1_IO27//////SD3_RESET_B/*/ETH_TRX2_N6
GND8
ENET_RD2//SAI7_RXC///PDM_CLK/////GPIO1_IO28//////SD3_CLK/*/ETH_TRX3_P10
ENET_RD3//SAI7_MCLK///SPDIF_IN/////GPIO1_IO29//////SD3_CMD/*/ETH_TRX3_N12
GND14
ENET_RXC/ENET_RX_ER//SAI7_TXC///PDM_BIT2/////GPIO1_IO25//////SD3_D3/*/LED_LINK10_100_100016
SAI5_RXD3///SAI5_TXD0////PDM_BIT3/////GPIO3_IO24/*/DMIC_CLK18
SAI5_MCLK/////GPIO3_IO25/*/DMIC_DATA20
SAI2_RXC/SAI5_TXC////UART1_RXD/////GPIO4_IO22//////PDM_BIT122
SAI2_TXFS/SAI5_TXD1///SAI2_TXD1////UART1_CTS_B/////GPIO4_IO24//////PDM_BIT224
SAI2_TXD0/SAI5_TXD3/////GPIO4_IO2626
GND28
ENET_MDIO//SAI6_TXFS///PDM_BIT2////SPDIF_IN/////GPIO1_IO17//////SD3_D530
VCC_SOM32
VCC_SOM34
VCC_SOM36
VDD_ENET/*/NC38
GPIO1_IO13/USB1_OTG_OC/////PWM2_OUT40
BOOT_SEL42
NC/*/CAN_TX44
NC/*/CAN_RX46
GPIO1_IO02/~WDOG_B/////WDOG_ANY48
SAI3_RXC/GPT1_CLK//SAI5_RXC///SAI2_RXD1////~UART2_CTS_B/////GPIO4_IO29//////PDM_CLK50
SAI3_TXC/GPT1_COMPARE2//SAI5_RXD2///SAI2_TXD1////~UART2_TXD/////GPIO5_IO0//////PDM_BIT252
UART1_RXD/ECSPI3_SCLK/////GPIO5_IO2254
UART1_TXD/ECSPI3_MOSI/////GPIO5_IO2356
GND58
SD2_CLK/SAI5_RXFS//ECSPI2_SCLK///UART4_RXD////SAI5_MCLK/////GPIO2_IO1360
SD2_D0/SAI5_RXD0//I2C4_SDA///UART2_RXD////PDM_BIT0/////GPIO2_IO1562
SD2_CMD/SAI5_RXC//ECSPI2_MOSI///UART4_TXD////PDM_CLK/////GPIO2_IO1464
GND66
SPDIF_RX/PWM2_OUT/////GPIO5_IO468
ECSPI2_MOSI/UART4_TXD//I2C3_SDA///SAI5_RXD3////SAI5_TXD0/////GPIO5_IO1170
GPIO1_IO11/PWM2_OUT72
~ENET_MDC//SAI6_TXD0///PDM_BIT3////SPDIF_OUT/////GPIO1_IO16//////SD3_STROBE74
GND76
GND78
GPIO1_IO10/USB1_OTG_ID//PWM3_OUT80
SAI3_TXD/GPT1_COMPARE3//SAI5_RXD3////SPDIF_EXT_CLK/////GPIO5_IO182
NC84
NC86
I2C2_SCL/ENET_1588_EVENT1_IN//SD3_CD_B///ECSPI1_MISO/////GPIO5_IO1688
~I2C3_SDA/PWM3_OUT//GPT3_CLK///ECSPI2_MOSI/////GPIO5_IO1990
~I2C3_SCL/PWM4_OUT//GPT2_CLK///ECSPI2_SCLK/////GPIO5_IO1892
USB1_ID94
GPIO1_IO06/ENET_MDC/////SD1_CD_B//////EXT_CLK396
PMIC_PWRON_B98
NC100
NC102
NC104
USB1_VBUS106
NC108
NC110
GND112
USB1_D_N114
USB1_D_P116
GND118
SAI3_MCLK/PWM4_OUT//SAI5_MCLK////SPDIF_OUT/////GPIO5_IO2//////SPDIF_IN120
GPIO1_IO12/USB1_OTG_PWR122
UART3_TXD/UART1_RTS_B//SD3_VSELECT///GPT1_CLK/////GPIO5_IO27124
GND126
NC128
NC130
GND132
NC134
NC136
GND138
PMIC_STBY_REQ140
PMIC_ON_REQ142
GND144
NC146
NC148
~GPIO1_IO03/SD1_VSELECT/////SDMA1_EXT_EVENT0//////XTAL_OK150
NC152
GPIO1_IO01/PWM1_OUT/////REF_CLK_24M//////EXT_CLK2154
NC156
GND158
DSI_D1_N/*/LVDS0_CH0_TX1_N160
DSI_D1_P/*/LVDS0_CH0_TX1_P162
DSI_D2_N/*/LVDS0_CH0_TX2_N164
DSI_D2_P/*/LVDS0_CH0_TX2_P166
DSI_CLK_N/*/LVDS0_CH0_CLK_N168
DSI_CLK_P/*/LVDS0_CH0_CLK_P170
GND172
I2C4_SCL/PWM2_OUT///ECSPI2_MISO/////GPIO5_IO20174
I2C4_SDA/PWM1_OUT///ECSPI2_SS0/////GPIO5_IO21176
GND178
NC/*/LVDS0_CH1_CLK_N180
NC/*/LVDS0_CH1_CLK_P182
NC/*/LVDS0_CH1_TX0_N184
NC/*/LVDS0_CH1_TX0_P186
NC/*/LVDS0_CH1_TX1_N188
NC/*/LVDS0_CH1_TX1_P190
NC/*/LVDS0_CH1_TX2_N192
NC/*/LVDS0_CH1_TX2_P194
SAI5_RXFS/////GPIO3_IO19/*/HPOUTFB196
SAI5_RXD0////PDM_BIT0/////GPIO3_IO21/*/HPLOUT198
SAI5_RXD2///SAI5_TXC////PDM_BIT2/////GPIO3_IO23/*/HPROUT200
ENET_TX_CTL//SAI6_MCLK/////GPIO1_IO22//////SD3_D0/*/NC1
ENET_TD3//SAI6_TXC///PDM_BIT1////SPDIF_EXT_CLK/////GPIO1_IO18//////SD3_D6/*/ETH_TRX0_P3
ENET_TD2/ENET_TX_CLK_IN|ENET_REF_CLK_ROOT_OUT//SAI6_RXD0///PDM_BIT3/////GPIO1_IO19//////SD3_D7/*/ETH_TRX0_N5
GND7
ENET_TD1//SAI6_RXFS///PDM_BIT2/////GPIO1_IO20//////SD3_CD_B/*/ETH_TRX1_P9
ENET_TD0//SAI6_RXC///PDM_BIT1/////GPIO1_IO21//////SD3_WP/*/ETH_TRX1_N11
GND13
ENET_RX_CTL//SAI7_TXFS///PDM_BIT3/////GPIO1_IO24//////SD3_D2/*/LED_ACT15
SPDIF_EXT_CLK/PWM1_OUT/////GPIO5_IO517
GND19
SAI2_RXD0/SAI5_TXD0///SAI2_TXD1////UART1_RTS_B/////GPIO4_IO23//////PDM_BIT321
SAI2_RXFS/SAI5_TXFS//SAI5_TXD1///SAI2_RXD1////UART1_TXD/////GPIO4_IO21//////PDM_BIT223
SAI2_TXC/SAI5_TXD2/////GPIO4_IO25//////PDM_BIT125
GND27
GPIO1_IO07/ENET_MDIO/////SD1_WP//////EXT_CLK429
NC31
NC33
NC35
GND37
~ECSPI1_SS0/UART3_RTS_B//I2C2_SDA///SAI5_RXD1////SAI5_TXFS/////GPIO5_IO939
~ECSPI1_MISO/UART3_CTS_B//I2C2_SCL///SAI5_RXD0/////GPIO5_IO841
~ECSPI1_SCLK/UART3_RXD//I2C1_SCL///SAI5_RXFS/////GPIO5_IO643
~ECSPI1_MOSI/UART3_TXD//I2C1_SDA///SAI5_RXC/////GPIO5_IO745
GND47
SOM_3V3_PER49
SAI3_RXD/GPT1_COMPARE1//SAI5_RXD0///SAI3_TXD1////~UART2_RTS_B/////GPIO4_IO30//////PDM_BIT151
SAI3_TXFS/GPT1_CAPTURE2//SAI5_RXD1///SAI3_TXD1////~UART2_RXD/////GPIO4_IO31//////PDM_BIT353
_UART3_RXD/UART1_CTS_B//SD3_RESET_B///GPT1_CAPTURE2/////GPIO5_IO2655
_UART3_TXD/UART1_RTS_B//SD3_VSELECT///GPT1_CLK/////GPIO5_IO2757
GND59
SD2_D2/SAI5_TXC//ECSPI2_SS0///SPDIF_OUT////PDM_BIT2/////GPIO2_IO1761
SD2_D1/SAI5_TXFS//I2C4_SCL///UART2_TXD////PDM_BIT1/////GPIO2_IO1663
SD2_D3/SAI5_TXD0//ECSPI2_MISO///SPDIF_IN////PDM_BIT3/////GPIO2_IO1865
GND67
SPDIF_TX/PWM3_OUT/////GPIO5_IO369
SD2_RESET_B/////GPIO2_IO1971
SAI2_MCLK/SAI5_MCLK/////GPIO4_IO27//////SAI3_MCLK73
ECSPI2_SCLK/UART4_RXD//I2C3_SCL///SAI5_RXD2////SAI5_TXC/////GPIO5_IO1075
ECSPI2_MISO/UART4_CTS_B//I2C4_SCL///SAI5_MCLK/////GPIO5_IO1277
ECSPI2_SS0/UART4_RTS_B//I2C4_SDA/////GPIO5_IO1379
~GPIO1_IO00/ENET_PHY_REF_CLK_ROOT/////REF_CLK_32K//////EXT_CLK181
UART4_RXD/UART2_CTS_B///GPT1_COMPARE1/////GPIO5_IO2883
UART4_TXD/UART2_RTS_B///GPT1_CAPTURE1/////GPIO5_IO2985
I2C2_SDA/ENET_1588_EVENT1_OUT//SD3_WP///ECSPI1_SS0/////GPIO5_IO1787
GND89
GPIO1_IO15////SD3_WP/////PWM4_OUT//////CCM_CLKO291
NC93
GND95
ENET_TXC/ENET_TX_ER//SAI7_TXD0/////GPIO1_IO23//////SD3_D1/*/NC97
~GPIO1_IO14////SD3_CD_B/////PWM3_OUT//////CCM_CLKO199
GND101
VCC_SOM103
VCC_SOM105
VCC_SOM107
VCC_SOM109
VCC_SOM111
SAI3_RXFS/GPT1_CAPTURE1//SAI5_RXFS///SAI3_RXD1////SPDIF_IN/////GPIO4_IO28//////PDM_BIT0113
UART2_RXD/ECSPI3_MISO///GPT1_COMPARE3/////GPIO5_IO24115
GPIO1_IO08/ENET_1588_EVENT0_IN//PWM1_OUT/////SD2_RESET_B117
CSI_D0_P119
CSI_D0_N121
CSI_D1_N123
CSI_D1_P125
CSI_D2_P127
CSI_D2_N129
CSI_D3_N131
CSI_D3_P133
CSI_CLK_P135
CSI_CLK_N137
GND139
NC141
ONOFF143
NC145
NC147
GND149
NC151
~GPIO1_IO05/M4_NMI/////PMIC_READY//////INT_BOOT153
NC155
NC157
GND159
DSI_D0_N/*/LVDS0_CH0_TX0_N161
DSI_D0_P/*/LVDS0_CH0_TX0_P163
DSI_D3_N/*/LVDS0_CH0_TX3_N165
DSI_D3_P/*/LVDS0_CH0_TX3_P167
GND169
UART2_TXD/ECSPI3_SS0///GPT1_COMPARE2/////GPIO5_IO25171
NC173
UART3_RXD/UART1_CTS_B//SD3_RESET_B///GPT1_CAPTURE2/////GPIO5_IO26175
NC177
GND179
NC/*/LVDS0_CH1_TX3_P181
NC/*/LVDS0_CH1_TX3_N183
GND185
NC/*/TS_X-187
NC/*/TS_X+189
NC/*/TS_Y+191
NC/*/TS_Y-193
AGND195
SAI5_RXC////PDM_CLK/////GPIO3_IO20/*/LINEIN1_LP197
SAI5_RXD1///SAI5_TXFS////PDM_BIT1/////GPIO3_IO22/*/LINEIN1_RP199
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
05. Power,Reset,Boot,RTC,EEPROM
RESET CIRCUITRY
1.5V BASE
Supply to mPCIe
1.8V BASE
RTC BATTERY
BOARD ID
I2C ADD:0x68+R/Wn
SOM BOOTSTRP
Boot Options: OFF : MX8/MX8X-eMMC ; MX6-NANDON : SD
[//SCU_BOOT_MODE1]
12VDC INPUT
BASE_3V3
5V/8A FROM PWR JACK 3.39V/8A FROM PWR JACK
For supporting MX6 SOMs with eMMC boot option:Remove R9Place R56,R11
Switch deafults to OFF,Must be set to ON when connectingMX6 based SOMs
SOM PWR
[/*/EMMC_BOOT//]
Address 0x54,0x55
[/*/EMMC_BOOT//]
Will prevent back flow
Note for U29: Recommneded PN for new design FPF2193Assembled board can have FPF2194.
SLEW RATE ControlledUsing R72 C186 R133Slew ~800us
FAN PWR
SOM CURRENT MEASURING:----------------------REMOVE R58 AND CONNECT AMPERMETER
Located under J24Not Connected
Main Switch
Vgs th>2.4V
Vgs th>2.4V
+5V LED
+3.3V LED
Will Indicate VCC_3V3(VCC_SOM) & BASE_3V3 OK
PINs 31 33 35FAULT LED
+12V LED
RESETSWITCH
PINS 31 33 35 POWER
POWER DISCHARGE
Note:VAR-SOM-MX8M-MINI/NANO: VCC_SOM when rising must be > 3.35V for the SOM to power up.
GND GND
BASE_PER_1V8BASE_PER_3V3BASE_PER_1V5BASE_PER_3V3
GND GND
BASE_PER_3V3
BASE_PER_3V3
BASE_PER_3V3GND
GND
GND
GND
VCC_3V3SOM_3V3
VCC_12V
GND GND
VCC_12V
GND
VCC_3V3
BASE_PER_3V3
GND
GNDGND
GND
GND
VCC_12V
GND
GND
GND
GNDGND
GND
AGND
VCC_SOM
VCC_3V3
VCC_SOMVCC_3V3
J.31_33_35_PWR
GNDGND
VCC_3V3
GND
GND
GND
VCC_5V
VCC_12V
GND
VCC_3V3
GND
GND
VCC_5V
VCC_12V
BASE_PER_3V3
BASE_PER_3V3VCC_5V
VCC_12V
I2C#C_SCL
I2C#C_SDA
AC#_AGND
BOOT#_SEL
J1.146-HDMI_D1P
POR_B#_3V3
J1.40-MIPI_CAM_RST
CB_WDOG_B
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project1.2E_R1.10
05. Power,Reset,Boot,RTC,EEPROM
A3
5 14Tuesday, February 25, 2020Aviad H.
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project1.2E_R1.10
05. Power,Reset,Boot,RTC,EEPROM
A3
5 14Tuesday, February 25, 2020Aviad H.
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project1.2E_R1.10
05. Power,Reset,Boot,RTC,EEPROM
A3
5 14Tuesday, February 25, 2020Aviad H.
U20ISL12057IUZ
Vcc8
GND4
XI1
XO2
IRQ2#3
SDA5
SCL6
Fout7
R1384.99R 1%R0805
R121221R 1%
D23
D14D21
PG
B1
01
06
03
MR
C838.2nF
C99
10uFR81 100K
C85
180pF
SW3TDA01H0SB1R
1 2
C158
10uF
R1444.99R 1%R0805
C78
100nF
R9 0R
D530V,100mA
R8223.7K 1%
J9
HDR2.54_2x1_Shrouded
12
C751uF
R11 0RNCJ24
DC 2.0mm
1234
R66221R 1%
R672.2K 1%
R42
100KNC
R5910K
C11
100nF
C107
100nF
R1412.2K 1%
R70
475R 1%
C103
47uF
12
D12
D11
TPD1E10B09DPYR
R1404.99R 1%R0805
C74
4.7uF
C1868.2nF
ADD= 0xAx
'1' = WP
U3 BR24G04NUX-3TTR
A01
A12
A23
VSS4
SDA5SCL6WP7VCC8
PA
D9
C81 10nF
D7
FB1 120R 1.2A
C1881uF
TP7U29FPF2193
FLAGA1
ENA2 Vout
B1Vin
B2
IsetC1
GNDC2
U4TLV70215DBVR
VIN1
EN3
GND2
VOUT5
NC4
C110
47uF
12
R6047K
U7 TPS3808G30
SENSE5
CT4
MR3
VC
C6
VS
S2
RST1
FB2 120R 1.2ANC
R1091.47K 1%
C421uF
Y232.768KHz
1 2
R119 10K
J25
2 Pin Terminal Block
NC12
R14310K
C88
100nF
C79 10nF
R75 4.3K 1%
JBT1CR1225-HOLDER
+1
-3
++
2
R8522.6K 1%
D24
FB6
120R 1.2A
L2
4.7uH
1 2
C105
10uF
R74 0RNC
SW5
FSM4JSMATR
12
34
R58 0.0R
C159
100nF
R7268K 1%
R1
20
36
5R
Q12N7002P
3
1
2
Q7
2N7002P
3
1
2
C100
10uFC86
8.2nF
SW6
TDA01H0SB1R
12R145
0R
C82180pF
Q2
AON7407
D5D6D7D8
S2 S3
G4
S1
D2730V,100mA
R92
100K
C145
47uF
12
C80
100nF L3
4.7uH
1 2
U17TLV70218DBVR
VIN1
EN3
GND2
VOUT5
NC4
C101
100nF
U19RT7299BHGQW
SS/TR9 GND
2
GND3
PVIN4
PVIN5
RT/SYNC1
FB7
COMP8
GN
D1
5
VIN6
EN10
LX11
LX12
BOOT13
PGOOD14
R84 100K
R71
1.2K
R13310K
C104
47uF
12
C28100nF
C89
22uF
R1394.99R 1%R0805
R17 0RNC
U18RT7299BHGQW
SS/TR9 GND
2
GND3
PVIN4
PVIN5
RT/SYNC1
FB7
COMP8
GN
D1
5VIN
6
EN10
LX11
LX12
BOOT13
PGOOD14
C84
47uF
12
C187
100nF
C37
4.7uF
R56 0RNC
C109
47uF
12
Q9
2N7002P
3
1
2
C108
4.7uF
C43
2.2uF
R4010K
D13
R61
100K
C87
47uF
12
D15
BAT54CLT1G
1
3
2
C1898.2nF
NC
R76 2.4K 1%
C4933nF
NC
C102
4.7uF
R142
4.7K
R86105K 1%
Q8
2N7002P
3
1
2
C106
10uF
R134
100K
R83174K 1%
SW71101M2S3CQE2
Q6
2N7002P
3
1
2
VCC_RTCRTC_IN
XI
XO
VCC_12V_PJ
VCC_3V3_BAD_B
VCC_3V3_5V_EN
VCC_5V_BAD_BVCC_5V_BAD_B
RST_CT
PINS_31_33_35_PWR_EN
BASE_EN
FAN_PWR
VCC_3V3_BAD_B
VCC_3V3_5V_EN
DISCHRG_EN
VCC_12V_IN_OFF
RST_SW
VCC_3V3_5V_EN
COIN_IN
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Headphones
Line In
uSD CARD
DIGITAL MIC
06. uSD, Audio,CAN
CAN BUS
SD POWER
GND
GND
GND
GND
AGND GND GND
GND GNDAGND
GND
BASE_PER_3V3
BASE_PER_3V3
BASE_PER_3V3
BASE_PER_1V8
SW_3P3_SD1
BASE_PER_3V3
GND
BASE_PER_3V3
GND
SW_3P3_SD1
BASE_PER_3V3
GND
GND
USDHC#A_DAT1USDHC#A_DAT0
USDHC#A_DAT3USDHC#A_DAT2
USDHC#A_CMD
USDHC#A_CLK
AC#_HPLOUT
AC#_HPROUT
AC#_LINEIN_RP
AC#_LINEIN_LP
AC#_HPOUTFB
USDHC#A_CD_B
AC#_DMIC_CLK
AC#_DMIC_DATA
FLEXCAN#A_TX
CANH0
FLEXCAN#A_RXCANL0
SAI#A_RXC_USDHC#A_RESET_B
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
06. uSD, Audio,CAN
A4
6 14Tuesday, February 25, 2020Aviad H.
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
06. uSD, Audio,CAN
A4
6 14Tuesday, February 25, 2020Aviad H.
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
06. uSD, Audio,CAN
A4
6 14Tuesday, February 25, 2020Aviad H.
Symphony-Board
J12
STEREO JACK12
3
R11510K
U1SPM0423HD4H-WB
VDD6
L/R2
GND3
GND1
DATA5
CLK4
U13
TCAN332GD
TXD1
GND2
VCC3
RXD4
NC15
CANL6
CANH7
NC28
R900R NC
J2
HEADER 2X1
NC12
C12
100nF
J14STEREO JACK
12
3
C181
4.7uF
Q32N7002P
3
1
2
C361uF
C66
100nF
C291uF
R7 2.2K
R3 0R
J28 MR01A-01202
CD/DAT32 CMD3 VDD4 CLK5 VSS6 DAT07
DAT21
DAT18
SHL10
SHL13
CD9
SHL11SHL12
R20 2.2K
C41 10uF
R4 0R
Q4TPS27082L
1
3
26
5
4
C181uF
D8
C120100nF
R68120R
D4
D18IP4220CZ6
4
25
3
16
R107100K
D17IP4220CZ6
4
25
3
16
R320R
D2
TP
D1E
10B
09D
PY
R
C1211uF
R45 0R
C13
4.7uF
R892.2K
C50 10uF
D1
TP
D1E
10B
09D
PY
R
R12510K
AC#_LLINEIN_C
AC#_HPLOUT_C
AC#_HPROUT_C
AC#_RLINEIN_C
USDHC#A_CD_B
USDHC#A_DAT1
USDHC#A_DAT0
USDHC#A_CLK
ST_JACK_RTN
USDHC#A_DAT2 USDHC#A_DAT3
USDHC#A_CMD
AC#_DMIC_CLK_R
AC#_DMIC_DATA_R
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MIPI-CSI
07. Camera, HDMI, DP
MX6/MX8-HDMI, MX8-DP, MX8X-CSI
[//CSI_D04]
[//CSI_D02]
[//CSI_D03] [//CSI_D01]
[//CSI_D00]
[//CSI_D06]
[//CSI_D07]
[//CSI_EN]
[//CSI_PCLK]
[//CSI_VSYNC]
[//CSI_HSYNC]
[//CSI_D05]
[//CSI_RST_B]
LAYOUT NOTE:
HS mode: DIFFLP mode: SELane rate 1.5Gbps
Differential Impedance:100 ohms SE 50 ohms
DIR L: B>A H: A>B
HSEC8-113-01-L-RA-MATING - FOR HDMI/DP ADAPTER
HSEC8-113-01-L-DV-A-K-MATING - FOR MX8X Camera Adapter
Note:
U32 switch is to enable support for: Parallel camera, HDMI, DP adaptor boards.
Switch chooses between:
1)I2C#B which can export
on VAR-SOM-MX8X: I2C3 Used by parallel camera
on VAR-SOM-MX8: HDMI DDC Used by HDMI (GPIO1_22 in should be set High in SW)
and between
2) VAR-SOM-MX8(DP assembly option): HDMI AUX used by DP
Switch can be omitted when designing for only one of the the above interfaces.
BASE_PER_1V8BASE_PER_3V3
GND GND
GND
GND GND
BASE_PER_3V3VCC_5V
BASE_PER_3V3
BASE_PER_1V8
GND
BASE_PER_3V3
BASE_PER_1V8
GND
BASE_PER_3V3 BASE_PER_1V8
GND GND
GND
BASE_PER_3V3
GND
GND
BASE_PER_1V8
GND
GND
I2C#A_SDAI2C#A_SCL
J1.155-HDMI_D0PJ1.157-HDMI_D0M
J1.146-HDMI_D1PJ1.148-HDMI_D1M
J1.152-HDMI_CLKPJ1.150-HDMI_CLKM
J1.151-HDMI_D2PJ1.153-HDMI_D2M
J1.48J1.84
J1.173J1.154-HDMI_HPDJ1.156-HDMI_DDCCEC
J1.79
MIPI_CSI#A_DATA3_PMIPI_CSI#A_DATA3_N
MIPI_CSI#A_DATA2_NMIPI_CSI#A_DATA2_P
MIPI_CSI#A_DATA1_NMIPI_CSI#A_DATA1_P
MIPI_CSI#A_CLK_NMIPI_CSI#A_CLK_P
MIPI_CSI#A_DATA0_NMIPI_CSI#A_DATA0_P
J1.77-MIPI_CSI_PWDN
J1.117-MIPI_CAM_OPTJ1.70-MIPI_CAM_SYNC
J1.86-MIPI_CAM_BUF_CTL
J1.75-MIPI_CAM_TRIGGER
I2C#B_SCLI2C#B_SDA
LVDS#B_TX3_PLVDS#B_TX3_N
J1.40-MIPI_CAM_RST
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
07. Camera, HDMI, DP
A3
7 14Tuesday, February 25, 2020Aviad H. <Approved By>
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
07. Camera, HDMI, DP
A3
7 14Tuesday, February 25, 2020Aviad H. <Approved By>
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
07. Camera, HDMI, DP
A3
7 14Tuesday, February 25, 2020Aviad H. <Approved By>
Symphony-Board
R69
10K
R1
29
10
K
NC
J19HSEC8-130-01-SM-DV-A-MATING
VCC_3V31
VCC_3V33
VCC_1V85
VCC_1V87
DGND9
CSI_P1_DP011
CSI_P1_DN013
DGND15
CSI_P1_CKP17
CSI_P1_CKN19
DGND21
CSI_P1_DP123
CSI_P1_DN125
DGND27
CSI_P1_DP229
CSI_P1_DN231
DGND33
CSI_P1_DP335
CSI_P1_DN337
DGND39
CSI_P1_TRIGGER41
DGND43
CSI_P1_SYNC45
CSI_P1_OPT47
CSI_P1_RST49
CSI_P1_PWR_EN51
DGND53
CSI_P1_I2C_SCL55
CSI_P1_I2C_SDA57
DGND59
DGND2
CSI_P2_I2C_SDA4
CSI_P2_I2C_SCL6
DGND8
CSI_P2_PWR_EN10
CSI_P2_RST12
CSI_P2_OPT14
CSI_P2_SYNC16
DGND18
CSI_P2_TRIGGER20
DGND22
CSI_P2_DN324
CSI_P2_DP326
DGND28
CSI_P2_DN230
CSI_P2_DP232
DGND34
CSI_P2_DN136
CSI_P2_DP138
DGND40
CSI_P2_CKN42
CSI_P2_CKP44
DGND46
CSI_P2_DN048
CSI_P2_DP050
DGND52
VCC_1V854
VCC_1V856
VCC_3V358
VCC_3V360
VCCA<= VCCB
U15TXS0104E
VCCA1
A12
A23
A34
A45
NC06
GND7
OE8NC1
9 B410 B311 B212 B113 VCCB14
EP15
R73
10K
C184 100nF
U16SN74AVC4T774
A11
A22
A33
A44
DIR35
DIR46
B112
/OE7
GND8
B49B310B211
DIR216 DIR115
VCCA14
VCCB13
C157
100nF
KEYBOT
TOP
J13
HSEC8-113-01-L-RA-MATING
1357911
13151719212325
2468
1012
14161820222426
C72
100nF
U32TMUX136RSER
A11
A22 COM1
8
B24 B13
EN6
COM27
GN
D5
SEL9
VC
C1
0
VCC
GND
U14
SN74LV1T125DCKR
1
2
3 4
5
C70
4.7uF
C77
100nF
C71
4.7uF
C76
100nF
C73
100nF
CAM_I2C_SDACAM_I2C_SCL
HDMI_DDC_SCL_DP_AUX_PHDMI_DDC_SDA_DP_AUX_N
CAM_I2C_SCLCAM_I2C_SDA
J1.40-MIPI_CAM_RST_B_1V8J1.77-MIPI_CSI_PWDN_1V8
J1.75-MIPI_CAM_TRIGGER_1V8
J1.117-MIPI_CAM_OPT_1V8J1.70-MIPI_CAM_SYNC_1V8
J1.77-MIPI_CSI_PWDN_1V8J1.117-MIPI_CAM_OPT_1V8J1.70-MIPI_CAM_SYNC_1V8
J1.75-MIPI_CAM_TRIGGER_1V8
HDMI_DP_SEL
HDMI_DP_SEL
J1.40-MIPI_CAM_RST_B_1V8
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
08. Ethernet
MX8/MX8X- Gigabit Ethernet (External)
Giga Ethernet Differential Pair,Follow Giga Ethernet routingguidelines.Differential Impedance: 100 ohms
LAYOUT NOTE:
LAYOUT NOTE:
Gigabit Ethernet (Internal)
Giga Ethernet Differential Pair,Follow Giga Ethernet routingguidelines.Differential Impedance: 100 ohms
LEDs - active LOW, address 00101b
SYMVER
S="L" B0<>AS="H" B1<>A
MX6-VCC_SOM
{MX8/MX8X}-ETH#1_VDDIO_REG
Gigabit Ethernet (External) / Header selection
SEL123&SEL456 = L : COM <> NCSEL123&SEL456 = H : COM <> NO
ETH1_VDDIO_REG ETH1_VDDH_REG
BASE_PER_3V3 ETH1_DVDDL
GNDGND GNDGND GND GND GND
GND GND GND GND
GND GND GND
GND
GNDGND GND
GND GNDGND GND GND GND
BASE_PER_3V3
BASE_PER_3V3
GND
GND
ETH1_VDDH_REG
BASE_PER_3V3
BASE_PER_3V3
GND
BASE_PER_3V3
GND
GND GND
ETH1_VDDIO_REG
ETH1_VDDIO_REG VCC_SOM
GND
GND
BASE_PER_3V3
EXP_ENET1_RESET_B
J1.30-ENET_MDIOJ1.74-ENET_MDC
ETH#A_MDI_A_P ETH#A_LED_ACTETH#A_MDI_A_M
ETH#A_MDI_B_PETH#A_MDI_B_M
ETH#A_MDI_C_PETH#A_MDI_C_M ETH#A_LED_LINK_10_100_1000
ETH#A_MDI_D_PETH#A_MDI_D_M
EXP_ENET_SEL EXP_ENET_SEL
J1.81-ENET1_RGMII_RXD1J1.120-ENET1_RGMII_RX_CTL
J1.57-ENET1_RGMII_RXC
J1.177_EXTJ1.73_EXT
J1.56_EXTJ1.55_EXT
J1.113-ENET1_RGMII_TX_CTLJ1.96-ENET1_RGMII_TXCJ1.73-ENET1_RGMII_TXD0
J1.177-ENET1_RGMII_TXD1J1.56-ENET1_RGMII_TXD2J1.55-ENET1_RGMII_TXD3
J1.113_EXTJ1.96_EXT
J1.81_EXTJ1.120_EXTJ1.57_EXT
J1.54-ENET1_RGMII_RXD3
J1.54_EXT
J1.122-ENET1_RGMII_RXD0J1.71-ENET1_RGMII_RXD2
J1.122_EXTJ1.71_EXT
J1.38_POWER
EXP_SOM_VSELECT
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
08. Ethernet
A3
8 14Tuesday, February 25, 2020Aviad H. <Approved By>
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
08. Ethernet
A3
8 14Tuesday, February 25, 2020Aviad H. <Approved By>
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
08. Ethernet
A3
8 14Tuesday, February 25, 2020Aviad H. <Approved By>
Symphony-Board
Green
Yellow
Oragne
J21 S26-ZZ-0018
L2Y-
L1Y+
L4G_O_1
TCT3R1
TD3-R2 TD3+R3
TD2+R4
TCT4R7
TD4+R8
TD4-R9
TD1-R10
SH1SH1
SH2SH2
TD2-R5
TCT2R6
TD1+R11
TCT1R12
L5G_O_2
R78
49.9R 1%
R4
61
0K
C46
100nF
D2930V,100mA
SGMII/1000FX
1588v2
U11
AR8033-AL1A-R
LED_LINK_100024
VD
D3
34
LED_LINK_10_10026
TXD036
TXD137
TXD238
TXD339
GTX_CLK35
TX_EN34
RXD327
RXD130 RXD031
RX_DV32
SIP46
RX_CLK33
MDC1 MDIO
48
INT_N5
DV
DD
L4
7LX
3
CLK25M25
RESET_N2
RBIAS9
XTLO6
XTLI7
AV
DD
33
16
PPS22
SIN45
TRXP_011
TRXM_012
TRXP_114
TRXM_115
TRXP_217
TRXM_218
TRXP_320
TRXM_321
WOL_INT40
RXD228
VD
DH
_R
EG
10
P_
GN
D4
9A
VD
DL
#1
8
LED_ACT23
AV
DD
L#
21
3
AV
DD
L#
31
9
VD
DIO
_R
EG
29
AV
DD
L#
44
4
SOP43
SON42
SD41
C62
100nF
U9 NFL18ST207X1C3
C45
1uF
C4
74
70
pF
C9
41
00
nF
C55
4.7uF
C9
11
00
nF
C5
24
70
pF
C9
51
00
nF
C56
4.7uF
U8
TS3A27518ERTWR
COM11
VCC5
NO18
COM23
EN#17
NO210
COM34
GND2
SEL45611
NO312
COM46
COM69
NO613NO414
COM57
NO515
NC619
NC222
SEL12321
NC516
NC418
NC123
NC320
N.C.24
EP25
C9
21
00
nF
U10
TS3A27518ERTWR
COM11
VCC5
NO18
COM23
EN#17
NO210
COM34
GND2
SEL45611
NO312
COM46
COM69
NO613NO414
COM57
NO515
NC619
NC222
SEL12321
NC516
NC418
NC123
NC320
N.C.24
EP25
R80 49.9R 1%
C51
100nF
C5
34
70
pF
C9
61
00
nF
L14.7uH
12
R4
81
0K
C9
31
00
nF
C9
71
00
nF
C59
100nF
R652.37K 1%
Green
Yellow
Oragne
J20 S26-ZZ-0018
L2Y-
L1Y+
L4G_O_1
TCT3R1
TD3-R2 TD3+R3
TD2+R4
TCT4R7
TD4+R8
TD4-R9
TD1-R10
SH1SH1
SH2SH2
TD2-R5
TCT2R6
TD1+R11
TCT1R12
L5G_O_2
R6
21
0K
C58
100nF
C57
100nF
C1261nF 2KV
FB5120R 1.2A
C54
100nF
C67
22pF
C68
22pF
R77
49.9R 1%
FB4120R 1.2A
C60
1uF
D2830V,100mA
C1351nF 2KV
R79 49.9R 1%
C9
01
00
nF
C61
100nF
C64
100nF
C63
1uF
Y1
25 Mhz
1
2
3
4
C48
100nF
C44
100nF
C65
4.7uF
R47 0RNC
U12
FSA5157P6X
S6
VC
C5
GN
D2
B03
4A
B11
ETH1_AVDD33
ETH1_LX_OUT
ETH1_MDI_A_PENET1_RGMII_RXD0 ETH1_MDI_A_MENET1_RGMII_RXD1ENET1_RGMII_RXD2
ETH1_MDI_B_PETH1_MDI_B_M
ENET1_RGMII_RXC_ARENET1_RGMII_RX_CTL
ETH1_MDI_C_PENET1_RGMII_TXD0 ETH1_MDI_C_MENET1_RGMII_TXD1ENET1_RGMII_TXD2ENET1_RGMII_TXD3 ETH1_MDI_D_P
ETH1_MDI_D_MENET1_RGMII_TXCENET1_RGMII_TX_CTL
ETH1_LED_ACTETH1_LED_LINK_10_100ETH1_LED_LINK_1000
ETH1_CLK_O
ETH1_CLK_I
ETH1_AVDDL
ENET1_RGMII_RXD3
ENET1_RGMII_RXC
ETH1_LED_ACT
ENET1_RGMII_TX_CTLENET1_RGMII_TXCENET1_RGMII_TXD0ENET1_RGMII_TXD1ENET1_RGMII_TXD2ENET1_RGMII_TXD3
ENET1_RGMII_RXD1ENET1_RGMII_RX_CTLENET1_RGMII_RXC
ENET1_RGMII_RXD3
ENET1_RGMII_RXD0ENET1_RGMII_RXD2
ENET1_RGMII_RXD0
ETH1_LED_LINK_10_100_1000
ETH1_LED_LINK_10_100_1000
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Note: 1. Default always ON, To disable clock installR21.2. Replacement PN: AB-557-03-HCHC-F-L-C-T
Differential Impedance:100 ohms
LAYOUT NOTE:
LAYOUT NOTE:
PCIE Differential Pairs, Follow PCIe routing guidelines.Differential Impedance: 85 ohmsLength match +/-5mil
1.5V_LDO Current limited to 300mA
PCIe CLK
09. PCIe
Place parallel termination resistorsclose to the mPCIe connector
Place parallel termination resistorsas close to the SOM connector as possible.
To use internal SoC clock:install 100nF instead of R37,R38remove R22,R23,R35,R36
mPCIexp
LAYOUT NOTE:
LAYOUT NOTE:
Place AC caps close to the connector
LAYOUT NOTE:
GND
GND
GND
GND
GND GND
GND
GND
BASE_PER_3V3BASE_PER_1V5
BASE_PER_3V3
PCIE#A_REFCLK100M_PPCIE#A_REFCLK100M_N
PCIE#A_RX0_N
PCIE#A_RX0_P
PCIE#A_TX0_P
PCIE#A_TX0_NI2C#A_SDA
I2C#A_SCL
SAI#A_RXFS_PCIE#A_RESET_B
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
09. PCIe
A4
9 14Tuesday, February 25, 2020Aviad H. <Approved By>
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
09. PCIe
A4
9 14Tuesday, February 25, 2020Aviad H. <Approved By>
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
09. PCIe
A4
9 14Tuesday, February 25, 2020Aviad H. <Approved By>
C7100nF
R230R
C4
100nF
R1 49.9R
FB3120R 1.2A
C6
100nF
R210RNC
R360R
R2 49.9R
C5
100nF
R350R
TP1
C3
4.7uF
R50
49.9
R
C31
100nF
C30
100nF
C40
100uF
C33
4.7uF
C1
100uF
J15
MM60-52B1-E1-R650
WAKE#1
COEX13
COEX25
CLKREQ#7
GND19
REFCLK-11
REFCLK+13
GND215
Reserved/UIM_C817
Reserved/UIM_C419
GND321
PERn023
PERp025
GND427
GND529
PETn031
PETp033
GND635
GND1437
+3.3Vaux139
+3.3Vaux241
GND1343
Reserved745
Reserved847
Reserved949
Reserved1051
3.3V_12
GND74
1.5V_16
UIM_PWR8
UIM_DATA10
UIM_CLK12
UIM_RESET14
UIM_VPP16
GND818
W_DISABLE#20
PERST#22
+3.3Vaux24
GND926
1.5V_228
SMB_CLK30
SMB_DATA32
GND1034
USB_D-36
USB_D+38
GND1140
LED_WWAN#42
LED_WLAN#44
LED_WPAN#46
1.5V_348
GND1250
3.3V_252
TP2
C34
100uF
R38 0RNC
C32
2.2uF
C39
2.2uF
R49
49.9
R
R37 0RNC
C8100nF
C38
100nF
U6
DSC557-0344FL1T
OE1
NC_22
NC_33
VS
S4
NC_55
NC_66
NC_77 CLK1+
8
CLK1-9
CLK0-10CLK0+11V
DD
11
2V
DD
01
3
EP
15
NC_1414
R220R
PWR_OSC_PCIE
OSC_PCIE_CLK1_POSC_PCIE_CLK1_N
OSC_PCIE_CLK0_NOSC_PCIE_CLK0_P
PCIe_CTXM
PCIe_CRXPPCIe_CRXM
PCIe_CTXP
PCIE#A_DIS_B
PCIE#A_REFCLK100M_N_CPCIE#A_REFCLK100M_P_C
PCIE#A_REFCLK100M_P_CPCIE#A_REFCLK100M_N_C
PCIE#A_WAKE_B
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB UART DEBUG
BACK
GP BUTTON GP LED
10. Debug, GPIO Exp, Buttons, LED
USB 2.0 Differential Pair, annotatedwith a ring around the pair. FollowUSB 2.0 routing guidelines.Length Match: +/- 100 milsDifferential Impedance: 90 ohms
LAYOUT NOTE:
HOME
MENU
GPIO EXPANDER
I2C ADDRESS= 0x20
GND
DEBUG_VBUS3V3OUT
BASE_PER_3V3 3V3OUT
DEBUG_VBUS_C
3V3OUT
GND GND
GND GNDGND
GNDGND
GND
GND
GND GND
GND
BASE_PER_3V3
GND
GND
BASE_PER_3V3
GND
GND
GNDGNDGNDGND
UART#_DEBUG_RX
UART#_DEBUG_TX
EXP_LEDEXP_SW1
EXP_SW2
EXP_SW3
EXP_LEDI2C#A_SDA EXP_SW1I2C#A_SCL EXP_SW2
EXP_SW3
EXP_USB3_SATA_SELEXP_ENET1_RESET_BEXP_SOM_VSELECTEXP_ENET_SEL
EXP_INT
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
10. Debug, GPIO Exp, Buttons, LED
A4
10 14Tuesday, February 25, 2020Aviad H. <Approved By>
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
10. Debug, GPIO Exp, Buttons, LED
A4
10 14Tuesday, February 25, 2020Aviad H. <Approved By>
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
10. Debug, GPIO Exp, Buttons, LED
A4
10 14Tuesday, February 25, 2020Aviad H. <Approved By>
TP5
R30
10K
C133
100nF
L6MCZ1210AH900L2T
14
3 2
U24FT230XQ
TXD15
RTS#16
VC
CIO
1
RXD2
GN
D1
3
CTS#4
CBUS25
CBUS314
CBUS012
CBUS111
GN
D3
VCC10
RESET#9
EP
AD
17
3V
3O
UT
8
USBDM7
USBDP6
C144
10nF
R1910K
C125
100nF
TP6
FB8120R 1.2A
C134
4.7uF
SW2
FSM4JSMATR
12
34
'0'-B->A
U23SN74AVC4T245
VCCA1
1DIR2
2DIR3
1A14
1A25
2A16
2A27
GND8
GND92B2102B1111B2121B1132OE#141OE#15VCCB16
PA
D1
7
D3TPD1E10B09DPYR
D6TPD1E10B09DPYR
U5
PCA9534PWR
A01
A12
A23
P04
P15
P26
P37
GND8
P49
P510
P611
P712
INT13 SCL14 SDA15 VCC16
J29USB MICRO AB
VCC1
DATAN2
DATAP3
ID4
GND5
S6
S7
S1
1S
10
C35
100nF
R64 221R 1%R24
100K
R44
10K
NC
SW4
FSM4JSMATR
12
34
C122
100nF
R25
100K
C185
1uF
R26
100K
C123
100nF
R29
10K
U28TPD4EUSB30
D1+1
D1-2
GND3
D2+4
D2-5
NC110
NC29
GND8
NC37
NC46
C124
100nF
R27
100K
D10
SW1
FSM4JSMATR
12
34
R28
10K
R43
10K
D9TPD1E10B09DPYR
USB_DEBUG_DM
USB_DEBUG_DP
USB_DEBUG_DM_CUSB_DEBUG_DP_C
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
11. LVDS, DSI, Touch
RESISTIVE TOUCH
CAPACITIVE TOUCH MIPI DSI DISPLAY
LAYOUT NOTE:
LVDS Differential Pair, FollowLVDS routing guidelines.Differential Impedance: 100 ohms
LVDS DISPLAY A
LVDS Differential Pair, FollowLVDS routing guidelines.Differential Impedance: 100 ohms
LAYOUT NOTE:
LVDS DISPLAY B
LVDS Differential Pair, FollowLVDS routing guidelines.Differential Impedance: 100 ohms
LAYOUT NOTE:
[//QSPI0B_DATA1/*/ADC_IN2] [//QSPI0B_DATA3/*/ADC_IN3]
[//QSPI0B_DQS/*/ADC_IN5]
[//QSPI0B_SCLK/*/ADC_IN4]
[//QSPI0B_DATA0/*/ADC_IN1]
[//QSPI0B_DATA2/*/ADC_IN0]
Short circuit protection
Note: Please see note on Headers pageregarding Touch interrupt
Note for U30 U31: Recommneded PN for new design FPF2193Assembled board can have FPF2194.
GND
GNDGNDGND
GND
BASE_PER_3V3
GND
GND GND
GND
GND
GND GND
GND
GND
BASE_PER_1V8
GND
BASE_PER_3V3
VCC_DISP_3V3
VCC_DISP_3V3
VCC_DISP_3V3VCC_DISP_3V3
VCC_DISP_5V
GND
VCC_5V
VCC_DISP_5V
VCC_DISP_5V
VCC_5VBASE_PER_3V3
PWM#B_CPT_INTI2C#C_SCLI2C#C_SDA
LVDS#A_TX1_NLVDS#A_TX1_PLVDS#A_TX2_N LVDS#A_TX2_P
LVDS#A_CLK_NLVDS#A_CLK_P
LVDS#A_TX0_N LVDS#A_TX0_P
PWM#A
I2C#A_SDAI2C#A_SCL
LVDS#A_TX3_NLVDS#A_TX3_P
LVDS#B_TX3_P
LVDS#B_TX0_N
LVDS#B_TX3_N
LVDS#B_TX0_PLVDS#B_TX1_N
LVDS#B_TX1_PLVDS#B_TX2_N LVDS#B_TX2_P
LVDS#B_CLK_NLVDS#B_CLK_P
J1.140-DSI_CLK0PJ1.142-DSI_CLK0M
J1.143-DSI_D0PJ1.145-DSI_D1M
J1.147-DSI_D1P
J1.141-DSI_D0M
PWM#A
PWM#A
TP#_TS_X-_CONN
TP#_TS_X+_CONNTP#_TS_Y+_CONN
TP#_TS_Y-_CONN
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
11. LVDS, DSI, Touch
A4
11 14Tuesday, February 25, 2020Aviad H.
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
11. LVDS, DSI, Touch
A4
11 14Tuesday, February 25, 2020Aviad H.
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
11. LVDS, DSI, Touch
A4
11 14Tuesday, February 25, 2020Aviad H.
Symphony-Board
R5
10K
C16
470pF
C9
100nF
C27
10uF
C17
470pF
C160
100nF
U31FPF2193
FLAGA1
ENA2 Vout
B1Vin
B2
IsetC1
GNDC2
C2
10uF
C161
10uF
J5
CH81202M10100
11
33
55
99
1111
1313
1515
1717
1919
22
44
66
88
1010
1212
1414
1616
1818
2020
77
D26
R12310KNC
M1M2
J10
4 POS FFC/FPC
123456
R122 221R 1%
C25
10uF
R12710KNC
C19
10uFJ3
CH81202M10100
11
33
55
99
1111
1313
1515
1717
1919
22
44
66
88
1010
1212
1414
1616
1818
2020
77
D25
R124
365R
M1
M2
J11CF20061D0R0-LF
1234
78
56
C182
10uF
R126 475R 1%
J6
HEADER 2X1
NC12
C183
100nF
C24
10uF
J7
CH81202M10100
11
33
55
99
1111
1313
1515
1717
1919
22
44
66
88
1010
1212
1414
1616
1818
2020
77
R128
365R
U30FPF2193
FLAGA1
ENA2 Vout
B1Vin
B2
IsetC1
GNDC2
C15
470pF
C14
470pFR
610K
J4
HEADER 2X1NC1
2
C20
10uF
J8
HEADER 2X1
NC12
CPT_RST
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
12. USB2 Host
USB 2.0 Differential Pair, annotatedwith a ring around the pair. FollowUSB 2.0 routing guidelines.Length Match: +/- 100 milsDifferential Impedance: 90 ohms
USB2 Host
LAYOUT NOTE:
VCC_5V USB#A_HOST_VBUS
USB#A_HOST_VBUS
GND
GND
GND
USB#A_HOST_DN
USB#A_HOST_DP
J1.82-USB#A_HOST_PWR
USB#A_HOST_VBUS
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
12. USB2 Host
A4
12 14Tuesday, February 25, 2020Aviad H.
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
12. USB2 Host
A4
12 14Tuesday, February 25, 2020Aviad H.
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
12. USB2 Host
A4
12 14Tuesday, February 25, 2020Aviad H.
Symphony-Board
C113
47uF
12
L4MCZ1210AH900L2T
1 4
32
R9310K
C111
10uF
C114
100nFR
110
787R
D16IP4220CZ6
4
25
3
16
J23USB304FA-C1031301
12
34
5
6
U22FPF2193
FLAGA1
ENA2 Vout
B1Vin
B2
IsetC1
GNDC2
USB#A_HOST_DN_C
USB#A_HOST_DP_C
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Bleeder
USB TYPE C Circuitry
5V Source Load Switch
LAYOUT NOTE:
USB 2.0 Differential Pair, annotatedwith a ring around the pair. FollowUSB 2.0 routing guidelines.Differential Impedance: 90 ohms
USB TYPE C
Config Channel Logic Detection & Indication of Plug Orientation
Ilim: 68K ~0.85A54K ~ 1A23.7K ~2.1A
USB Profile 1 = 5 V @ 2.1 A
28V VBUS w/PD
Place AC-coupling CAPscloser to transmit side.USB3 SIGNALS
7 kV ESD immunity - HBM
���������������� �����������������
���������������������� �����������
USB 3.0 Differential Pair, annotatedwith a ring around the pair. FollowUSB 3.0 routing guidelines.Differential Impedance: 90 ohms
LAYOUT NOTE:
13. USB3, uSATA SATA 2.0
Layout Note Place AC caps close to the connector
LAYOUT NOTE:
SATA Differential Pair, FollowSATA routing guidelines.Differential Impedance: 85 ohmsLength match +/-5mil
6UL-BOOT_MODE1
LAYOUT NOTE:
SEL = LOW: A <-> BSEL = HIGH: A <-> C
XSD = LOW: ONXSD = HIGH: OFF
By deafult, lines routed to SATA
SATA/USB select
SATA Differential Pair, FollowSATA routing guidelines.Differential Impedance: 85 ohmsLength match +/-5mil
LAYOUT NOTE:
USB 3.0 Differential Pair, annotatedwith a ring around the pair. FollowUSB 3.0 routing guidelines.Differential Impedance: 90 ohms
LAYOUT NOTE:
BASE_PER_1V8
GNDGND
USB_SS3_VBUS
GND
GNDGND
GND GND
GND
GNDGND GND
BASE_PER_1V8 BASE_PER_3V3
VCC_5V
USB_SS3_VBUS
GND
GND
GND
BASE_PER_3V3
GND
BASE_PER_3V3
GND
GND
GNDGND GND
BASE_PER_1V8
GND
BASE_PER_3V3
GND
BASE_PER_3V3
GNDVCC_5V
GND
GND
GNDGND
VCC_5V
BASE_PER_3V3
USB_SS3_VBUS
USB#B_OTG_DP
USB#B_OTG_DN
USB#B_OTG_ID
J1.72-USB3_INTB
EXP_USB3_SATA_SEL
USB#B_OTG_VBUS
J1.93-SATA_RXP-USB3_SS3_RX_PJ1.91-SATA_RXN-USB3_SS3_RX_NJ1.97-SATA_TXP-USB3_SS3_TX_PJ1.99-SATA_TXN-USB3_SS3_TX_N
USB#B_OTG_IDJ1.72-USB3_INTB
I2C#A_SDAI2C#A_SCL
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
13. USB3, uSATA
A3
13 14Tuesday, February 25, 2020Aviad H.
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
13. USB3, uSATA
A3
13 14Tuesday, February 25, 2020Aviad H.
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
13. USB3, uSATA
A3
13 14Tuesday, February 25, 2020Aviad H.
Symphony-Board
C139100nF
C22
100nF
R1
13
10
K
C132
22uF
C143100nF
R98 2.2KNC
C117100nF
R96 2.2KNC
R1110R
L5
MCZ1210AH900L2T
1 4
32
D19
TP
D1
E1
0B
09
DP
YR
C98
100nF
U26
NX5P3090UKZ
ENA1
FAULTA2
ILIMA3
VINT1B1
VINT2B2
GN
D1
B3
VINT3C1
VBUS1C2
GN
D2
C3
VBUS2D1
VBUS3D2
GN
D3
D3
R11610K
C115100nF
R99 2.2K
R130 0R R131 0RNC
C112
100nF
C119100nF
R97 2.2KNC
R1
12
10
K
C23
100nF
R8
71
0K
U25
PTN36043BXY
RX_AP_+18
RX_AP_-17
TX_AP_+15
TX_AP_-14 TX_CON_1+
6
TX_CON_1-7
RX_CON_1+2
RX_CON_1-3
TX_CON_2+12
TX_CON_2-11
RX_CON_2+9
RX_CON_2-8
SEL16
CH1_SET1/RXDE1
CH1_SET2/TXEQ4
CH2_SET1/TXDE13
CH2_SET2/RXEQ10
VD
D1
V8
5G
ND
19
J27
SATA 7Circuits
GND11
TXP/A+2
TXN/A-3
GND24
RXN/B-5
RXP/B+6
GND37
MP18
MP29
C140100nF
C1302.2uF 50V
C0805_v1
FB7
120R 1.2A
TP3
R8
81
0K
R1
04
10
K
R132 0RNC
C138100nF
R1034.7K
NC
J26
USB3 TYPE C RA
GND_1A1
SSTXP1A2
SSTXN1A3
VBUS_1A4
CC1A5
DP1A6
DN1A7
SBU1A8
VBUS_2A9
SSRXN2A10
SSRXP2A11
GND_2A12
GND_4B1SSTXP2B2SSTXN2B3VBUS_4B4CC2B5DP2B6DN2B7SBU2B8VBUS_3B9SSRXN1B10SSRXP1B11GND_3B12
SH1SH1 SH3
SH3
SH2SH2
SH4SH4
J22
HDR2.54_3x1_Shrouded
123
U2CBTL02043B
GN
D1
1
A0_P2
B0_N17
B1_P14
C1_P8
C0_P4
XSD19
A0_N3
C0_N5
B1_N13A1_P
6
VD
D2
16
VD
D3
20
VD
D1
11
C1_N9
GN
D2
10
GN
D3
15
B0_P18
SEL12
A1_N7
GN
D4
21
R94 2.2KNC
TP4
R100 2.2KNC
U21
PTN5150AHXMP
PORT3
VBUS_DET4
ADR/CON_DET5
INTB/OUT36
SDA/OUT17
SCL/OUT28
ID9
GN
D1
0
EXT_SEL11
VD
D1
2
CC11
CC22
C116100nF
R106 0R
C141100nF
C127
2.2uF
R114
23.7K 1%
R1
05
10
K
D20PGB1010603MR
C136
2.2uF
C128100nF
R101 2.2KNC
C10
100nF
C131
22uFC0805_v1
C142100nF
C129
10uF
C118100nF
C137
100nF
D22
TP
D1
E1
0B
09
DP
YR
R95 2.2K
R1024.7K
NC
U27TPD4EUSB30
D1+1
D1-2
GND3
D2+4
D2-5
NC110
NC29
GND8
NC37
NC46
Q52N7002P
3
1
2
R11710KNC
SS_REDRV_VDD1V8
USB3_SS3_TX_P USB3_AP_TX_P SS_CON_TX1_P SS_TX1_P
USB3_SS3_TX_N USB3_AP_TX_N SS_CON_TX1_N SS_TX1_N
USB3_SS3_RX_P USB3_AP_RX_P SS_CON_TX2_P SS_TX2_P
USB3_SS3_RX_N USB3_AP_RX_N SS_CON_TX2_N SS_TX2_N
SS_RX1_PPTN5150A_SEL SS_RX1_N
PTN36043_CH1SET1SS_RX2_PSS_RX2_NPTN36043_CH1SET2
PTN36043_CH2SET1
SS_TX1_P SS_RX1_PSS_TX1_N SS_RX1_N
PTN36043_CH2SET2
USB_SS3_CC1 SBU2USB_C_OTG2_DP USB_C_OTG2_DNUSB_C_OTG2_DN USB_C_OTG2_DP
SBU1 USB_SS3_CC2
SS_RX2_N SS_TX2_NSS_RX2_P SS_TX2_P
CON_DET INTB
NX5P3090_EN
PTN5150A_SELUSB_SS3_CC1
PTN5150A_PORT USB_SS3_CC2
NX5P3090_ILIM
USB#B_OTG_ID_C
SATA_TXPSATAc_TXPSATAc_TXNSATA_TXN
SATAc_RXNSATA_RXNSATAc_RXP
SATA_RXP
USB3_SS3_RX_PUSB3_SS3_RX_NUSB3_SS3_TX_PUSB3_SS3_TX_N
SATA_RXPSATA_RXNSATA_TXPSATA_TXN
USB#B_OTG_ID_C
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
14. Headers
I2C PULL UPS
BT UARTUART#A
UART#B
I2C#C
SPI#A
I2C#A
I2C#B
[UART3_TX_DATA/DMA.UART3.TX/]
[UART3_CTS_B/DMA.UART3.RTS_B/]
[UART3_RX_DATA/DMA.UART3.RX/]
[UART1_CTS_B/DMA.UART0.RTS_B/LSIO.QSPI0B.SS1_B]
[UART1_RTS_B/DMA.UART0.CTS_B/]
[ECSPI1_SS1//]
[/DMA.SPI0.CS0/ADMA.SPI1.CS0][UART4_RTS_B//]
[UART4_CTS_B//LSIO.QSPI0B.SS0_B]
[/DMA.SPI0.SDO/ADMA.SPI1.SDO]
[/DMA.SPI0.SCK/ADMA.SPI1.SCK]
[/DMA.SPI0.SDI/ADMA.SPI1.SDI]
[//UART1_CTS_B]
SAI
CAN
PWM#B PWM#C
[UART3_RTS_B/DMA.UART3.CTS_B/]
I2C_A has internal pulls in Camera bufferI2C_B has internal pulls in som
[//UART1_RTS_B]
Located on PS
SOM_6UL PIN57 WDOG1_B
MX8 MX8X MX8M-NANO MX8M-MINI Connected on SOM
MX6/SOLO PIN68 WDOG1_B
COLD RESET ON WDOG_B EVENT
BASE_PER_3V3
GND
GND
BASE_PER_3V3 BASE_PER_3V3
GND
I2C#B_SCLI2C#B_SDA
I2C#C_SDAI2C#C_SCL
I2C#A_SCLI2C#A_SDA
TP#_TS_X-TP#_TS_X+TP#_TS_Y+
TP#_TS_Y-
CANL0CANH0
J1.96_EXTJ1.73_EXT
J1.56_EXT
J1.71_EXTJ1.81_EXT
J1.120_EXT
J1.177_EXTJ1.113_EXT
J1.55_EXT
J1.54_EXT
J1.86-MIPI_CAM_BUF_CTLJ1.84J1.48
J1.79J1.117-MIPI_CAM_OPT
J1.173
J1.40-MIPI_CAM_RST
J1.70-MIPI_CAM_SYNCJ1.75-MIPI_CAM_TRIGGERJ1.77-MIPI_CSI_PWDN
J1.72-USB3_INTB
SAI#A_RXFS_PCIE#A_RESET_BSAI#A_TXCSAI#A_RXD
SAI#A_TXDSAI#A_TXFS
SPI#A_SCK
SPI#A_SDI
SAI#A_RXC_USDHC#A_RESET_B
I2C#B_SCLI2C#B_SDA
SPI#A_SDO
SPI#A_CS0
I2C#A_SCLI2C#A_SDA
I2C#C_SCL
I2C#C_SDA
UART#A_TXUART#A_RXUART#B_TXUART#B_RX
UART#BT_CTS_BUART#BT_RTS_B
UART#BT_RXUART#BT_TX
PWM#B_CPT_INT PWM#C
J1.122_EXT J1.57_EXT
J1.57_EXT
PWM#B_CPT_INT
CB_WDOG_B
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
14. Headers
A4
14 14Tuesday, February 25, 2020Aviad H.
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
14. Headers
A4
14 14Tuesday, February 25, 2020Aviad H.
Symphony-Board
Title
Size Document Number Rev
Date: Sheet ofApproved By:Designer:
Project
Symphony-Board 1.2E_R1.10
14. Headers
A4
14 14Tuesday, February 25, 2020Aviad H.
Symphony-Board
J17
CH81102M10100
108642
97531
J30
CH81202M10100
NC
11
33
55
99
1111
1313
1515
1717
1919
22
44
66
88
1010
1212
1414
1616
1818
2020
77
J18
CH81102M10100
108642
97531
R1360R NC
R33
10K
NC
R14
10K
NC
R1370R NC
R51
10K
J16
CH81202M10100
11
33
55
99
1111
1313
1515
1717
1919
22
44
66
88
1010
1212
1414
1616
1818
2020
77
R53
10K
NC
R34
10K
NC
R52
10K
R118 1.2K J1.173_R