dong_co_dc_1207

LUN VN TT NGHIP

TI

Lp trnh PIC16F877A iu khin tc

ng c DC

n 2 GVHD: Nguyn Thanh Tho

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MC LC

Chng I: KHI QUT TI ............................................................................................3 I/ Tm tt ti: .......................................................................................................................3 Nu l ch 2 th ta phi nhp them thi gian, sau nhn phm ENTER.............................5 CHNG II: ..............................................................................................................................6 GII THIU V CC LINH KIN PHN T S DNG TRONG MCH...................6 I.Vi iu khin PIC16F877A ...................................................................................................6 1. Khi qut v vi iu khin PIC16F877A ............................................................................6 S chn ................................................................................................................................9 S nguyn l...........................................................................................................................9 2. T chc b nh: ..................................................................................................................10 2.1. B nh chng trnh: ......................................................................................................11 2.2. B nh d liu:.................................................................................................................11 2.3. Stack..................................................................................................................................14 3. Khi qut v chc nng ca cc port trong vi iu khin PIC16F877A .......................14 4. Cc vn v Timer ...........................................................................................................16 4.1. Timer0 ..............................................................................................................................16 4.2.TIMER1.............................................................................................................................20 5. NGT (INTERRUPT): ......................................................................................................23 6. Phng php iu ch xung PWM: ..................................................................................28 6.2. Nguyn l ca PWM: .......................................................................................................29 Ud = Umax . (t0/T) hay Ud = Umax.D .........................................................................................30 6.3. Cch thit lp ch PWM cho PIC16F877A..............................................................30 II. Mch cu H ( H-Bridge Circuit ). ....................................................................................32 Hnh 18: Mch cu H ...............................................................................................................32 Kho st hot ng ca mch cu H.........................................................................................32 Hnh19: Nguyn l hot ng ca mch cu H........................................................................33 III/LCD ....................................................................................................................................34 VD: Kiu hin th (1 hng / 2 hng), chiu di d liu (8 bit / 4 bit), .................................36 IV. i tng iu khin: ng c DC ................................................................................41 M hnh th 1 ...........................................................................................................................42 M hnh th 2 ...........................................................................................................................43 CHNG 3:.............................................................................................................................45 I/ THIT K MCH PHN CNG:...................................................................................45 II/ Gii thiu v chng trnh vit code v bin dch: ........................................................49 Return(bin);}...........................................................................................................................50 III/ Lu gii thut: ............................................................................................................51 CODE CHNG TRNH .....................................................................................................55


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Chng I: KHI QUT TI

I/ Tm tt ti:

1/ Gii thiu s lc cc modul ca mch:

-Tn ti n 2:Lp trnh PIC16F877A iu khin tc ng c DC

-Yu cu t ra: Lp trnh C cho Pic 16F877A iu khin tc cho ng c DC c

gn encoder hi tip tc .Tc c ci t t bn phm v tc tc thi hi tip

t encoder c hin th trn mn hnh LCD 16x2.

-Tm tt hng thc hin ti:

S dng Pic 16F877A l vi iu khin trung tm. Dng chng trnh CCS lp trnh C v bin dch chng trnh.

Xy dng khi bn phm gm 16 phm nhp tc v iu khin ng c DC:

10 phm t 0 n 9 ci t tc (vng /phc). 1 phm SET (hay ENTER) lu tc ci t. 1 phm CLEAR xa tc ci t. 1 phm SAVE lu tc vo epprom. 3 phm iu iu khin: quay thun (FORWARD), quay nghich

(REVERSE), dng (STOP).

Hin th tc dng mn hnh LCD 16x2, lp trnh ch 4 bit (s dng 4 chn nhn d liu t Pic).

S dng mch cu H l IC L298N o chiu ng c. S dng 2 knh PWM ca vi iu khin Pic thay i gi tr p trung bnh t

vo ng c iu khin tc .

i tng iu khin l ng c DC 12V c gn Encoder. Ngoi ra trn mch cn c 1 phm ngun (POWER) cp in t adapter cho

mch v 1 phm RESET cho pic 16F877A.


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cp ngun cho mch ta dng adapter AC/DC (220V/12V) v khi ngun s dng IC 7805 n p in p 5V cung cp cho Pic.

2/ S nguyn l mch:

3/Cch vn hnh mch:

Bc 1: Bt ngun (nhn nt POWER), ch cho Pic v mn hnh LCD khi ng, mn hnh

hin th: CHN CH :

Chng trnh c 2 ch lm vic: ch 1 l bm tc t, c lu tc vo

epprom; ch 2 l bm tc c nh thi gian thay i chiu quay.

Bc 2:

b2

a7

b0b1

a4a5a6

p0 p1 p2 p3

p0

p3

p1p2

a7a4 a5 a6b0 b2b1

CCP2CCP1

RA0/AN02

RA1/AN13

RA2/AN2/VREF-/CVREF4

RA4/T0CKI/C1OUT6

RA5/AN4/SS/C2OUT7

RE0/AN5/RD8

RE1/AN6/WR9

RE2/AN7/CS10

OSC1/CLKIN13

OSC2/CLKOUT14

RC1/T1OSI/CCP2 16

RC2/CCP1 17

RC3/SCK/SCL 18

RD0/PSP0 19

RD1/PSP1 20

RB7/PGD 40RB6/PGC 39

RB5 38RB4 37

RB3/PGM 36RB2 35RB1 34

RB0/INT 33

RD7/PSP7 30RD6/PSP6 29RD5/PSP5 28RD4/PSP4 27RD3/PSP3 22RD2/PSP2 21

RC7/RX/DT 26RC6/TX/CK 25

RC5/SDO 24RC4/SDI/SDA 23

RA3/AN3/VREF+5

RC0/T1OSO/T1CKI 15

MCLR/Vpp/THV1

U1

PIC16F877A

C1

30pF

C2

30pF

X1CRYSTAL

R910k

R15k

R25k

R35k

R45k

VCC

VCC

C310uF

R52k2

CCP1CCP2

CLK

1 2 3

4 5 6

7 8 9

0 (10)

FW(16) RV(15) STOP (14)

CLEAR (11)

set (12)

13

D7

14D

613

D5

12D

411

D3

10D

29

D1

8D

07

E6

RW5

RS

4

VSS

1

VD

D2

VEE

3

LCD116_X_2_LCD

RV1

1K

VI1 VO 3

GND

2

U27805

321

J1

JACK C4100uF

C5100nF

C6100uF

C7100nF

D8LED

R261k

+12V +5V

12

J2

TERMINAL2

IN15

IN27

ENA6

OUT1 2

OUT2 3

ENB11 OUT3 13

OUT4 14

IN310

IN412

SENSA1

SENSB15 GND

8

VS

4

VCC

9 U1

L298

+12V

R10.5

R20.5

M1

M2CLK1

2345

J3

SIL-100-05+88.8

D11

N40

07

D21

N40

07D

31N

4007

D41

N40

07

+12V

M1 M2

CLK

RESET

Hnh 1: S nguyn l mch


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Nhp tc t bn phm cc phm t 0 n 9.Nu nhp sai ta nhn phm CLEAR con

tr trn LCD s xa ht cc s nhp, ta phi nhp li t u.Sau khi nhp xong,

nhn phm ENTER lu tc t, tc t c tnh theo n v vng/pht.

Nu l ch 2 th ta phi nhp them thi gian, sau nhn phm ENTER

Bc 3: iu khin ng c ta nhn phm: quay thun (FORWARD), quay nghch

(REVERSE), dng (STOP).

Bc 4: nhp li tc ta nhn phm CLEAR ri tin hnh t tc nh bc 2.

-Tc tc thi ca ng c s c cp nht mi 0,5s v s c so snh vi tc

t a ra tnh hiu iu khin, ng thi c mi 0,5s tc s hin th trn mn

hnh LCD.

4/ Khuyt im ca mch: -Do khng p dng cc phng php iu khin (v d nh: PID, iu khin m,)

nn tc ng c cha c n nh.

-Mch cu H s dng IC L298 ch iu khin c ng c DC c cng sut nh.

-i vi khi hin th, do tnh cht ca mn hnh LCD nn b hn ch quan st gi tr

hin th khong cch xa.

5/ Hng pht trin ti:

- Ci thin n nh tc ng c bng phng php PID hay iu khin m.

- Tnh ton thit k mch cng sut c th iu khin c ng c c cng sut

ln hn.

- S dng led 7 on tng kh nng quan st ca khi hin th.

- Kt ni vi my tnh, s dung visual basic lp trnh iu khin tc ng c

DC.


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CHNG II: GII THIU V CC LINH KIN PHN T S DNG TRONG MCH

I.Vi iu khin PIC16F877A

1. Khi qut v vi iu khin PIC16F877A

a/ Khi qut:

- PIC l tn vit tt ca Programmable Intelligent computer do hng General

Instrument t tn cho con vi iu khin u tin ca h.Hng Micrchip tip tc

pht trin sn phm ny v cho n hng to ra gn 100 loi sn phm khc

nhau.

- PIC16F887A l dng PIC kh ph bin, kh y tnh nng phc v cho hu ht

tt c cc ng dng thc t. y l dng PIC kh d cho ngi mi lm quen vi

PIC c th hc tp v to nn tn v h vi iu khin PIC ca mnh.

- PIC 16F877A thuc h vi iu khin 16Fxxx c cc t tnh sau:

Ngn ng lp trnh n gin vi 35 lnh c di 14 bit. Tt c cc cu lnh thc hin trong 1 chu k lnh ngoi tr 1 s cu lnh r

nhnh thc hin trong 2 chu k lnh. Chu k lnh bng 4 ln chu k dao ng ca

thch anh.

B nh chng trnh Flash 8Kx14 words, vi kh nng ghi xo khong 100 ngn ln.

B nh Ram 368x8bytes. B nh EFPROM 256x8 bytes. Kh nng ngt (ln ti 14 ngun c ngt trong v ngt ngoi).


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Ngn nh Stack c chia lm 8 mc. Truy cp b nh bng a ch trc tip hoc gin tip. Di in th hot ng rng: 2.0V n 5.5V. Ngun s dng 25mA. Cng sut tiu th thp:


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Hnh 2: S nguyn l PIC 16F877A


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b/S chn v s nguyn l ca PIC16F877A

S chn

S nguyn l

Hnh 3: S chn ca PIC 16F877A


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c/Nhn xt:

T s chn v s nguyn l trn, ta rt ra cc nhn xt ban u nh sau :

- PIC16F877A c tt c 40 chn

- 40 chn trn c chia

thnh 5 PORT, 2 chn cp

ngun, 2 chn GND, 2

chn thch anh v mt

chn dng RESET vi

iu khin.

- 5 port ca PIC16F877A

bao gm :

+ PORT B: 8 chn

+ PORT D: 8 chn

+ PORT C: 8 chn

+ PORT A: 6 chn

+ PORT E: 3 chn

2. T chc b nh:

Cu trc b nh ca vi iu khin

PIC16F877A bao gm b nh

chng trnh (Program memory) v

b nh d liu (Data Memory).


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2.1. B nh chng trnh:

B nh chng trnh ca vi iu khin PIC16F877A l b nh flash, dung lng b

nh 8K word (1 word = 14 bit) v c phn thnh nhiu trang (t page0 n page 3) .

Nh vy b nh chng trnh c kh nng cha c 8*1024 = 8192 lnh (v mt lnh

sau khi m ha s c dung lng 1 word (14 bit). m ha c a ch ca 8K word

b nh chng trnh, b m chng trnh c dung lng 13 bit (PC).

Khi vi iu khin c reset, b m chng trnh s ch n a ch 0000h (Reset

vector).Khi c ngt xy ra, b m chng trnh s ch n a ch 0004h (Interrupt

vector). B nh chng trnh khng bao gm b nh stack v khng c a ch ha

bi b m chng trnh.

2.2. B nh d liu:

- B nh d liu ca PIC16F877A

c chia thnh 4 bank. Mi

bank c dng lng 128 byte.

- Nu nh 2 bank b nh d liu ca 8051 phn chia ring bit : 128 byte u tin

thuc bank1 l vng Ram ni ch cha d liu, 128 byte cn li thuc bank 2 l

cng cc thanh ghi c chc nng c bit SFR m ngi dng khng c cha d

liu khc, cn 4 bank b nh d liu ca PIC16F877A c t chc theo cch

khc.

- Mi bank ca b nh d liu PIC16F877A bao gm c cc thanh ghi c chc nng

c bit SFR nm cc cc nh a ch thp v cc thanh ghi mc ch dng

chung GPR nm vng a ch cn li ca mi bank thanh ghi. Vng nh cc

thanh ghi mc ch dng chung ny chnh l ni ngi dng s lu d liu trong

qu trnh vit chng trnh. Tt c cc bin d liu nn c khai bo cha trong

vng a ch ny.

- Trong cu trc b nh d liu ca PIC16F877A, cc thanh ghi SFR no m thng

xuyn c s dng (nh thanh ghi STATUS) s c t tt c cc bank

thun tin trong vic truy xut. S d nh vy l v, truy xut mt thanh ghi no

trong b nh ca 16F877A ta cn phi khai bo ng bank cha thanh ghi ,

Hnh 5: Cu trc b nh chng trnh PIC 16F877A


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vic t cc thanh ghi s dng thng xuyn gip ta thun tin hn rt nhiu trong

qu trnh truy xut, lm gim lnh chng trnh.

Da trn s 4 bank b nh d liu PIC16F877A ta rt ra cc nhn xt nh sau :

-Bank0 gm cc nh c a ch t 00h n 77h, trong cc thanh ghi dng chung

cha d liu ca ngi dng a ch t 20h n 7Fh. Cc thanh ghi PORTA,

PORTB, PORTC, PORTD, PORTE u cha bank0, do truy xut d liu cc

thanh ghi ny ta phi chuyn n bank0. Ngoi ra mt vi cc thanh ghi thng dng

khc ( s gii thiu sau) cng cha bank0

- Bank1 gm cc nh c a ch t 80h n FFh. Cc thanh ghi dng chung c a

ch t A0h n Efh. Cc thanh ghi TRISA, TRISB, TRISC, TRISD, TRISE cng c

cha bank1

- Tng t ta c th suy ra cc nhn xt cho bank2 v bank3 da trn s trn.

Cng quan st trn s , ta nhn thy thanh ghi STATUS, FSR c mt trn c 4

bank. Mt iu quan trng cn nhc li trong vic truy xut d liu ca PIC16F877A

l : phi khai bo ng bank cha thanh ghi .Nu thanh ghi no m 4 bank u cha

th khng cn phi chuyn bank.


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2.2a/ Thanh ghi chc nng c bit SFR: (Special Function Register)

- y l cc thanh ghi c s dng bi CPU hoc c dng thit lp v iu

khin cc khi chc nng c tch hp bn trong vi iu khin. C th phn

thanh ghi SFR lm hai lai: thanh ghi SFR lin quan n cc chc nng bn trong

(CPU) v thanh ghi SRF dng thit lp v iu khin cc khi chc nng bn

ngoi (v d nh ADC, PWM, ).

- Mt s thanh ghi cc nng c bit:

Thanh ghi STATUS (03h, 83h, 103h, 183h):thanh ghi cha kt qu thc hin php ton ca khi ALU, trng thi reset v cc bit chn bank cn truy xut

trong b nh d liu.

Thanh ghi OPTION_REG (81h, 181h): thanh ghi ny cho php c v ghi, cho php iu khin chc nng pull-up ca cc chn trong PORTB, xc lp cc

tham s v xung tc ng, cnh tc ng ca ngt ngoi vi v b m Timer0.

Thanh ghi INTCON (0Bh, 8Bh,10Bh, 18Bh): thanh ghi cho php c v ,cha cc bt iu khin v cc c hiu khi timer0 b trn, ngt ngoi vi

RB0/INT v ngt interrput-on-change ti cc chn ca PORTB.

Thanh ghi PIE1 (8Ch): cha cc bit iu khin chi tit cc ngt ca cc khi chc nang ngoai vi.

Thanh ghi PIR1 (0Ch) cha c ngt ca cc khi chc nng ngoi vi, cc ngt ny c cho php bi cc bit iu khin cha trong thanh ghi PIE1.

Thanh ghi PIE2 (8Dh): cha cc bit iu khin cc ngt ca cc khi chc nng CCP2, SSP bus, ngt ca b so snh v ngt ghi vo b nh EEPROM.

Thanh ghi PCON (8Eh): cha cc c hiu cho bit trng thi cc ch reset


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ca vi iu khin.

2.2b/ Thanh ghi muc ch chung GPR: (General Purpose Register)

Cc thanh ghi ny c th c truy xut trc tip hoc gin tip thng qua thanh ghi

FSG (File Select Register).y l cc thanh ghi d liu thng thng, ngi s dng

c th ty theo mc ch chng trnh m c th dng cc thanh ghi ny cha cc

bin s, hng s, kt qu hoc cc tham s phc v cho chng trnh.

2.3. Stack

- Stack khng nm trong b nh chng trnh hay b nh d liu m l mt vng

nh c bit khng cho php c hay ghi. Khi lnh CALL c thc hin hay khi mt

ngt xy ra lm chng trnh b r nhnh, gi tr ca b m chng trnh PC t ng

c vi iu khin ct vo trong stack. Khi mt trong cc lnh RETURN, RETLW hat

RETFIE c thc thi, gi tr PC s t ng c ly ra t trong stack, vi iu khin

s thc hin tip chng trnh theo ng qui trnh nh trc.

- B nh Stack trong vi iu khin PIC h 16F87xA c kh nng cha c 8 a

ch v hot ng theo c ch xoay vng. Nghia l gi tr ct vo b nh Stack ln th 9

s ghi ln gi tr ct vo Stack ln u tin v gi tr ct vo b nh Stack ln th

10 s ghi ln gi tri6 ct vo Stack ln th 2.

- Cn ch l khng c c hiu no cho bit trng thi stack, do ta khng bit

c khi no stack trn. Bn cnh tp lnh ca vi iu khin dng PIC cng khng

c lnh POP hay PUSH, cc thao tc vi b nh stack s hon ton c iu khin

bi CPU.

3. Khi qut v chc nng ca cc port trong vi iu khin PIC16F877A

a/ PORTA:

Hnh 7: Cu trc thanh ghi chc nng chung ca PIC 16F877A


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-PORTA (RPA) bao gm 6 I/O pin.y l cc chn hai chiu (bidirectional

pin), ngha l c th xut v nhp c.Chc nng I/O ny c iu khin bi thanh

ghi TRISA (a ch 85h). Mun xc lp chc nng ca mt chn trong PORTA l

input, ta set bit iu khin tng ng vi chn trong thanh ghi TRISA v ngc

li, mun xc lp chc nng ca mt chn trong PORTA l output, ta clear bit iu

khin tng ng vi chn trong thanh ghi TRISA. Thao tc ny hon ton tng t

i vi cc PORT v cc thanh ghi iu khin tng ng TRIS (i vi PORTA l

TRISA, i vi PORTB l TRISB, i vi PORTC l TRISC, i vi PORTD l

TRISD vi vi PORTE l TRISE).

-Ngoi ra, PORTA cn c cc chc nng quan trng sau :

Ng vo Analog ca b ADC : thc hin chc nng chuyn t Analog sang Digital

Ng vo in th so snh Ng vo xung Clock ca Timer0 trong kin trc phn cng : thc hin

cc nhim v m xung thng qua Timer0

Ng vo ca b giao tip MSSP (Master Synchronous Serial Port) - Cc thanh ghi SFR lin quan n PORTA bao gm:

PORTA (a ch 05h) : cha gi tr cc pin trong PORTA.

TRISA (a ch 85h) : iu khin xut nhp.

CMCON (a ch 9Ch) : thanh ghi iu khin b so snh.

CVRCON (a ch 9Dh) : thanh ghi iu khin b so snh in p.

ADCON1 (a ch 9Fh) : thanh ghi iu khin b ADC.

b/PORTB:

- PORTB (RPB) gm 8 pin I/O. Thanh ghi iu khin xut nhp tng ng l

TRISB.

- Bn cnh mt s chn ca PORTB cn c s dng trong qu trnh np

chng trnh cho vi iu khin vi cc ch np khc nhau. PORTB cn lin

quan n ngt ngoi vi v b Timer0. PORTB cn c tch hp chc nng in

tr ko ln c iu khin bi chng trnh.

- Cc thanh ghi SFR lin quan n PORTB bao gm:


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PORTB (a ch 06h, 106h) : cha gi tr cc pin trong PORTB

TRISB (a ch 86h, 186h) : iu khin xut nhp

OPTION_REG (a ch 81h, 181h): iu khin ngt ngoi vi v b Timer0.

c/PORTC:

PORTC c 8 chn v cng thc hin c 2 chc nng input v output di s iu

khin ca thanh ghi TRISC tng t nh hai thanh ghi trn.

Ngoi ra PORTC cn c cc chc nng quan trng sau :

- Ng vo xung clock cho Timer1 trong kin trc phn cng

- B PWM thc hin chc nng iu xung lp trnh c tn s, duty cycle: s

dng trong iu khin tc v v tr ca ng c v.v.

- Tch hp cc b giao tip ni tip I2C, SPI, SSP, USART

d/PORTD:

-PORTD c 8 chn. Thanh ghi TRISD iu khin 2 chc nng input v output ca

PORTD tng t nh trn.PORTD cng l cng xut d liu ca chun giao tip song

song PSP (Parallel Slave Port).

-Cc thanh ghi lin quan n PORTD bao gm:

Thanh ghi PORTD: cha gi tr cc pin trong PORTD.

Thanh ghi TRISD: iu khin xut nhp.

Thanh ghi TRISE: iu khin xut nhp PORTE v chun giao tip PSP.

e/PORTE:

-PORTE c 3 chn.Thanh ghi iu khin xut nhp tng ng l TRISE.Cc chn

ca PORTE c ng vo analog Bn cnh PORTE cn l cc chn iu khin ca

chun giao tip PSP.

-Cc thanh ghi lin quan n PORTE bao gm:

PORTE: cha gi tr cc chn trong PORTE.

TRISE: iu khin xut nhp v xc lp cc thng s cho chun giao tip PSP.

ADCON1: thanh ghi iu khin khi ADC.

4. Cc vn v Timer PIC16F877A c tt c 3 timer : timer0 (8 bit), timer1 (16 bit) v timer2 (8 bit).

4.1. Timer0

a/ L b nh thi hoc b m c nhng u im sau:


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8 bit cho b nh thi hoc b m. C kh nng c v vit. C th dng ng bn trong hoc bn ngoi. C th chn cnh xung ca xung ng h. C th chn h s chia u vo (lp trnh bng phn mn). Ngt trn.

b/ Hot ng ca Timer 0:

Timer 0 c th hot ng nh mt b nh thi hoc mt b m.Vic chn b nh thi hoc b m c th c xc lp bng vic xo hoc t bt TOCS

ca thanh ghi OPTION_REG.

Nu dng h s chia xung u vo th xo bit PSA ca thanh ghi OPTION_REG.

Trong ch b nh thi c la chn bi vic xo bit T0CS (OPTION REG), n s c tng gi tr sau mt chu k lnh nu khng chn h s

chia xung u vo.V gi tr ca n c vit ti thanh ghi TMR0.

Khi dng xung clock bn ngoi cho b nh thi Timer0 v khng dng h s chia clock u vo Timer0 th phi p ng cc iu kin cn thit c th

hot ng l phi bo m xung clock bn ngoi c th ng b vi xung

clock bn trong (TOSC).

H s chia dng cho Timer 0 hoc b WDT. Cc h s nay khng c kh nng c v kh nng vit. chn h s chia xung cho b tin nh ca Timer0

hoc cho b WDT ta tin hnh xo hoc t bt PSA ca thanh ghi

OPTION_REG

Nhng bt PS2, PS1, PS0 ca thanh ghi OPTION_REG dng xc lp cc h s chia.

B tin nh c gi tr 1:2 chng hn, c ngha l : bnh thng khng s dng b tin nh ca Timer0 (ng ngha vi tin nh t l 1:1) th c khi c tc

ng ca 1 xung clock th timer0 s tng thm mt n v. Nu s dng b tin

nh 1:4 th phi mt 4 xung clock th timer0 mi tng thm mt n v. V

hnh chung, gi tr ca timer0 (8 bit) lc ny khng cn l 255 na m l

255*4=1020.


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c/ Ngt ca b Timer0 Ngt ca b Timer 0 c pht sinh ra khi thanh ghi TMR0 b trn tc t

FFh quay v 00h.Khi bt T0IF ca thanh ghi INTCON s c t.

Bt ny phi c xa bng phn mm nu cho php ngt bit T0IE ca

thanh ghi INTCON c set.Timer0 b dng hot ch SLEEP

ngt Timer 0 khng nh thc b x l ch SLEEP.

d/ Cc thanh ghi lin quan n Timer0 bao gm:

- Thanh ghi OPTION_REG : iu khin hot ng ca Timer0

bit 5 TOCS la chn ngun clock 1=Clock ngoi t chn T0CKI 0=Clock trong Focs/4

bit 4 T0SE bit la chon sn xung clock 1=Timer 0 tng khi chn T0CKI t cao xung thp(sn xung) 0=Timer 0 tng khi chn T0CKI t thp ln cao(sn xung)

bit 3 PSA bit gn b chia xung u vo 1=gn b chia Prescaler cho WDT 0=gn b chia Prescaler cho Timer 0

bit 2:0 PS2:PS1 la chn h s chia h s xung theo bng sau:

PS2:PS0

Timer0

WDT

000 1:2 1:1 001 1:4 1:2 010 1:8 1:4 011 1:16 1:8 100 1:32 1:16

Hnh 8: Cu trc thanh ghi OPTION_REG REGISTER iu khin hot ng ca Timer0


SVTH:Trn Tng Bng

V Vn Chnh

19

101 1:64 1:32 110 1:128 1:64 111 1:256 1:128

- Thanh ghi TMR0 i ch 01h v 101h : cha gi tr ca b nh thi Timer0

- Thanh ghi INTCON : cho php ngt hot ng

Thanh ghi cha cc bit iu khin v cc bt c hiu khi timer0 b trn, ngt ngoi

vi RB0/INT v ngt interrupt_on_change ti cc chn ca PORTB.

Bit 7 GIE Global Interrupt Enable bit GIE = 1 cho php tt c cc ngt.

GIE = 0 khng cho php tt c cc ngt.

Bit 6 PEIE Pheripheral Interrupt Enable bit PEIE = 1 cho php tt c cc ngt ngoi vi.

PEIE = 0 khng cho php tt c cc ngt ngoi vi.

Bit 5 TMR0IE Timer0 Overflow Interrupt Enable bit TMR0IE = 1 cho php ngt Timer0.

TMR0IE = 0 khng cho php ngt Timer0.

Bit 4 RBIE RB0/INT External Interrupt Enable bit RBIE = 1 cho php tt c cc ngt ngoi vi RB0/INT

RBIE = 0 khng cho php tt c cc ngt ngoi vi RB0/INT

Bit 3 RBIE RB Port change Interrupt Enable bit RBIE = 1 cho php ngt RB Port change

RBIE = 0 khng cho php ngt RB Port change

Bit 2 TMR0IF Timer0 Interrupt Flag bit TMR0IF = 1 thanh ghi TMR0 b trn (phi xa c hiu bng chng

trnh).

Hnh 9: Cu trc thanh ghi INTCON cho php ngt Timer0 hot ng


SVTH:Trn Tng Bng

V Vn Chnh

20

TMR0IF = 0 thanh ghi TMR0 cha b trn.

Bit 1 INTF BR0/INT External Interrupt Flag bit INTF = 1 ngt RB0/INT xy ra (phi xa c hiu bng chng trnh).

INTF = 0 ngat RB0/INT cha xay ra.

Bit 0 RBIF RB Port Change Interrupt Flag bit RBIF = 1 t nht c mt chn RB7:RB4 c s thay i trng thi. Bt ny

phi c xa bng chng trnh sau khi kim tra li cc gi tr chn

ti PORTB.

RBIF = 0 khng c s thay i trng thi cc chn RB7:RB4.

4.2.TIMER1

a/Timer1 l b nh thi 16 bit, gi tr ca Timer1 s c lu trong hai thanh ghi 8

bit TMR1H:TMR1L. C ngt ca Timer1 l bit TMR1IF, bit iu khin ca Timer1 l

TRM1IE.Cp thanh ghi ca TMR1 s tng t 0000h ln n FFFFh ri sau trn v

0000h. Nu ngt c cho php, n s xy ra khi khi gi tr ca TMR1 trn t FFFFh

ri v 0000h, lc ny TMR1IF s bt ln.

b/ Timer1 c 3 ch hot ng :

Ch hot ng nh thi ng b: Ch c la chn bi bit TMR1CS. Trong ch ny xung cp cho Timer1 l Fosc/4, bit T1SYNC khng c tc

dng.

Ch m ng b: trong ch ny, gi tr ca timer1 s tng khi c xung cnh ln vo chn T1OSI/RC1. Xung clock ngoi s c ng b vi xung

clock ni, hot ng ng b c thc hin ngay sau b tin nh t l xung

(prescaler).

Ch m bt ng b:ch ny xy ra khi bit T1SYNC c set. B nh thi s tip tc m trong sut qu trnh ng (Sleep) ca vi iu khin v c kh

nng to mt ngt khi b nh thi trn v lm cho vi iu khin thot khi

trng thi ng.

c/ Cc thanh ghi lin quan n Timer1 bao gm:

INTCON (a ch 0Bh, 8Bh, 10Bh, 18Bh): cho php ngt hot ng (2 bit GIE v PEIE).

PIR1 (a ch 0Ch): cha c ngt Timer1 (TMR1IF).

dong_co_dc_1207

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