22FDXTM Enabling IoT Growth
Tim Dry, (for Jamie Schaeffer, Ph.D). Leading Edge Product Line Management GLOBALFOUNDRIES
The First Truly Global Foundry
2
5 Manufacturing Centers on 3 Continents
Singapore Dresden, Germany
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Company Highlights
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East Fishkill
Singapore
Dresden Malta
Burlington
300mm
200K Wafers/Mo
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133K Wafers/Mo
MORE THAN
FAB LOCATIONS FAB CAPACITY
~6B* 25,000 Patents &
Applications
2nd Largest Foundry
Trusted Foundry
*Based upon analysts’ estimates
250
Customers
18,000
Employees
Typical IoT Edge Node Chipset
What Will it Take to Make IoT Take Off?
GLOBALFOUNDRIES 4
Today: 20+ components
on MCM/PCB
Security Integration
Future IoT Edge Nodes
Power Cost
IoT Edge Nodes 2015 Specification
Low-End Low MCU, Analog
Mid-Range Mid/High-end MCU
High-End MPU
Examples Smart lighting, Building sensors
Smart meters, Health and fitness monitors
Smart glasses, Smart Watches
Primary Requirements
Cost Power
Power Performance Cost
Performance Power Cost
Processing Requirements
Low end <24MHz e.g. 8 bit, ARM CM0, ARC APEX
Mid end <240MHz e.g. 16/32bit ARM CM0, 4F, 7, MIPs, ARC
High end <1.5Ghz e.g. 32/64bit ARM CM A7, MIPS, HMI/Image processing
Memory OTP/MTP/eNVM/SRAM <128Kbyte Flash
eNVM 128K to 4MByte Flash External NOR, NAND Flash and DDR Memory
Connectivity 802.15.4/Thread/ BT Smart/ <1GHz
802.15.4/ZigBee / BT Smart/<1GHz
3G/4G/LTE, WiFi / BT / 802.15.4 (Off-chip 2015)
Power Active: 50uA/MHz Sleep: 1uA (tbc) Stop: 10nA (tbc)
Active: 350uA/MHz (CPU) Sleep: 10uA Stop: 300nA
Active: 500uA/MHz Sleep: 100uA Stop: 500nA
Battery life 2015 2years Smoke detector Gas Meter 10years Wristband 3 days
Smart watch 4 days
GLOBALFOUNDRIES Confidential 5
IoT Edge Nodes 2015 Specification
Low-End Low MCU, Analog
Mid-Range Mid/High-end MCU
High-End MPU
Examples Smart lighting, Building sensors
Smart meters, Health and fitness monitors
Smart glasses, Smart Watches
Primary Requirements
Cost Power
Power Performance Cost
Performance Power Cost
Processing Requirements
Low end <24MHz e.g. 8 bit, ARM CM0, ARC APEX
Mid end <240MHz e.g. 16/32bit ARM CM0, 4F, 7, MIPs, ARC
High end <1.5Ghz e.g. 32/64bit ARM CM A7, MIPS, HMI/Image processing
Memory OTP/MTP/eNVM/SRAM <128Kbyte Flash
eNVM 128K to 4MByte Flash External NOR, NAND Flash and DDR Memory
Connectivity 802.15.4/Thread/ BT Smart/ <1GHz
802.15.4/ZigBee / BT Smart/<1GHz
3G/4G/LTE, WiFi / BT / 802.15.4 (Off-chip 2015)
Power Active: 50uA/MHz Sleep: 1uA (tbc) Stop: 10nA (tbc)
Active: 350uA/MHz (CPU) Sleep: 10uA Stop: 300nA
Active: 500uA/MHz Sleep: 100uA Stop: 500nA
Battery life 2015 2years Smoke detector Gas Meter 10years Wristband 3 days
Smart watch 4 days
GLOBALFOUNDRIES Confidential 6
IoT Edge Nodes 2015 Specification
Low-End Low MCU, Analog
Mid-Range Mid/High-end MCU
High-End MPU
Examples Smart lighting, Building sensors
Smart meters, Health and fitness monitors
Smart glasses, Smart Watches
Primary Requirements
Cost Power
Power Performance Cost
Performance Power Cost
Processing Requirements
Low end <24MHz e.g. 8 bit, ARM CM0, ARC APEX
Mid end <240MHz e.g. 16/32bit ARM CM0, 4F, 7, MIPs, ARC
High end <1.5Ghz e.g. 32/64bit ARM CM A7, MIPS, HMI/Image processing
Memory OTP/MTP/eNVM/SRAM <128Kbyte Flash
eNVM 128K to 4MByte Flash External NOR, NAND Flash and DDR Memory
Connectivity 802.15.4/Thread/ BT Smart/ <1GHz
802.15.4/ZigBee / BT Smart/<1GHz
3G/4G/LTE, WiFi / BT / 802.15.4 (Off-chip 2015)
Power Active: 50uA/MHz Sleep: 1uA (tbc) Stop: 10nA (tbc)
Active: 350uA/MHz (CPU) Sleep: 10uA Stop: 300nA
Active: 500uA/MHz Sleep: 100uA Stop: 500nA
Battery life 2015 2years Smoke detector Gas Meter 10years Wristband 3 days
Smart watch 4 days
GLOBALFOUNDRIES Confidential 7
Connected Edge Node MCU + RF Mid/High End
November 14, 2015
CM0+ Peripherals,
GPIO
Clocks, OCO Power modes
eNVM, MTP Density, speed,
reliability, duration
LV SRAM
Multi-Standard Radio(s)
BT Smart, 802.15.4
HMI: Audio Touch Display
Color TFT LCD
FIFO
Customer Own IP
PHY
Security Authorization, Crypto,
Unique ID, Key gen and vault,
PMIC [DC-DC, LDOs] Power Islands
Network-on-Chip (NOC)
Big Little: Big: M4F/7F Little: M0+
On Chip Oscillator Fast wake Clock trees
On chip Power supplies to
“Power Islands”. In conjunction with NoC and
clocks
Sensor hub with “always listening” sensor interface that runs at low power while rest
of system asleep, and
wakes up system on correct events
Low Voltage SRAM.
Low leakage Retention area/
NoC
Sensor Hub
Reduced Total System power allows more
power for Transmit and
Receive, enabling better Link budget and
robust communications
CM4/7F Peripherals,
GPIO
Always listening
Enabling Low power
Total System Power – Active and Standby
6/11/2015 9
Fast wake up OCO
Faster process time
Power modes Retain SRAM Low leakage memories
Reduce Vdd HW accelerators, intelligent peripherals, offload engines and sensor hubs
Reduce static power
Reduce RF power
Tim Dry
28nm Super low power
55, 40, 28nm Ultra low power
55nm, 40nm Ultra low leakage
High Duty Cycle Low Static Power
High Performance Low Dynamic Power
Duty Cycle Sleepy Chatty
Processing Performance
High
Low
Varying Requirements of IoT Edge Nodes
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Wireless Smart Meters
Wildlife Camera
Building Sensors
High-end Wearables
IP Security Cameras
Trackers (Asset, People..) Low-end
Wearables Health and Fitness
Monitors
Smart Lighting
Drones, Robotics,
3D Printing
Edge Gateways
Home Automation
Duty Cycle Low
Standby: 83%
Active: 17%
Duty Cycle High
Active: 95%
Standby: 5%
Introducing 22FDX™ Platform
• Industry’s first 22nm fully-depleted silicon-on-insulator (FD-SOI) technology
• Delivers FinFET-like performance and power-efficiency at 28nm cost
• Ultra-lower power consumption with 0.4 volt operation
• Software-controlled transistor body-biasing for flexible trade-off between performance and power
• Integrated RF for reduced system cost and back-gate feature to reduce RF power up to ~50%
• Enables applications across mobile, IoT and RF markets
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Ultra-thin Buried Oxide Insulator
Fully Depleted Channel for Low Leakage
FD-SOI Planar process similar to bulk
70% lower power than 28HKMG 20% smaller die than 28nm bulk planar 20% lower die cost than 16/14nm
Body-Biasing Provides Greatest Design Flexibility
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-2V to +2V Body-Biasing
• Forward BB (FBB) enables low voltage operation down to 0.4v without speed loss
• Reverse BB (RBB) enables low leakage down to 1pA/micron
• Dynamic body biasing enables active tradeoff of performance vs. power
• Improve within die or die-to-die uniformity
• Post-Silicon Tuning/Trimming
Body-Biasing Enables Power/Performance Trade-off
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Max Frequency
Leakage Power
Reverse Body Bias (RBB)
Forward Body Bias (FBB)
Maximum Performance Operating Mode
Minimum Leakage In Standby Mode
Body-Bias Provides a New Dimension to Optimize for Power and Performance
Rel
ativ
e Le
akag
e P
ower
Relative Active Power
Best perf./watt 1x Fmax
0 0.5 1.5 2
0.1
0.01
1
Best performance 1.6x Fmax
No BB
Lowest total power 0.5x Fmax
2.5
10
100
-60mV Vt Fwd Body-Bias
+60mV Vt Rev Body-Bias
Vdd+100mV
Vdd-100mV 1x Fmax
22FDX™ Benefits RF Applications
• RF/Analog designers use Gate Length (Lg) greater than Lg (min) to improve matching and gain.
– FD device gives higher self gain than bulk at the same Lg
– FD enables shorter (20nm) Lg that increases gM and fT performance
– HKMG enables low Tinv and high channel charge
• Planar structure allows for lower Rsd and Rg compared to Finfet
• Local Back Gate bias give dynamic control of threshold voltage for innovative circuits
• SOI structure allows more flexible layout reducing overall parasitism at larger pitch
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The plot indicates that 22FDX has superior self gain and higher fT than 28nm bulk at larger Lg
from 20 – 100nm. (For a Gm/I =15, a moderate inversion)
RF Circuit Benefits for 22FDX™
• 22FDX is an Independent-Multi-Gate (IMG) Technology • Back-gate utilized to optimize bias current and transconductance • Free up front-gate voltage for signal path dynamic range • Eliminate bias circuitry losses of single-gate technologies such as bulk
and FinFET GLOBALFOUNDRIES Confidential 16
Reverse-back-gate biasing optimizes gain efficiency while maintaining dynamic range
Conventional approach (non IMG) Approach w/ IMG
22FDX™ Base Platform and Extensions
• 22FDX Base Platform – 4 Core Vts (FBB & RBB) – 2 IO Vts @ 1.2/1.5/1.8v – Passives – SRAMs (HD, HC, LV, ULV,
TP) – 8T/12T libraries – IP solutions for IoT, Mobile,
and RF – Software controlled Fwd/
Rev body-bias
GLOBALFOUNDRIES Confidential 17
-ulp adds logic libraries and memory compiler optimized for 0.4v logic operation
-ull adds devices, libraries, and memory compilers to achieve 1pA/um leakage
-uhp adds optimized BEOL stacks, 12T libraries optimized at OD, high-speed SERDES (16/28GHz), and MIM capacitor
-rfa adds RF enablement , BEOL passives, and IP for BTLE, WiFi
Base platform PDK & IP Application-optimized extensions
Relative Fmax 1.0 0.8 0.6 0.4 0.2 1.2
22FDXTM Offers 3 Types of Transistors, Optimized for Performance vs. Power
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SLVT/LVT • Lowest VT • Optimized for FBB • Highest performance
RVT/HVT • Mid-range VT • Optimized for RBB • Balance of low leakage
and high performance ULL • Adds triple gate oxide layer • Longer gate length • Coupled with RBB
achieves ≈1pA/um leakage
22FDX™ Provides FinFET-like Power Efficiency
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Forward Body-Bias (FBB) Extends FD-SOI Flexibility
Frequency vs. Total Power 1.80
1.60
1.40
1.20
1.00
0.80
0.60 0.40 0.60 0.80 1.00 1.20 1.40
Total Power (normalized)
Freq. (normalized)
• 50% lower power at same frequency
• 40% faster performance at same power
• Same performance at lower Vdd
• FBB Advantage: Software-controlled body-bias enables dynamic tradeoffs between power, performance and leakage
28HKMG
22FDX 30% Faster
50% Less Power
40% Faster
50% Less Power
RO-Based Metric: INV2, NAND2x1, NOR2x1, NAND3x1 (each one has its own RO) Wire load is added in each stage of RO (FO = 3) Delay / Iddq is estimated by taking weighted average of 4 ROs Delay/Iddq metric = (0.4*INV+0.2*NAND2+0.2*NOR2+0.2*NAND3) Iddq / Delay is estimated @ tt, 25C 70% dynamic and 30% Static Power for Total Power estimation.
IoT Example: Remote Security Camera Application
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Optimize Standby and Dynamic Power
22FDX Delivers: 10x lower static power w/ Reverse body-bias Up to 92% lower active power with forward body-bias RF integration for reduced BOM cost and 50% lower power
Wakes up Image Processor to zoom in and analyze potential threat
Detects motion
Wakes up comms to transmit message
22FDX die
Integrated RF
Wireless Comms
High Performance Application Processor
“Watchdog” Processor
FBB for lowest dynamic power
RBB for lowest leakage
FDSOI Case Study – Smart Watch
• Next Generation Device Specification • CPU Freq. 1.5+ GHz Vdd 0.6v • SRAM up to 16Mb
• -25C to +85C • Integration Path: BLE, WiFi, PMIC
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Ingenic 40nm Device today
Smart Watch User Case
40LP 28SLP FinFet FD FD+FBB FD+FBB+BLE
FD+FBB +BLE+WiFi
Power @ ISO Freq 1 0.71 0.39 0.33 0.23 0.23 0.23
Freq. @ ISO power 1 1.56 2.80 2.55 2.97 2.97 2.97
mW/Day (active and static)
334 238.6 131.2 109.7 76.3 85.9 108.3
Battery Life (Days) 4.55 6.37 11.58 13.85 19.91 17.7 14
Battery Life ISO 1 1.4 2.5 3.0 4.4 3.8 3.1
Battery life increases from 4.5 to 14+ days.
22FDX™ Lower Power on ARM M0
• FDSOI has significant PPA advantage over bulk on low-end M0 applications
GLOBALFOUNDRIES Confidential 22
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
9T-1.2v 9T-1.1v 9T-1.0v 8T-0.8v
GF55LP GF40LP GF28SLP 22FDX
1
0.85
0.47
0.15
1 0.97
0.23 0.14
Dynamic Power
Std Cell Area
• Timing signoff frequency @ 100MHz under SS corner • Leakage/Dynamic power @ typical corner 25C • Zero body bias on 28/22FD
Source: VeriSilicon
-70% power reduction -40% area reduction
-82% power reduction -85% area reduction
28nm Super low power
55, 40, 28nm Ultra low power
55nm, 40nm Ultra low leakage
High Duty Cycle Low Static Power
High Performance Low Dynamic Power
Duty Cycle Sleepy Chatty
Processing Performance
High
Low
Varying Requirements of IoT Edge Nodes
GLOBALFOUNDRIES Confidential 23
Wireless Smart Meters
Wildlife Camera
Building Sensors
High-end Wearables
IP Security Cameras
Trackers (Asset, People..) Low-end
Wearables Health and Fitness
Monitors
Smart Lighting
Drones, Robotics,
3D Printing
Edge Gateways
Home Automation
Duty Cycle Low
Standby: 83%
Active: 17%
Duty Cycle High
Active: 95%
Standby: 5%
Easy Design Migration from Bulk to 22FDX™
• Digital Design Flow is similar to bulk digital design flow
• The differences are taken care of in our Reference Flow releases
• Reference flow is test-chip proven and available today
24 Bulk Flow New Step for 22FDX
Design Planning (FBB vs RBB)
Library Char + POCV/LVF variability
Lib char with BB (Added corners)
RTL Synthesis UPF Connectivity
Cell placement + Tapcell Placement +
CTS pre-route Implant-aware +
CNRX Placement
Routing Optimization Tapcell connections (BB mesh + HV rules)
Leakage recovery w/ Vt swapping + Lgate
optimization
Optional: use FBB/RBB performance/power
optimization
Sign-Off PEX/STA (+DPT extraction)
Optional: Add sign-off corners for dynamic BB
variables (PVTB)
Physical Verification + EMIR
In-Design Modules (DRC + PM + MetalFill +
EMIR)
22FD
X D
igita
l Des
ign
Flow
GLOBALFOUNDRIES
Test Chip Proven
22FDX™ has lower process complexity and faster cycle times than FinFET technology
• 22FDX has 50% fewer immersion lithography steps than FinFET – Fewer Well and Post-Gate process steps than 28nm Poly/SiON – Avoids complex Fin, Post-gate, RMG, MOL, and BEOL integration in FinFET
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Process Complexity (a.u.)
28Poly/SiON 22FDX FinFET
Far_BEOL BEOL MOL RMG Post_Gate Gate Wells Active Fin
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Design Services
EDA
IP
Industry Groups
Supply Chain
22FDX Ecosystem Expanding
Summary
• Industry's first 22nm FD-SOI platform
• Enables FinFET-like performance and power efficiency at 28nm cost
• Provides design flexibility and intelligent control
• Optimized for Mobile, Consumer, IoT and RF
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