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컴퓨터 구조 강좌개요
순천향대학교 컴퓨터학부이 상 정
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교 재
• J.L.Hennessy & D.A.Patterson• Computer Architecture a Quantitative
Approach , Second Edition 1996, Morgan
Kaufmann Publishers
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Internet Site
• 강좌http://archi-cse.sch.ac.kr/people/sjlee/default.htm#courses
• 교재 http://www.mkp.com/books_catalog/1-55860-270-4.asp
• Patterson's Lecture http://wwwinst.EECS.Berkeley.EDU:80/~cs152/fa97/index_lectures.html http://www.cs.berkeley.edu/~pattrsn/252S98/index.html
• DLX Softwareftp://max.stanford.edu/pub/hennessy-patterson.software
• WinDLX ftp://mkp.com/pub/dlx/
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평가 및 강의
• 출석 20%
• 시험 50%
• 발표 30%
• Powerpoint 강의
• 1 회 발표 : 관련 논문 , Tool
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강의목표
• 컴퓨터 구조의 design techniques, machine structures, technology factors, evaluation methods 등을 이해
Technology ProgrammingLanguages
OperatingSystems History
ApplicationsInterface Design
(ISA)
Measurement & Evaluation
Parallelism
Computer Architecture: - Instruction Set Design - Organization - Hardware
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What is “Computer Architecture”?
I/O systemInstr. Set Proc.
Compiler
OperatingSystem
Application
Digital DesignCircuit Design
Instruction Set Architecture
Firmware
•많은 abstraction levels 의 조정 ,인터페이스•Design, Measurement, and Evaluation
Datapath & Control
Layout
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The Instruction Set: a Critical Interface
instruction set
software
hardware
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Example ISAs (Instruction Set Architectures)
•Digital Alpha (v1, v3) 1992-97
•HP PA-RISC (v1.1, v2.0) 1986-96
•Sun Sparc (v8, v9) 1987-95
•SGI MIPS (MIPS I, II, III, IV, V)1986-96
•Intel (8086,80286,80386, 1978-96
80486,Pentium, MMX, ...)
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Organization
Logic Designer's View
ISA Level
FUs & Interconnect
•기능요소 (Functional Units) (e.g., Registers, ALU, Shifters,
Logic Units, ...)•이들 요소의 상호 연결구성 (interconnection)•각 요소 간의 information flows
•information flow을 제어하는 로직
•ISA를 실현하기 위한 FUs의 구성•Register Transfer Level (RTL) Description
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Example Organization
•TI SuperSPARCtm TMS390Z50 in Sun SPARCstation20
Floating-point Unit
Integer Unit
InstCache
RefMMU
DataCache
StoreBuffer
Bus Interface
SuperSPARC
L2$
CC
MBus Module
MBus
L64852 MBus controlM-S Adapter
SBus
DRAM Controller
SBusDMA
SCSIEthernet
STDIO
serialkbdmouseaudioRTCBoot PROMFloppy
SBusCards
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Computer Architecture Topics
Instruction Set Architecture
Pipelining, Hazard Resolution,Superscalar, Reordering, Prediction, Speculation,Vector, DSP
Addressing,Protection,Exception Handling
L1 Cache
L2 Cache
DRAM
Disks, WORM, Tape
Coherence,Bandwidth,Latency
Emerging TechnologiesInterleavingBus protocols
RAID
VLSI
Input/Output and Storage
MemoryHierarchy
Pipelining and Instruction Level Parallelism1,2,3,4 장
5 장
6 장
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Computer Architecture Topics
M
Interconnection NetworkS
PMPMPMP….
Topologies,Routing,Bandwidth,Latency,Reliability
Network Interfaces
Shared Memory,Message Passing,Data Parallelism
Processor-Memory-Switch
MultiprocessorsNetworks and Interconnections
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