ece 497 js lecture - 11 modeling devices for sijsa.ece.illinois.edu/ece497js/lect_11.pdf · title:...

1Copyright © by Jose E. Schutt-Aine , All Rights ReservedECE 497-JS, Spring 2004

ECE 497 JS Lecture - 11Modeling Devices for SI

Spring 2004

Jose E. Schutt-AineElectrical & Computer Engineering

University of [email protected]


Tuesday March 2nd Speaker:

Carl Werner

Rambus Inc., Los Altos, CA

Thursday Feb 26th

NO CLASS

Announcements


Zo

ZoC

- Loads are nonlinear- Need to model reactive elements in the time domain- Generalize to nonlinear reactive elements

Motivations


dvi Cdt

=

Time-Domain Model for Linear Capacitor

For linear capacitor C with voltage v and current i which must satisfy

Using the backward Euler scheme, we discretize time and voltage variables and obtain at time t = nh

'1 1n n nv v hv+ += +


11' n

nivC+

+ =

11

nn n

iv v hC+

+ = +

1 1 - n n nC Ci v vh h+ +=

After substitution, we obtain

so that

The solution for the current at tn+1 is, therefore,



i

v C

Backward Euler companion model at t=nh Trapezoidal companion model at t=nh


vnC/hvn+1

+

-

R=h/C

in+1

vn2C/h+invn+1

+

-

R=h/(2C)

in+1


Step response comparisons

0 10 20 30 40 50 600.0

0.1

0.2

0.3

0.4

ExactBackward EulerTrapezoidal

Time (ns)

Vo

(vol

ts)


div Ldt

=

1 1: n n nBackward Euler i i hi+ +′= +

11

nn

viL+

+′ =

1 1n n nL Lv i ih h+ += −

i

V+

-⇒

R=

Vn+1+

-

in+1

L

Lh

-

+Lh

i n

Time-Domain Model for Linear Inductor


[ ]1 12n n n nhi i i i+ +′ ′= + +

1 12 2

n n nL Lv i vh h+ +

= − +

⇒

R=

Vn+1

+

-

in+1

-

+

2Lh

2Lh

in + Vn

i

V+

-L

If trapezoidal method is applied

Time-Domain Model for Linear Inductor


Newton-Raphson MethodProblem: Wish to solve for f(x)=0

Use fixed point iteration method:

( ) ( ) ( )Define F x x K x f x= −

1: ( ) ( ) ( )k k k k kx F x x K x f x+ℑ = = −

With Newton Raphson:1

1( ) [ ( )] dfK x f xdx

−− ′= =

therefore, 11: [ ( )] ( )k k k kx x f x f x−+ ′ℑ = −


NEWTON-RAPHSON ALGORITHM(graphical interpretation)

f(x)

f(xk+1)

f(xk)Pk+1

xk+1 xk xQ

slope

Pk


( )11: k k k kN R x x A f x−+− = −

1 ( ) .k k k k k kA x A x f x S+ = − ≡

xk+1 is the solution of a linear system of equations. LU factk kA x S= ←

Forward and backward substitution.

Ak is the nodal matrix for Nk

Sk is the rhs source vector for Nk.

Newton-Raphson Algorithm


N-R Algorithm

} }

0 00. 0, ,voltage controlled current controlled

k gives V i→1. , mod .k kFind V i compute companion els

{, , ,c c

k k k kV C

G I R E123

2. , .k kObtain A S

3. .k k kSolve A x S=

14. kx Solution+ ←

15. .k kCheck for convergence x x ε+ − <, .If they converge then stop

6. 1 , 1.k k and go to step+ →


Application to Diode Circuit

I

VV*

I*

diode

load line

/ ( ) ( -1)tV Vs

V Ef V I eR−

= +

E

R

I

V

+

-


It is obvious from the circuit that the solution must satisfyf(V) = 0 We also have

/1'( ) tV Vs

t

If V eR V

= +

The Newton method relates the solution at the (k+1)th step to the solution at the kth step by

1( )- '( )

kk k

k

f VV Vf V+ = +

( )/ 1

1/

- 1

V Vk t

k t

k es

k kV Vs

t

V E IRV V I eR V

−

+

−+

=+

NR- Diode


Newton-Raphson (cont’)

After manipulation we obtain

11 -k k k

Eg V JR R+

+ =

/ k tV Vsk

t

Ig eV

=

/ ( -1) -k tV Vk s k kJ I e V g=


Newton-Raphson representation of diode circuit at kth iteration

/k tV Vsk

t

Ig eV

=

/ ( -1) - Vk Vtk s k kJ I e V g=

Newton-Raphson for Diode

gk Jk

ik+1

vk+1

R

E +-

-

+


Current Controlled

+

-V

i

ik

V

I

Companion

+

-

Rk

Ek

+

-

( )

k

ki i

dh iRdi =

= ( )k k k kE h i R i= −


For a General NetworkLet x = vector variables in the network to be solved for. Let f(x) = 0 be the network equations. Let xk be the present iterate, and define

Let Nk be the linear network where each non-linear resistor is replaced by its companion model computed from xk.

( )k k kA f x Jacobian of f at x x′= → =

j -

j ++

-Vj

ij

( )j j jI g V=


jk j k j kV P P+ −= −j -

j +

IkGk

Vk

I

V

( )

k

kV V

dg VGdV =

= [ ]k k k kI g V G V= −

Companionmodel

General Network


Non-linear Reactive Elements:

C(v) ⇒ ⇒ Jk Jngk

+

-

V Vn+1

+

-

in+1in+1

Vn+1

+

-

q(V)h

Jn

( ) , dqq f v idt

= =

1

1n

n nt t

dqq q hdt

+

+=

= +

1 11 1 1

( ), ( )n n nn n n

q q f vor i i vh h h+ +

+ + += − ⇒ =


Jk

slope= gk

Ik

I I=f(V)

VVk

I=f(V)v

+

-

I

gk Jk

ik+1

vk+1

-

+

General Element


E

B

C

Vbc

Vbe

Ide

αrIdc

Cbc

Cbe

E

C

B

αfIde

IdcIB IC

IE

Bipolar Transistor


R1

Vcc

Vout

Q1Q6Vin

RE

Q2Q3

R2R3

Q4

Q5

R4 R5

Vin

R4 R5

RE

R1

R2

Vout

R3

Iout

Vcc

TTL Gate


0 1 2 3 4-200

-100

0

100

200

Vin=0.8VVin=1.4VVin=1.6VVin=1.8V

AS04 TT LI o

ut(m

A)

Vout

IV Curves for TTL Gate

Copyright © by Jose E. Schutt-Aine , All Rights ReservedECE 497-JS, Spring 2004

IBIS - Introduction

• I/O Buffer Information Specification is a Behavioral method of modeling I/O buffers based on IV curve data obtained from measurements or circuit simulation.

• The IBIS format is standardized and can be parsed to create the equivalent circuit information needed to represent the behavior of an IC.

• Can be integrated within a circuit simulator using an IBIS translator.


Advantages of IBIS

• Protection of proprietary information

• Adequate for signal integrity simulation

• Models are free from vendors

• Faster simulations (with acceptable accuracy)

• Standardized topology


PowerClamp

Threshold&

EnableLogic

GNDClamp

GNDClamp

GNDClamp

PowerClamp

PowerClamp

InputPackage

EnablePackage

OutputPackage

PullupRamp

PulldownRamp

PullupV/I

PulldownV/I

IBIS Diagram


IBIS Input Topology

Power_Clamp

GND_Clamp

Vcc

R_pkg

C_pkg

L_pkg

C_comp

GNDGND


Vcc Vcc

Power_ClampGND_Clamp

GND GND

C_pkgL_pkg

R_pkg

C_omp

PullupPulldownRamp

IBIS Output Topology


Create an IBIS modelfrom either simulation

or empirical data

Model fromEmpirical data?

No

Yes

Collect Data

Data in IBIStext file

Run IBIS Parser

Parser Pass

Get SPICE I/Oinfo

No

Yes

Run modelon

Simulator

YesModelvalidated?

No Adoptmodel

Run SPICE to IBISTranslator

IBIS Model Generation


IBIS for Signal Integrity

• Crosstalk• Ringing, Overshoot, undershoot• Distortion, Nonlinear effects• Reflections issues• Line termination analysis• Topology scheme analysis

Visit http://www.eigroup.org/ibis/ibis.htm

ece 497 js lecture - 11 modeling devices for sijsa.ece.illinois.edu/ece497js/lect_11.pdf · title:...

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