ece 663 mosfet i-vs. substrate channel drain insulator gate operation of a transistor v sg > 0 n...
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ECE 663
MOSFET I-Vs
Substrate
Channel Drain
InsulatorGate
Operation of a transistorVSG > 0 n type operation
Positive gate bias attracts electrons into channelChannel now becomes more conductive
More electrons
Source
VSD
VSG
Some important equations in the inversion regime (Depth direction)
VT = ms + 2B + ox
Wdm = [2S(2B)/qNA]
Qinv = -Cox(VG - VT)
ox = Qs/Cox
Qs = qNAWdm
VT = ms + 2B + [4SBqNA]/Cox
Substrate
Channel Drain
InsulatorGate
Source
x
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MOSFET Geometry
x
y
z
L
Z
S D
VG
VD
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How to include y-dependent potential without doing the whole problem over?
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Assume potential V(y) varies slowly along channel, so the x-dependent and y-dependent electrostats are independent (GRADUAL CHANNEL APPROXIMATION)
i.e.,
Ignore ∂Ex/∂y
Potential is separable inx and y
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How to include y-dependent potentials?
S = 2B + V(y)
VG = S + [2SSqNA]/Cox
Need VG – V(y) > VT to invert channel at y (V increases threshold)
Since V(y) largest at drain end, that
end reverts from inversion todepletion first (Pinch off)
SATURATION [VDSAT = VG – VT]
j = qninvv = (Qinv/tinv)v
I = jA = jZtinv = ZQinvv
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So current:
Qinv = -Cox[VG – VT - V(y)]
v = -effdV(y)/dy
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So current:
I = eff ZCox[VG – VT - V(y)]dV(y)/dy
I = eff ZCox[(VG – VT )VD- VD2/2]/L
Continuity implies ∫Idy = IL
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But this current behaves like a parabola !!
ID
VD
IDsat
VDsat
I = eff ZCox[(VG – VT )VD- VD2/2]/L
We have assumed inversion in our model (ie, always above pinch-off)
So we just extend the maximum current into saturation…
Easy to check that above current is maximum for VDsat = VG - VT
Substituting, IDsat = (CoxeffZ/2L)(VG-VT)2
What’s Pinch off?
0
0 0
0
VG VG
Now add in the drain voltage to drive a current. Initially you get an increasing current with increasing drain bias
0 VD
VG VG
When you reach VDsat = VG – VT, inversion is disabled at the drain end (pinch-off), but the source end is still inverted The charges still flow, just that you can’t draw more current with higher drain bias, and the current saturates
Square law theory of MOSFETs
I = eff ZCox[(VG – VT )VD- VD2/2]/L, VD < VG - VT
I = eff ZCox(VG – VT )2/2L, VD > VG - VT
J = qnv
n ~ Cox(VG – VT )
v ~ effVD /L
NEW
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Ideal Characteristics of n-channel enhancement mode MOSFET
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Drain current for REALLY small VD
TGD
DTGinD
DDTGinD
VVV
VVVCLZ
I
VVVVCLZ
I
2
21
Linear operation
Channel Conductance:
)( TGin
VD
DD VVC
LZ
VI
gG
Transconductance:
Din
VG
Dm VC
LZ
VI
gD
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In Saturation
• Channel Conductance:
• Transconductance:
2
2 TGinD VVCLZ
satI
0
GVD
DD V
Ig
TGin
VG
Dm VVC
LZ
VI
gD
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Equivalent Circuit – Low Frequency AC
• Gate looks like open circuit• S-D output stage looks like current source with channel
conductance
gmdD
G
VG
DD
VD
DD
vgvgi
VVI
VVI
IDG
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• Input stage looks like capacitances gate-to-source(gate) and gate-to-drain(overlap)
• Output capacitances ignored -drain-to-source capacitance small
Equivalent Circuit – Higher Frequency AC
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• Input circuit:
• Input capacitance is mainly gate capacitance
• Output circuit:
ggateggdgsin vfCjvCCji 2
gmout vgi
gate
m
in
out
fCg
ii
2
Din
VG
Dm VC
LZ
VI
gD
Equivalent Circuit – Higher Frequency AC
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Maximum Frequency (not in saturation)
• Ci is capacitance per unit area and Cgate is total capacitance of the gate
• F=fmax when gain=1 (iout/iin=1)
2max
max
22
2
LV
ZLC
CVLZ
f
Cg
f
Dn
i
iDn
gate
m
ZLCC igate
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Maximum Frequency (not in saturation)
2max 2 L
Vf Dn
LVv
vL
D /
/
1max
(Inverse transit time)
NEW
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Switching Speed, Power Dissipation
ton = CoxZLVD/ION
Trade-off: If Cox too small, Cs and Cd take over and you lose
control of the channel potential (e.g. saturation)
(DRAIN-INDUCED BARRIER LOWERING/DIBL)
If Cox increases, you want to make sure you don’t control
immobile charges (parasitics) which do not contribute tocurrent.
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Switching Speed, Power Dissipation
Pdyn = ½ CoxZLVD2f
Pst = IoffVD
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CMOS
NOT gate (inverter)
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CMOS
NOT gate (inverter)
Positive gate turns nMOS on
Vin = 1 Vout = 0
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CMOS
NOT gate (inverter)
Negative gate turns pMOS on
Vin = 0 Vout = 1
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So what?
• If we can create a NOT gate we can create other gates (e.g. NAND, EXOR)
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So what?
Ring Oscillator
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So what?
• More importantly, since one is open and one is shut at steady state, no current except during turn-on/turn-off Low power dissipation
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Getting the inverter output
Gain
ON
OFF
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0
GVD
DD V
Ig
TGin
VG
Dm VVC
LZ
VI
gD
What’s the gain here?
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Signal Restoration
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BJT vs MOSFET
• RTL logic vs CMOS logic
• DC Input impedance of MOSFET (at gate end) is infinite Thus, current output can drive many inputs FANOUT
• CMOS static dissipation is low!! ~ IOFFVDD
• Normally BJTs have higher transconductance/current (faster!)
IC = (qni2Dn/WBND)exp(qVBE/kT) ID = CoxW(VG-VT) 2/L
gm = IC/VBE = IC/(kT/q) gm = ID/VG = ID/[(VG-VT)/2]
• Today’s MOSFET ID >> IC due to near ballistic operation
NEW
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What if it isn’t ideal?
• If work function differences and oxide charges are present, threshold voltage is shifted just like for MOS capacitor:
• If the substrate is biased wrt the Source (VBS) the threshold voltage is also shifted
i
BAsB
i
fms
i
BAsBFBT
C
qN
CQ
C
qNVV
)2(22
)2(22
i
BSBAsBFBT C
VqNVV
)2(22
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Threshold Voltage Control
• Substrate Bias:
i
BSBAsBFBT C
VqNVV
)2(22
BBSBi
AsT
BSTBSTT
VC
qNV
VVVVV
222
)0()(
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Threshold Voltage Control-substrate bias
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It also affects the I-VVG
The threshold voltage is increased due to the depletion regionthat grows at the drain end because the inversion layer shrinksthere and can’t screen it any more. (Wd > Wdm)
Qinv = -Cox[VG-VT(y)], I = -effZQinvdV(y)/dy
VT(y) = + √2sqNA/Cox
= 2B + V(y)
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It also affects the I-V
IL = ∫effZCox[VG – (2B+V) - √2sqNA(2B+V)/Cox]dV
I = (ZeffCox/L)[(VG–2B)VD –VD2/2
-2√2sqNA{(2B+VD)3/2-(2B)3/2}/3Cox]
ECE 663
We can approximately include this…
Include an additional charge term from the depletion layer capacitance controlling V(y)
Q = -Cox[VG-VT]+(Cox + Cd)V(y)
where Cd = s/Wdm
Q = -Cox[VG –VT - MV(y)], M = 1 + Cd/Cox
ID = (ZeffCox/L)[(VG-VT - MVD/2)VD]
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Comparison between different models
Square Law Theory
Body Coefficient
Bulk Charge Theory
Still not good below threshold or above saturation
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Mobility• Drain current model assumed constant mobility in
channel• Mobility of channel less than bulk – surface scattering• Mobility depends on gate voltage – carriers in inversion
channel are attracted to gate – increased surface scattering – reduced mobility
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Mobility dependence on gate voltage
)(10
TG VV
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Sub-Threshold Behavior
• For gate voltage less than the threshold – weak inversion
• Diffusion is dominant current mechanism (not drift)
LLnon
qADyn
qADAJI nnDD
)()(
kTVqi
kTqi
DBs
Bs
enLn
enn
/)(
/)(
)(
)0(
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Sub-threshold
kTqkTqVkT
inD
sD
B
eeLenqAD
I ///
1
We can approximate s with VG-VT below threshold since all voltage drops across depletion region
kTVVqkTqVkT
inD
TGD
B
eeLenqAD
I ///
1
•Sub-threshold current is exponential function of applied gate voltage•Sub-threshold current gets larger for smaller gates (L)
ECE 663
Subthreshold Characteristic
GD VIS
log1
Subthreshold Swing
Tunneling transistor– Band filter like operation
J Appenzeller et al, PRL ‘04
Ghosh, Rakshit, Datta(Nanoletters, 2004)
(Sconf)min=2.3(kBT/e).(etox/m)
Hodgkin and Huxley, J. Physiol. 116, 449 (1952a)
Subthreshold slope = (60/Z) mV/decade
Much of new research depends on reducing S !
Much of new research depends on reducing S !
• Increase ‘q’ by collective motion (e.g. relay) Ghosh, Rakshit, Datta, NL ‘03
• Effectively reduce N through interactions Salahuddin, Datta • Negative capacitance Salahuddin, Datta
• Non-thermionic switching (T-independent) Appenzeller et al, PRL
• Nonequilibrium switchingLi, Ghosh, Stan
• Impact IonizationPlummer
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More complete model – sub-threshold to saturation
• Must include diffusion and drift currents• Still use gradual channel approximation• Yields sub-threshold and saturation behavior for long
channel MOSFETS• Exact Charge Model – numerical integration
D s
B
V
p
p
V
D
nsD
p
nVF
eLL
ZI
0
0
0,,
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Exact Charge Model (Pao-Sah)– Long Channel MOSFET
http://www.nsti.org/Nanotech2006/WCM2006/WCM2006-BJie.pdf
ECE 663