Expt.No.: Operational Amplifier Applications Date: Aim:

To design an inverting amplifier, Non-inverting amplifier, summer, Comparator, Integrator and Differentiator using Operational Amplifier.

Apparatus Required:

Sl.No. Components Range Quantity1 Op Amp LM741 1

2

Resistors

1KΩ, 10KΩ 30KΩ

1 3

3 Capacitor 10µF, 0.1µF 1 4 CRO 0-25MHz 1 5 Function Generator 0-1MHz 1 6 Breadboard - 1 7 Connecting wires - As required8 IC Trainer Kit/Breadboard - 1

Theory:

The op-amp is basically a differential amplifier having a large voltage

gain, very high input impedance and low output impedance. The op-amp has a "inverting" or (-) input and "non-inverting" or (+) input and a single output. The op-amp is usually powered by a dual polarity power supply in the range of + 5 volts to + 22 volts.

INVERTING AMPLIFIER:

The op-amp is connected using two resistors R1 and Rf such that the input signal is applied in series with R1 and the output is connected back to the inverting input through Rf. The non-inverting input is connected to the ground reference or the center tap of the dual polarity power supply. In operation, as the input signal moves positive, the output will move negative and vice versa. The amount of voltage change at the output relative to the input depends on the ratio of the two resistors R1 and Rf. As the input moves in one direction, the output will move in the opposite direction, so that the voltage at the inverting input remains constant or zero volts in this case. If R1 is 1KΩ and Rf is 10KΩ and the input is +1 volt then there will be 1 mA of current flowing through R1 and the output will have to move to -10 volts to supply the same current through Rf and keep the voltage at the inverting input at zero. The voltage gain in this case would be Rf/ R 1 or 10K/1K = 10. For higher input impedances, both resistor values can be increased.

CIRCUIT DIAGRAM:

TABULAR COLUMN: DC INPUT:

Vin

(VOLTS) THEORETICAL

OUTPUT (VOLTS)

PRACTICAL OUTPUT (VOLTS)

AC INPUT:

Vin

(VOLTS) Tin

(ms) V0

(VOLTS) T0

(ms)

Signal Generator

RCOMP=1kΩ

CRO

+15V

-15V

Rf =10kΩ

Rin =1kΩ

V0= [-Rf/Rin] Vi

-

+

V

MODEL GRAPH:

Vin (Volts)

Vo (Volts)

t (ms)

t (ms)

NON INVERTING AMPLIFIER: The non-inverting amplifier is connected so that the input signal goes

directly to the non-inverting input (+) and the input resistor R1 which is connected to inverting input (-) is grounded. In this configuration, the input impedance as seen by the signal is much greater since the input will be following the applied signal and not held constant by the feedback current. As the signal moves in either direction, the output will follow in phase to maintain the inverting input at the same voltage as the input (+). The voltage gain is always more than 1 and can be worked out from

1

CIRCUIT DIAGRAM: TABULAR COLUMN: DC INPUT:

Vin

(VOLTS) THEORETICAL

OUTPUT (VOLTS)

PRACTICAL OUTPUT (VOLTS)

CRO

~

+15V

-15V

Rf =5.6kΩ

Rin =1kΩ

Signal Generator

V0= [1+Rf/Rin]

+

-

AC INPUT:

MODEL GRAPH:

Vin

(VOLTS) Tin

(mS) V0

(VOLTS) T0

(mS)

Vin (Volts)

Vo (Volts)

t (ms)

t (ms)

SUMMIOp

input sigoutput vo

propor DESIGN If

ThRc

If R1 =

CIRCUI

TABULWave fo

Sine I/ O

ING AMPp-amp maygnals. Sucholtage Vou

rtional to th

N:

R1 = R2=

hen Vo= -comp =R1

R2= R3 =R

IT DIAGR

LAR COLUorm A

/P

O/P

PLIFIER: y be used th a circuitut becomes

he sum of

R3 =Rf

[V1 +V2 + || R2 || R3|

Rf = 10 K

RAM:

UMN: mplitude (

to design at is calleds

the input v

V3] and || Rf

,then R c

(v)

a circuit wh a summin

voltages, V

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Time (mS

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V1, V2, V3

K

S)

ut is the sumier or a su

.

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MODEL GRAPH:

V2

Vm

t

Vm

t

Vm

V3

3Vm

t V0

t

V1

INTEGR

matheminput vwhich words voltageor discis the integratime infeedba

DESIGN

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RAM:

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ifier circuput to respplifier prodage with retermined brough the fch the outaveform issumming

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he he

put her e a es

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riodic , Fb=

TABULAR COLUMN:

Wave form Amplitude (v) Time (mS) Sine I/P O/P Square I/P O/P

MODEL GRAPH: DIFFERENTIATOR:

The differentiator can perform the mathematical operation of differentiation that is the output voltage is the differentiation of the input voltage. This operation is very useful to find the rate at which a signal varies with time. The Differentiator circuit is the exact opposite to that of the Integrator, the position of the capacitor and resistor have been reversed and now the Capacitor, C is connected to the input terminal of the inverting amplifier while the Resistor, Rf forms the negative feedback element across the operational amplifier. This circuit performs the mathematical operation of differentiation that is it produces a voltage output which is proportional to the input voltage's rate-of-change and the current flowing through the capacitor. In other words the faster or larger the change to the input voltage signal, the

Vi

V0

t(ms)

t(ms)

Vi (volts)

Vo (volts)t(ms)

t(ms)

greater the input current, the greater will be the output voltage change in response becoming more of a "spike" in shape.

DESIGN: Fb=20 Fa, selecting C1 =0.1 F (C<1F) and Fa = 1KHZ then Fb= 20KHZ From which Fa = 1/(2 Rf C1) = Rf = 1/(2 Fa C1) = Rf= 1.5 K Fb = 1(2 Rf Cf) = Cf = 1/(2 Fb Rf) = Cf= 0.005F CIRCUIT DIAGRAM: TABULAR COLUMN:

Wave form

Amplitude(v)

Time (mS)

Sine I/P O/P Square I/P O/P

Cf = 0.01f Vo 6

4

R1 = 1K 7

2

V‐

V+

3

Rf = 1.5K

Cf = 0.005f

‐

+Signal

Generator

Vi

(volt

V0

(volt

MODEL COMPA CIRCUI

ts)

ts)

L GRAPH

ARATOR

IT DIAGR

H:

:

RAM:

t(m

t(ms

ms)

)

V

V

Vi (volts)

Vo (volts)

t(mms)

t(ms)

TABULAR COLUMN:

Input Output Gain

Vamp t(ms) Vamp t(ms)

Vi = Vref =

Vi = Vref =

Op-amp may be used to design a circuit whose output is the difference of twoinput signals. Such a circuit is called a comparator. The output voltage Vout becomes

MODEL GRAPH:

Vm

Vref

0V

0V

t

t

Pin Dia

Procedu

1. Co2. Co3. Fo

tab4. In

co Viva-Vo

1. W2. W3. W4. W5. W6. Gi7. W8. Gi

Result:

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agram:

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Total(50)

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d the

Expt. No: Instrumentation Amplifier

Aim: To design an instrumentation amplifier circuit and to obtain the CMRR Value.

Apparatus Required:

Sl.No. Components Range Quantity

1 OpAmp LM741 3 2 Resistors 1K,10K 2 3 Power Supply -12 to +12 V 1 4 IC Trainer kit --------------- 1 5 Bread board --------------- 1 6 Multimeter --------------- 1 7 Connecting wires --------------- As required

Theory:

An amplifier that accepts a voltage signal as an input and produces a

linearly scaled version of this signal at the output, it is a closed-loop fixed-gain amplifier, usually differential, and has high input impedance, low drift, and high common-mode rejection over a wide range of frequencies.

Basic instrumentation amplifier:

Instrumentation Amplifiers are high gain differential amplifiers with

high input impedance and a single ended output. They are mainly used to amplify very small differential signals from strain gauges, thermocouples or current sensing resistors in motor control systems. They also have very good common mode rejection (zero output when V1 = V2) in excess of 100dB at DC. The amplifiers A1 and A2 are non inverting amplifiers. The preamplifier amplifies the differential input (Vin1 ~ Vin2) which is given as Vo1. The differential amplifier in turn amplifies this Vo1 to produce a final output of Vo. Thus the differential input is amplified and converted to a single ended output.

Features of instrumentation amplifier are:

1. High gain accuracy 2. High CMRR 3. High gain stability with low temperature coefficient 4. Low DC offset 5. Low output impedance

Circuit

Tabula

Sl. No.

V (

1

2

3

Pin Dia

Diagram

tion:

V1

(V)

V2 (V)

agram:

:

Vd (V)

V (V

Vc

V)

Vo (V)

Ad= Vo/Vd

Ac= Vo/Vc

CMRR=

Ad/Ac

CMRR (dB)

R

Procedure: 1. Connections are made as per the circuit diagram.

2. Connect a DC voltage source at the input.

3. For various values of input voltages, the corresponding output values are tabulated.

4. Common mode gain and differential mode gain are calculated using

Common mode gain = Ac=Vo/Vc Common mode input = Vc = (V1+V2)/2 Differential mode gain, Ad=Vo/Vd

CMRR = 20 log Ad/Ac Vo = (R2/R1)(V1-V2) Volt

Result:

Expt. NDate: Aim: To IC Appara

Sl.No

1 2 T

3

R

4 5 C6 F7 B8

Astable741: Th

Tto operafed bacand mainvertinWhenevplace restates ar

Circuit

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Record

waveformy.

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Total(50)

Expt. NDate:

Aim:

To and

ApparaSl.No.

1 O

2 R

3 C4 D5 C6 F7 B

C MonostTheory

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Circuit D

No.: M

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Resistors

Capacitor Diode CRO Function GBread BoarConnecting

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ired: ponents

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1KΩ,100 K0.1µF, 4n

IN40020-25MH0-1MHz

----------

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Tabula

Sl.No.

Model

diagram:

tion:

Ton (sec)

T(

Graph:

:

Toff (sec) Amp

(V)

Output

plitude

t F

Time (Sec)

Frequency

Cap

Voltage (V)

pacitor

Time (Sec)

Pin Diag

Procedu

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wi4. Dr

Viva-Voc

1. W2. G3. W4. W

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gram:

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Exp.No.10 PLL and VCO Date: AIM:

(a) To study about voltage controlled oscillator (b) To study about Phase locked loop.

(a) VOLTAGE CONTROLLED OSCILLATOR THEORY:

A common type of VCO available in IC form is sign tics NE/SE 566. It consists of a timing capacitor CT linearly charged or discharged by a constant current source/sink. The amount of current can be controlled by changing the voltage Vc applied at the modulating input (Pin 5) or by changing the timing resistor Rr external to the IC chip. The voltage at Pin 6 is held at the same voltage as Pin 5. Thus, if the modulating voltage at Pin5 is measured, the voltage at Pin6 also increases, resulting in less voltage across R and thereby decreasing the changing current.

The voltage across the capacitor CT is applied at the inverting input terminal of Schmitt trigger A2 via buffer amplifier. The output voltage swing of the Schmitt trigger is designed to Vcc and 0.5Vcc. If Ra = Rb in the positive feedback loop, the voltage at the non-inverting terminal of A2 swings from 0.5Vcc to 0.25 Vcc.

When the voltage on the capacitor CT exceeds 0.5Vcc during charging the output of the Schmitt trigger goes low (0-5) Vcc. The capacitor now discharges and when it is at 0.25Vcc the output of Schmitt trigger goes high (Vcc). Since the source and sink currents are equal, capacitor charges and discharges for, the same amount of the time.

Thus ∆v = 0.25Vcc ∆V = i ∆t CT 0.25Vcc = i ∆t CT

∆t = 0.25VccCT i The frequency of oscillator f0 is f0 = 1/t = 1/2∆t = i 0.5Vcc CT i = Vcc - Vc Rt

PIN DIAGRAM: CIRCUIT DIAGRAM:

Ground

Square wave output

Triangular wave output

NC

+Vc

CT

RT

Modulated input

8

7

6

5

1

4

3

2

NE/SE566 VCO

Modulating input

17

5

6 8

4

3

CT

R2

Rf

+Vcc

Vc

566

R1

OUTPUT WAVEFORMS: b) PHASE LOCKED LOOP THEORY: MONOLITHIC PHASE LOCKED LOOP: All the different building blocks of the PLL are available as independent IC packages and can be externally interconnected to make a PLL. Moreover a number of manufacturers have introduced monolithic PLL’s too. Some of the important monolithic PLL’s are SE/NE 560 series introduced by signetics and LM560 series by rational semiconductor. The SE/NE 560,561, 562,564,565 and 567 mainly differ in operating frequency range, power supply requirement, frequency and bandwidth adjustment ranges. Since 565 is the most commonly used PLL. 565 iss available as 14-Pin DIP Packages and as 10 Pin Metal can package. The output frequency of the VCO (both inputs 2,3 grounded) f0 = 0.25/RtCt Hz

Vcc

0.5Vcc

O/P at Pin4

0.5 Vcc

0.25 Vcc

Schmitt trigger O/P

O/P at Pin3

Vcc

0.5Vcc

where Rt and Ct are the external resistor and capacitor connected to Pin8 and Pin 9. A value between 2KΩ and 20KΩ is recommended for Rt. The VCO free running frequency is adjusted with Rt and Ct to be at the centre of the input frequency range. It may be seen that phase locked loop is internally broken between the VCO output and the phase comparator input. A short circuit between pins 4 and 5 connects the VCO output to the phase comparator, so as to compare f0 with input signal fs. A capacitor C is connected between Pin 7 and Pin 10 to make a low pass filter with internal resistance of 3.6KΩ. PIN DIAGRAM:

Reference

VCO

NC

+Vcc

External capacitor for VCO

NC

NC

-Vcc

External resistor for VCO

input

VCO

Demodulated

input

12

11

10

9

1

4

3

2

NE/SE565

5

8 7

6

13

14

NC

CIRCUIT DIAGRAM: Viva-Voce Questions:

1. Why do we need a divider in a PLL feedback loop? 2. What was the frequency of the divider you worked on? 3. What is a VCO? What kind of VCO was used in the PLL and do you know the

reason why? 4. Give any two practical applications of PLL and VCO. 5. What is lock-in range? 6. What is capture range? 7. Draw the block diagram of PLL.

Result:

Performance(25) Viva Voce(10) Record(15) Total(50)

+Vcc

Vco o/p 4

RT

9

3.6k

C

Phase detector

Amplifier

VCO

i/p 2

i/p 3

i/p 5

-VccVcc

CT

Demodulated o/p

Ref o/p

8

10