electronica 1 mosfet
TRANSCRIPT
-
8/10/2019 Electronica 1 Mosfet
1/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-1 A representation of the basic structure of the two types of JFET.
-
8/10/2019 Electronica 1 Mosfet
2/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-2 A biased n-channel JFET.
-
8/10/2019 Electronica 1 Mosfet
3/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-3 Effects of VGS on channel width, resistance, and drain current (VGG = VGS).
-
8/10/2019 Electronica 1 Mosfet
4/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-4 JFET schematic symbols.
-
8/10/2019 Electronica 1 Mosfet
5/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-5 The drain characteristic curve of a JFET for VGS = 0 showing pinch-off voltage.
-
8/10/2019 Electronica 1 Mosfet
6/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-6 JFET action that produces the characteristic curve for VGS = 0 V.
-
8/10/2019 Electronica 1 Mosfet
7/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-7 Pinch-off occurs at a lower VDS as VGS is increased to more negative values.
-
8/10/2019 Electronica 1 Mosfet
8/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-8 VGS controlsID.
-
8/10/2019 Electronica 1 Mosfet
9/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-9 JFET at cutoff.
-
8/10/2019 Electronica 1 Mosfet
10/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-10 A biasedp-channel JFET.
-
8/10/2019 Electronica 1 Mosfet
11/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-11
-
8/10/2019 Electronica 1 Mosfet
12/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-12 JFET universal transfer characteristic curve (n-channel).
-
8/10/2019 Electronica 1 Mosfet
13/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-13 Example of the development of an n-channel JFET transfer characteristic curve (blue) from the JFET drain characteristic
curves (green).
-
8/10/2019 Electronica 1 Mosfet
14/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-14 JFET partial datasheet. 2003 Fairchild Semiconductor Corporation. Used by permission.
-
8/10/2019 Electronica 1 Mosfet
15/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-15 gm varies depending on the bias point (VGS).
-
8/10/2019 Electronica 1 Mosfet
16/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-16 Self-biased JFETs (IS ID in all FETs).
-
8/10/2019 Electronica 1 Mosfet
17/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-17
-
8/10/2019 Electronica 1 Mosfet
18/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-18
-
8/10/2019 Electronica 1 Mosfet
19/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-19
-
8/10/2019 Electronica 1 Mosfet
20/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-20 A self-biased JFET and its transfer characteristic curve.
-
8/10/2019 Electronica 1 Mosfet
21/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-21 The intersection of the self-bias dc load line and the transfer characteristic curve is the Q-point.
-
8/10/2019 Electronica 1 Mosfet
22/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-22
-
8/10/2019 Electronica 1 Mosfet
23/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-23 An n-channel JFET with voltage divider bias (IS ID).
-
8/10/2019 Electronica 1 Mosfet
24/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-24
-
8/10/2019 Electronica 1 Mosfet
25/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-25 Generalized dc load line (red) for a JFET with voltage-divider bias.
-
8/10/2019 Electronica 1 Mosfet
26/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-26
-
8/10/2019 Electronica 1 Mosfet
27/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-27 Variation in the transfer characteristic of 2N5459 JFETs and the effect on the Q-point.
-
8/10/2019 Electronica 1 Mosfet
28/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-28 The change inIDbetween the minimum and the maximum Q-points is much less for a JFET with voltage divider bias than
for a self-biased JFET.
-
8/10/2019 Electronica 1 Mosfet
29/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-29 Current-source bias.
-
8/10/2019 Electronica 1 Mosfet
30/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-30 The ohmic region is the shaded area. The characteristic curves are straight lines with a slope of ID/VDS for small values ofID.
-
8/10/2019 Electronica 1 Mosfet
31/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-31 The load line intersects the curves inside the ohmic region.
-
8/10/2019 Electronica 1 Mosfet
32/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-32
-
8/10/2019 Electronica 1 Mosfet
33/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-33
-
8/10/2019 Electronica 1 Mosfet
34/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-34 Representation of the basic E-MOSFET construction and operation (n-channel).
-
8/10/2019 Electronica 1 Mosfet
35/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-35 E-MOSFET schematic symbols.
-
8/10/2019 Electronica 1 Mosfet
36/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-36 Representation of the basic structure of D-MOSFETs.
Fi 8 37 O i f h l D MOSFET
-
8/10/2019 Electronica 1 Mosfet
37/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-37 Operation of n-channel D-MOSFET.
Fi 8 38 D MOSFET h ti b l
-
8/10/2019 Electronica 1 Mosfet
38/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-38 D-MOSFET schematic symbols.
Figure 8 39 Cross section of conventional E MOSFET structure Channel is shown as white area
-
8/10/2019 Electronica 1 Mosfet
39/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-39 Cross section of conventional E-MOSFET structure. Channel is shown as white area.
Figure 5-34 drain characteristic of n channel enhancement type MOSFET
-
8/10/2019 Electronica 1 Mosfet
40/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 5-34 drain characteristic of n-channel enhancement type MOSFET.
Figure 5-35 Sketching the transfer characteristics for an n-channel enhancement type MOSFET from the drain characteristics
-
8/10/2019 Electronica 1 Mosfet
41/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 5 35 Sketching the transfer characteristics for an n channel enhancement type MOSFET from the drain characteristics
.
Figure 5-37 p-Channel enhancement-type MOSFET
-
8/10/2019 Electronica 1 Mosfet
42/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 5 37 p Channel enhancement type MOSFET
.
Figure 8-44 E-MOSFET general transfer characteristic curves.
-
8/10/2019 Electronica 1 Mosfet
43/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
g g
Figure 8-45 D-MOSFET general transfer characteristic curves.
-
8/10/2019 Electronica 1 Mosfet
44/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
Figure 8-46 Common E-MOSFET biasing arrangements.
-
8/10/2019 Electronica 1 Mosfet
45/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
-
8/10/2019 Electronica 1 Mosfet
46/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
-
8/10/2019 Electronica 1 Mosfet
47/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
-
8/10/2019 Electronica 1 Mosfet
48/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.
-
8/10/2019 Electronica 1 Mosfet
49/49
Thomas L. Floyd
Electronic Devices, 8e
Copyright 2008 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458
All rights reserved.