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PLAN DE MANIP Larissa Djomeni | EPTC 2015 – 2015/12/03

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Page 1: EPTC 2015 – 2015/12/03 - aveniaveni.com/wp-content/uploads/2016/02/EPTC_2015... · T.Mourier – EPTC 2015 – 2015/12/03 cy) 10 x 100 µm - Kelvin TSV 10 x 100 µm - 754 TSV daisy

PLAN DE MANIP Larissa Djomeni |

EPTC 2015 – 2015/12/03

Page 2: EPTC 2015 – 2015/12/03 - aveniaveni.com/wp-content/uploads/2016/02/EPTC_2015... · T.Mourier – EPTC 2015 – 2015/12/03 cy) 10 x 100 µm - Kelvin TSV 10 x 100 µm - 754 TSV daisy

OUTLINE

| PAGE 2 T.Mourier – EPTC 2015 – 2015/12/03

  Introduction

Ø  3D Integration and why increasing aspect ratio

  New metallization of High aspect ratio TSV

Ø  MOCVD TiN barrier

Ø  Electrografted seed layer : eG3D

ü  Characterization

ü  Transfer on 300 mm platform

  Integration and electrical results

  Conclusions and perspectives

Page 3: EPTC 2015 – 2015/12/03 - aveniaveni.com/wp-content/uploads/2016/02/EPTC_2015... · T.Mourier – EPTC 2015 – 2015/12/03 cy) 10 x 100 µm - Kelvin TSV 10 x 100 µm - 754 TSV daisy

WHY 3D INTEGRATION ?

| PAGE 3

  In the near future, the electronic circuit will probably be looking like this and will integrate complex electronic systems on silicon

Smaller - More Performance with higher functionalities - Cheaper

A silicon interposer With very heterogeneous dice on it (various substrates, various technologies co-existing, various chip makers…).

Stacked 3D ICs

Systemonboard(SmartphonePCB)

T.Mourier – EPTC 2015 – 2015/12/03

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HIGH ASPECT RATIOS – CHALLENGES FOR METALLIZATION

| PAGE 4

  Higher and higher aspect ratios are today forecasted

  TSV Mid-process Ø  From 10x100 µm today to 10x150 µm or 5x80 µm depending on application

  Where are the challenges for metallization of these TSVs?

- Conformal deposition - Good barrier properties for process temperature Barrier

- Conformal deposition, continuous on sidewalls - Low resistance Seed

- Void free deposition in whole TSV - Low overburden Plating

T.Mourier – EPTC 2015 – 2015/12/03

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HIGH ASPECT RATIOS – ALTERNATIVE SEED LAYER

| PAGE 5

  Electrografted seed layer Ø  Process developed by aveni: eG3D

T.Mourier – EPTC 2015 – 2015/12/03

Can be used as a PVD seed repair or directly as DoB (Direct on Barrier)

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HIGH ASPECT RATIOS SEED LAYER – eG3D

| PAGE 6

  Transfer to 300 mm scale Ø  Copper filling 10x100 µm TSVs filled with the 2 selected options: seed repair or direct on barrier seed

T.Mourier – EPTC 2015 – 2015/12/03

PVD barrier + Cu seed layer + eG3D repair process

MOCVD TiN barrier + Cu seed flash + eG3D seed layer process

Void free filling obtained on both metallization options

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INTEGRATION

| PAGE 7

  Complete integration was performed using TSV mid process flow

T.Mourier – EPTC 2015 – 2015/12/03

TSV etching

Bonding & TSV reveal

TSV metallization TSV planarization Front side metal

Back side metal

TEST

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TEST STRUCTURE

| PAGE 8

  Test structure : Kelvins and daisy chains

  Metallization splits for comparison

T.Mourier – EPTC 2015 – 2015/12/03

FrontsidemetalTSVBacksidemetal

10x100 µm Kelvin TSV 10x100 µm : 2 to 754 TSVs Daisy Chain

Split1:PVDbarrier/seedrepairoptionSplit2:MOCVDTiNbarrier/seedrepairoptionSplit3:MOCVDbarrier/FlashPVDCu/eG3Dseedlayer

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INTEGRATION

| PAGE 9

  Electrical results

T.Mourier – EPTC 2015 – 2015/12/03

Cum

ulat

ive

frequ

ency

(%)

10 x 100 µm - Kelvin TSV 10 x 100 µm - 754 TSV daisy chain

-  Excellent yield whatever metallization conditions -  Sharp distribution -  No clear difference between the splits -  Same distribution as 10x80 µm full PVD reference, difference is due to TSV

height

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INTEGRATION

| PAGE 10

  Process extendibility to higher TSV Ø  Same process was applied to 12:1 aspect ratio TSV (10 x 120 µm)

T.Mourier – EPTC 2015 – 2015/12/03

-  Both presented metallization options are extendible to 12:1 aspect ratio

Option 1 MOCVD TiN –

1.5 µm PVD seed- 200 nm eG3D repair

Option 2 MOCVD TiN –

Flash Cu PVD 200 nm - 200 nm eG3D seed

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CONCLUSIONS

| PAGE 11 T.Mourier – MRS 2015 – 08/04/2015

  A new metallization process has been demonstrated enabling copper filling of high aspect ratio TSV based on :

Ø  A low temperature MOCVD TiN barrier material

Ø  An Electrografted seed layer that can be used in stand alone or as a seed repair option

  Process development was performed and transferred on a 300 mm platform

  Electrical integration was realized showing no degradation of TSV performances compared to reference iPVD metallization

  Extendibility of this process for higher aspect ratio has been demonstrated and integration is on going on 12:1 AR

  Adhesion is still under investigation through process and hardware optimization to remove the copper flash PVD

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Thank you for your attention

Grenoble - France!

I would like to acknowledge : -  The 300 mm plating team -  People working on integration on the 300 mm 3D pilot line -  aveni process team -  Fabienne Allain for the electrical measurements