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Embien Technologies – eStorm-B1
Hardware Manual R1.0
Page 1 of 28 Embien Tech. India Pvt. Ltd
Document Reference: ET/IPD/AN/HM/17/04-R1.0
eStorm-B1 Hardware Manual
Embien Technologies – eStorm-B1
Hardware Manual R1.0
Page 2 of 28 Embien Tech. India Pvt. Ltd
Revision History
Date Revision Authors Remarks
11/04/2017 1.0 KSD Initial Document
Embien Technologies – eStorm-B1
Hardware Manual R1.0
Page 3 of 28 Embien Tech. India Pvt. Ltd
Table of Contents
1. INTRODUCTION ................................................................................................................................................. 5
1.1 SCOPE ..................................................................................................................................................................... 5 1.2 REFERENCES ............................................................................................................................................................. 5
2. ESTORM-B1 FEATURES ...................................................................................................................................... 6
2.1 FEATURES ................................................................................................................................................................ 6 2.2 BLOCK DIAGRAM ....................................................................................................................................................... 7 2.3 ORDERING INFO ........................................................................................................................................................ 8
3. ESTORM-B1 HARDWARE COMPONENTS ............................................................................................................ 9
3.1 BLE SOC – KW31Z .................................................................................................................................................. 9 3.2 CRYSTAL ................................................................................................................................................................ 12 3.3 RF SECTION............................................................................................................................................................ 13 3.4 SHIELD .................................................................................................................................................................. 13
4. ESTORM-B1 PIN OUTS ......................................................................................................................................14
5. ESTORM-B1 PIN LAYOUTS ................................................................................................................................26
6. ELECTRICAL AND ENVIRONMENTAL SPECIFICATION .........................................................................................27
7. LEGAL NOTICE ...................................................................................................................................................28
7.1 CUSTOMER SUPPORT ............................................................................................................................................... 28 7.2 USAGE RESTRICTION ................................................................................................................................................ 28
Embien Technologies – eStorm-B1
Hardware Manual R1.0
Page 4 of 28 Embien Tech. India Pvt. Ltd
Table of Figures
FIGURE 1: ESTORM-B1 BLOCK DIAGRAM ...................................................................................................................... 7 FIGURE 2: KW31Z BLOCK DIAGRAM ........................................................................................................................... 11 FIGURE 3: CLOCKING DIAGRAM .................................................................................................................................... 12 FIGURE 4: ESTORM-B1 CONNECTOR ARRANGEMENT ................................................................................................... 15 FIGURE 5: ESTORM-B1 PAD LAYOUT (TOP VIEW) ...................................................................................................... 26 FIGURE 6: ESTORM-B1 PAD LAYOUT (BOTTOM VIEW) ............................................................................................... 27
Table of Tables
TABLE 1: ESTORM-B1 MODULE FEATURES ..................................................................................................................... 6 TABLE 2: ESTORM-B1 ORDERING INFORMATION ........................................................................................................... 8 TABLE 3: J5 CONNECTOR SIGNAL LIST ......................................................................................................................... 19 TABLE 4: J6 CONNECTOR SIGNAL LIST ......................................................................................................................... 22 TABLE 5: J8 CONNECTOR SIGNAL LIST ......................................................................................................................... 25
Embien Technologies – eStorm-B1
Hardware Manual R1.0
Page 5 of 28 Embien Tech. India Pvt. Ltd
1. Introduction
eStorm-B1 is a compact Bluetooth Low Energy v4.2 complaint wireless module from Embien.
Being a pre-qualified module, it is best suited for BLE based IoT device development were low
power consumption and very small form factor is of more concern.
Powered by KW31Z BLE SoC from NXP semiconductors, it can be used as an add-on module
for enabling BLE connectivity for portable embedded system or as a stand-alone system. The
module is available in both industrial, automotive grade and designed in such a way that it
does not require any external components.
1.1 Scope
The primary scope of this document is to provide the developer/technical persons the
background about the module and procedures for using the same. All the details of the
hardware, components used etc are provided to aid the developer use the system effectively
as well as expand its functionalities.
This document does not describe about command set information, programming this device
and using them. For this information, kindly refer to the ―Developer Manual‖ provided.
1.2 References
1. eStorm-B1 Developer Manual: ET/IPD/AN/DM/17/04-R1.0 from embien.com
2. MKW31Z512 technical datasheet: MKW41Z/31Z/21Z Data Sheet from NXP.com
Embien Technologies – eStorm-B1
Hardware Manual R1.0
Page 6 of 28 Embien Tech. India Pvt. Ltd
2. eStorm-B1 Features
This section describes various features of the eStorm-B1 module in detail.
2.1 Features
eStorm-B1 board supports the following features.
Features Description Availability
BLE SoC MKW31Z Default
MCU ARM Cortex-M0+ core Default
MCU Speed 48MHz Default
SRAM 128KB Default
Flash 512KB Default
BLE v4.2 Low Energy complaint
2400-2483.5MHz Band Default
Air Data Rate 1Mbps Default
Antenna Wire Antenna Default
External PCB antenna Optional
External interface 33 pin surface mount or through hole pads Default
UART Serial Interface 1 (TTL) Default
SPI 1 Default
I2C 1 Default
CAN 1* Default
GPIO’s Multiple Optional
Debug port 1 (SWD Interface) Default
Input power 1.71V to 3.6V DC Default
Form Factor 12mm X 17mm Default
Table 1: eStorm-B1 Module features
Features marked in Green as default and in Tan color are selectable when ordering the board.
* Available only in automotive grade module.
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Hardware Manual R1.0
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2.2 Block Diagram
The block diagram of the eStorm-B1 module is depicted in the below figure,
Figure 1: eStorm-B1 Block Diagram
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Hardware Manual R1.0
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2.3 Ordering Info
eStorm-B1 can be ordered with only the features necessary for the target applications. The
following table gives the detailed description of the ordering codes.
S. No
Order Code Description Operating Grade
Production status
1 eStorm-B1-II I2C to Bluetooth Low Energy gateway Industrial Active
2 eStorm-B1-IU UART to Bluetooth Low Energy gateway Industrial Active
3 eStorm-B1-IS SPI to Bluetooth Low Energy gateway Industrial Active
4 eStorm-B1-IG Generic Connectivity Module Industrial Active
5 eStorm-B1-AI I2C to Bluetooth Low Energy gateway Automotive Under Development
6 eStorm-B1-AU UART to Bluetooth Low Energy gateway Automotive Under Development
7 eStorm-B1-AS SPI to Bluetooth Low Energy gateway Automotive Under Development
8 eStorm-B1-AC CAN to Bluetooth Low Energy gateway Automotive Under Development
Table 2: eStorm-B1 ordering information
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Hardware Manual R1.0
Page 9 of 28 Embien Tech. India Pvt. Ltd
3. eStorm-B1 Hardware Components
The eStorm-B1 platform is designed using some of the most powerful and reliable components
available. This section describes some of the major components used in the design.
3.1 BLE SoC – KW31Z
The KW31Z SoC integrates a radio transceiver operating in the 2.36GHz to 2.48GHz range
supporting a range of FSK/GFSK and O-QPSK modulations, an ARM Cortex-M0+ CPU, up to
512 KB Flash and up to 128 KB SRAM, BLE Link Layer hardware, 802.15.4 packet processor
hardware, Generic FSK Link layer controller hardware and peripherals optimized to meet the
requirements of the target applications.
The KW31Z radio frequency transceiver is compliant with Bluetooth version 4.2 for Low Energy
(aka Bluetooth Smart or BLE), Generic FSK and the IEEE 802.15.4 standard using O-QPSK in
the 2.4 GHz ISM band and the MBAN frequency range spanning from 2.36 GHz to 2.40 GHz. In
addition, the KW31Z allows the Bluetooth Low Energy protocol to be used in the MBAN
frequency range for proprietary applications.
KW31Z has 512KB of on-chip Flash and 128KB of on-chip SRAM memory available to be used
by customer applications and chosen communication protocol stack using a choice of either
NXP or 3rd party software development tools.
The RF section of the KW31Z is optimized to require very few external components, achieving
the smallest RF footprint possible on a printed circuit board. Extremely long battery life is
achieved though efficiency of code execution in the Cortex-M0+ CPU core and the multiple low
power operating modes of the KW31Z.
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Hardware Manual R1.0
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The following are the lists of features of the BLE SoC:
MCU
32-bit Cortex M0+ (enhanced M0) Central Processor Unit (CPU)
Up to 48MHz core frequency across temperature range of –40 °C to 105 °C
Supports up to 32 interrupt request sources
2-stage pipeline micro architecture for reduced power consumption and improved
architectural performance (cycles per instruction)
Bit Manipulation Engine (BME) for improved bit handling of peripheral modules
Binary compatible instruction set architecture with the CM0 core
Thumb instruction set combines high code density with 32-bit performance
Serial Wire Debug (SWD) reduces the number of pins required for debugging
Micro Trace Buffer (MTB) provides lightweight program trace capabilities using system
RAM as the destination memory
Radio
2.4GHz ISM band (2400-2483.5MHz) and MBAN 2360-2400MHz operation
(G)FSK and O-QPSK Modulation
Supported Standards
o Bluetooth v4.2 Low Energy supporting up to 2 simultaneous hardware connections
o Generic(G)FSK modulation capability in Medical Body Area Network (MBAN)
frequency bands spanning from 2360 MHz to 2400 MHz
IEEE Std. 802.15.4 compliant with dual-PAN support
Bluetooth Low Energy Link Layer hardware
• Hardware acceleration for IEEE Std. 802.15.4 packet processing
• 26 MHz (BLE/Generic FSK only) or 32 MHz crystal reference oscillator
• Generic FSK Link Layer hardware
• Single RF port shared by both transmit and receive, used with
• Supports diversity antenna options for 802.15.4
• Supports dual PAN for 802.15.4 with hardware-assisted address matching acceleration
• Low external component count
• Supports external PA and LNA
Embien Technologies – eStorm-B1
Hardware Manual R1.0
Page 11 of 28 Embien Tech. India Pvt. Ltd
The following figure shows the simplified block diagram of the KW31Z BLE SoC.
Figure 2: KW31Z Block Diagram
Embien Technologies – eStorm-B1
Hardware Manual R1.0
Page 12 of 28 Embien Tech. India Pvt. Ltd
3.2 Crystal
The following are the clock source options available in KW31Z BLE SoC
• Reference Oscillator — crystal reference oscillator, supports 32MHz
• 32 kHz Oscillator — 32.768 kHz crystal reference oscillator
• Multipurpose Clock Generator(MCG)
Frequency-locked loop (FLL) controlled by internal or external reference
o 20 MHz to 48 MHz FLL output
Internal reference clocks — Can be used as a clock source for other on-chip
peripherals
On-chip RC oscillator range of 31.25 kHz to 39.0625 kHz with 2% accuracy
across full temperature range
On-chip 4MHz oscillator with 5% accuracy across full temperature range
The 32MHz crystal reference oscillator is supported for BLE radio modes and MCU can drive its
clock either from the crystal reference oscillator or the FLL (frequency locked loop). The
32/32.768 KHz crystal reference oscillator is used to maintain precise Bluetooth radio time in
low power modes.
The following picture depicts the clocking diagram of KW31Z BLE SoC
Figure 3: Clocking Diagram
eStorm-B1 includes internal 32MHz and 32.768KHz crystal for driving the internal 32MHz and
32.768KHz crystal reference oscillator.
Embien Technologies – eStorm-B1
Hardware Manual R1.0
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3.3 RF Section
RF section in the eStorm-B1 is carefully designed based on NXP’s RF circuit recommendations.
Radio block inside KW31Z includes constant envelope transmitter and a Quadrature zero-IF
receiver. Since the radio has an inbuilt balun, other than matching components no external
circuitry is required. The antenna output from the SoC is single ended with characteristic
impedance of 50ohms.
The 50ohms single ended impedance antenna trace is connected to wire antenna (through-
hole connector) with few matching components in between.
3.4 Shield
Metal shield arrangement is provided to protect the module from spurious surges.
Embien Technologies – eStorm-B1
Hardware Manual R1.0
Page 14 of 28 Embien Tech. India Pvt. Ltd
4. eStorm-B1 Pin Outs
This section describes pin outs of the eStorm-B1 Module.
eStorm-B1 expansion connectors J5, J6 and J8 can be used to interface module specific to
application requirements. Below table gives the details of the expansion connector pin outs.
The Column heading descriptions are as follows:
Pin No: eStorm-B1 expansion connectors (J5, J6, J8) pin numbers
Connection name: Reference name of the expansion connector pin
uC Pin No: The BLE SoC pin to which this pin is connected to.
Processor signal name: KW31Z SoC pin name corresponding to SoC pin number.
I/O: Signal type for the pins.
I/O : Input and/Or Output
O : Output Only
I : Input Only
P : Power
G : Ground
Pin description: Provides brief explanation of the pin functionality and usage. Please refer to
NXP Semiconductors KW31Z technical datasheet (MKW41Z/31Z/21Z Data Sheet) for detailed
description of Processor pins.
Comment: Comments on the pin usage.
Embien Technologies – eStorm-B1
Hardware Manual R1.0
Page 15 of 28 Embien Tech. India Pvt. Ltd
The following picture depicts the arrangement of expansion connectors in the module
Figure 4: eStorm-B1 connector arrangement
Pin No
Connection Name
uC Pin No.
Processor Signal Name
I / O
Pin description Comment
J5.1 GND G Digital Ground
J5.2 GND G Digital Ground
J5.3 PTC3 39
PTC3 I/O
General purpose
digital
input/output pin.
TSI0_CH15 I
Touch Sensing
Input capacitive
pins
LLWU_P11 I Wakeup inputs
RX_SWITCH O
Front End Module
Receive mode
signal
I2C1_SDA I/O I2C serial data
line
LPUART0_TX I/O Transmit Data
TPM0_CH1 I/O TPM channel
DTM_TX O Direct Test Mode
Transmit
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Hardware Manual R1.0
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Pin No
Connection Name
uC Pin No.
Processor Signal Name
I / O
Pin description Comment
J5.4 PTC4 40
PTC4 I/O
General purpose
digital
input/output pin.
TSI0_CH0 I
Touch Sensing
Input capacitive
pins
LLWU_P12 I Wakeup inputs
ANT_A O
Antenna selection
A for Front
End Module
support
EXTRG_IN
LPUART0_ CTS_b
I Clear To Send
TPM1_CH0 I/O TPM channel
BSM_DATA I/O
Bit Streaming
Mode Data
signal, 802.15.4
packet data
stream data line
J5.5 I2C_SCL 42
TSI0_CH2 I
Touch Sensing
Input capacitive
pins
Used as I2C serial
clock interface in
I2C enabled
modules
PTC6 I/O
General purpose
digital
input/output pin
LLWU_P14 I Wakeup inputs
XTAL_OUT_EN I
26 MHz/32 MHz
Clock
output enable for
XTAL_OUT
I2C1_SCL I/O I2C serial clock
line
LPUART0_RX I Receive Data
TPM2_CH0 I/O TPM channel
BSM_FRAME O
Bit Streaming
Mode Frame
signal, 802.15.4
packet data
stream frame line
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Hardware Manual R1.0
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Pin No
Connection Name
uC Pin No.
Processor Signal Name
I / O
Pin description Comment
J5.6 I2C_SDA 43
TSI0_CH3 I
Touch Sensing
Input capacitive
pins
Used as I2C serial
data interface in
I2C enabled
modules
PTC7 I/O
General purpose
digital
input/output pin
LLWU_P15 I Wakeup inputs
SPI0_PCS2 O Chip Select
I2C1_SDA I/O I2C serial data
line
LPUART0_TX I/O Transmit Data
TPM2_CH1 I/O TPM channel
BSM_DATA I/O
Bit Streaming
Mode Data
signal, 802.15.4
packet data
stream data line
J5.7 UART_RTS 45
TSI0_CH4 I
Touch Sensing
Input capacitive
pins
Used as UART serial
RTS interface in
UART enabled
Modules
PTC16 I/O
General purpose
digital
input/output pin
LLWU_P0 I Wakeup inputs
SPI0_SCK I/O Serial Clock
I2C0_SDA I/O I2C serial data
line
LPUART0_RTS_b O Request To Send
TPM0_CH3 I/O TPM channel
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Hardware Manual R1.0
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Pin No
Connection Name
uC Pin No.
Processor Signal Name
I / O
Pin description Comment
J5.8 UART_RX 46
TSI0_CH5 I
Touch Sensing
Input capacitive
pins
Used as UART serial
RX interface in
UART enabled
modules
PTC17 I/O
General purpose
digital
input/output pin
LLWU_P1 I Wakeup inputs
SPI0_SOUT I/O Serial data out
I2C1_SCL I/O I2C serial clock
line
LPUART0_RX I Receive Data
BSM_FRAME O
Bit Streaming
Mode Frame
signal, 802.15.4
packet data
stream frame line
DTM_RX I Direct Test Mode
Receive
J5.9 UART_TX 47
TSI0_CH6 I
Touch Sensing
Input capacitive
pins
Used as UART serial
TX interface in
UART enabled
Modules
PTC18 I/O
General purpose
digital
input/output pin
LLWU_P2 I Wakeup inputs
SPI0_SIN I Serial Data In
I2C1_SDA I/O I2C serial data
line
LPUART0_TX I/O Transmit Data
BSM_DATA I/O
Bit Streaming
Mode Data
signal, 802.15.4
packet data
stream data line
DTM_TX O Direct Test Mode
Transmit
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Hardware Manual R1.0
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Pin No
Connection Name
uC Pin No.
Processor Signal Name
I / O
Pin description Comment
J5.10 UART_CTS 48
TSI0_CH7 I
Touch Sensing
Input capacitive
pins
Used as UART serial
CTS interface in
UART enabled
Modules
PTC19 I/O
General purpose
digital
input/output pin
LLWU_P3 I Wakeup inputs
SPI0_PCS0 O Chip Select
I2C0_SCL I/O I2C serial clock
line
LPUART0_CTS_b I Clear To Send
BSM_CLK O
Bit Streaming
Mode (BSM)
Clock signal,
802.15.4
packet data
stream clock line
BLE_RF_ ACTIVE
O
Signal to indicate
future BLE
activity.
J5.11 VIN P Digital supply
Used for DC
positive supply
input
Table 3: J5 connector signal list
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Hardware Manual R1.0
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Pin No
Connection Name
uC
Pin No.
Processor Signal Name
I
/ O
Pin description Comment
J6.1 GND G Digital Ground Used for DC supply
ground
J6.2 VIN P Digital supply
Used for DC
positive supply
input
J6.3 ADC_DIFF- 25
ADC0_DM0 I
ADC Channel 0 Differential Input Negative
CMP0_IN1 I Analog voltage inputs
J6.4
ADC_DIFF+
24
ADC0_DP0 I
ADC Channel 0
Differential
Input Positive
CMP0_IN0 I Analog voltage inputs
J6.5 PTB18 23
DAC0_OUT O DAC output
ADC0_SE4 I
ADC Channel 0
Single-
ended Input 4
CMP0_IN2 I Analog voltage
inputs
PTB18 I/O
General purpose
digital
input/output pin
I2C1_SCL I/O I2C serial clock
line
TPM_CLKIN0 I External clock
TPM0_CH0 I/O TPM channel
NMI_b I Non-maskable
interrupt
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Hardware Manual R1.0
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Pin No
Connection Name
uC
Pin No.
Processor Signal Name
I
/ O
Pin description Comment
J6.6 GND G Digital Ground Used for DC supply
ground
J6.7 ADC_SE2 19
ADC0_SE2 I
ADC Channel 0
Single-
ended Input 2
CMP0_IN4 I Analog voltage
inputs
PTB3 I/O
General purpose
digital
input/output pin
CLKOUT O Internal clocks
monitor
TPM1_CH1 I/O TPM channel
RTC_CLKOUT O 1 Hz square-wave
output
J6.8
ADC_SE3
18
ADC0_SE3 I
ADC Channel 0
Single-
ended Input 3
CMP0_IN3 I Analog voltage
inputs
PTB2 I/O
General purpose
digital
input/output pin
RF_NOT_ALLOWED I
Radio off signal,
intended for
WiFi coexistence
control
DTM_TX O Direct Test Mode
Transmit
TPM1_CH0 I/O TPM channel
J6.9 TIMER2 17
ADC0_SE1 I
ADC Channel 0
Single-
ended Input 1
CMP0_IN5 I Analog voltage inputs
PTB1 I/O
General purpose
digital
input/output pin
DTM_RX I Direct Test Mode
Receive
I2C0_SDA I/O I2C serial data
line
LPTMR0_ALT1 I Pulse counter
input pin
TPM0_CH2 I/O TPM channel
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Pin No
Connection Name
uC
Pin No.
Processor Signal Name
I
/ O
Pin description Comment
J6.10 TIMER1 16
PTB0 I/O
General purpose
digital
input/output pin
LLWU_P8 I Wakeup inputs
XTAL_OUT_EN I
26 MHz/32 MHz
Clock
output enable for
XTAL_OUT
I2C0_SCL I/O I2C serial clock
line
CMP0_OUT O Comparator
output
TPM0_CH1 I/O TPM channel
CLKOUT O Internal clocks
monitor
J6.11 GND G Digital Ground
Table 4: J6 connector signal list
Pin No
Connection Name
uC
Pin No.
Processor Signal Name
I
/ O
Pin description Comment
J8.1 GND G Digital Ground
J8.2 SWD_DIO 1
TSIO_CH8 I
Touch Sensing
Input capacitive
pins
Used for SWD
debug interface by
default
PTA0 I/O
General purpose
digital
input/output pin
SPI0_PCS1 O Chip Select
TPM1_CH0 I/O TPM channel
SWD_DIO I/O
Serial Wire Debug
Data
Input/Output
J8.3 SWD_CLK 2
TSI0_CH9 I
Touch Sensing
Input capacitive
pins
Used for SWD
debug interface by
default
PTA1 I/O
General purpose
digital
input/output pin
SPI1_PCS0 O Chip Select
TPM1_CH1 I/O TPM channel
SWD_CLK I Serial Wire Clock
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Pin No
Connection Name
uC Pin No.
Processor Signal Name
I / O
Pin description Comment
J8.4 RESET 3
PTA2 I/O
General purpose
digital
input/output pin Used for SWD
debug interface by
default TPM0_CH3 I/O TPM channel
RESET_b I/O
Reset
bidirectional
signal
J8.5 SPI_SOUT 4
TSI0_CH10 I
Touch Sensing
Input capacitive
pins
Used as SPI MISO
interface in SPI
enabled modules
PTA16 I/O
General purpose
digital
input/output pin
LLWU_P4 I Wakeup inputs
SPI1_SOUT I/O Serial data out
TPM0_CH0 I/O TPM channel
J8.6 SPI_SIN 5
TSI0_CH11 I
Touch Sensing
Input capacitive
pins
Used as SPI MOSI
interface in SPI
enabled modules
PTA17 I/O
General purpose
digital
input/output pin
LLWU_P5 I Wakeup inputs
RF_RESET I Radio reset signal
SPI1_SIN I Serial Data In
TPM_CLKIN1 I External clock
J8.7 SPI_SCK 6
TSI0_CH12 I
Touch Sensing
Input capacitive
pins
Used as SPI clock
interface in SPI
enabled modules
PTA18 I/O
General purpose
digital
input/output pin
LLWU_P6 I Wakeup inputs
SPI1_SCK I/O Serial Clock
TPM2_CH0 I/O TPM channel
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Pin No
Connection Name
uC Pin No.
Processor Signal Name
I / O
Pin description Comment
J8.8 SPI_PCS0 7
TSI0_CH13 I
Touch Sensing
Input capacitive
pins
Used as SPI chip
select interface in
SPI enabled
modules
ADC0_SE5 I
ADC Channel 0
Single-
ended Input 5
PTA19 I/O
General purpose
digital
input/output pin
LLWU_P7 I Wakeup inputs
SPI1_PCS0 O Chip Select
TPM2_CH1 I/O TPM channel
J8.9 PTC5 41
TSI0_CH1 I
Touch Sensing
Input capacitive
pins
PTC5 I/O
General purpose
digital
input/output pin
LLWU_P13 I Wakeup inputs
RF_NOT_ ALLOWED
I
Radio off signal,
intended for
WiFi coexistence
control
LPTMR0_ALT2 I Pulse counter
input pin
LPUART0_RTS_b O Request To Send
TPM1_CH1 I/O TPM channel
BSM_CLK O
Bit Streaming
Mode (BSM)
Clock signal,
802.15.4
packet data
stream clock line
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Hardware Manual R1.0
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Pin No
Connection Name
uC Pin No.
Processor Signal Name
I / O
Pin description Comment
J8.10 PTC2 38
TSI0_CH14 I
Touch Sensing
Input capacitive
pins
PTC2 I/O
General purpose
digital
input/output pin
LLWU_P10 I Wakeup inputs
TX_SWITCH O
Front End Module
Transmit
mode signal
I2C1_SCL I/O I2C serial clock
line
LPUART0_RX I Receive Data
DTM_RX I Direct Test Mode
Receive
J8.11 PTC1 37
PTC1 I/O
General purpose
digital
input/output pin
ANT_B O
Antenna selection
B for Front
End Module
support
I2C0_SDA I/O I2C serial data
line
LPUART0_RTS_b O Request To Send
TPM0_CH2 I/O TPM channel
BLE_RF_ ACTIVE
O
Signal to indicate
future BLE
activity.
Table 5: J8 connector signal list
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Hardware Manual R1.0
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5. eStorm-B1 Pin Layouts
All the connections between eStorm-B1 module and external host processor or PC will be via
33 pin surface mount or through-hole connector. The 33 pin external interface is split into
three 11 pin connectors at the left, right and bottom sides.
1mm X 0.6mm rectangular pads at bottom supports surface mounting and 0.4mm half plated
holes at the board edges supports through-hole mounting via 1mm pitch headers.
The following picture illustrates the layout of the pad layout in eStorm-B1 module in top view
and bottom view,
Figure 5: eStorm-B1 pad layout (Top View)
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Hardware Manual R1.0
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Figure 6: eStorm-B1 pad layout (Bottom View)
6. Electrical and Environmental Specification
Parameter Min Typical Max
Input power supply 1.71V DC - 3.6V DC
Operating temperature -40 degree Celsius +25 degree Celsius +105 degree Celsius
Embien Technologies – eStorm-B1
Hardware Manual R1.0
Page 28 of 28 Embien Tech. India Pvt. Ltd
7. Legal Notice
7.1 Customer Support
Embien Technologies are excited to offer our customers an easy ―out of box‖ experience by
providing board support package, software demos, user manuals and other electro mechanical
documentation to get our evaluation modules up and running.
Customer product development support is a part of standard support offer from Embien
Technologies. If customers are interested, Embien Technologies can offer product development
services around Embien’s eStorm-B1 platform. This includes application board (daughter
board) development, Board Support package (BSP) development and application software
development.
7.2 Usage Restriction
Embien Technologies products are excellent starting point for customer’s applications
development. But, selection and usage of Embien Technologies products for a particular
application is responsibility of customers. In order to minimize risks associated with customer
applications, the customer must use adequate design and operating safeguards to minimize
inherent or procedural hazards.
Embien Technologies products are not intended for use in life support systems and appliances,
nuclear systems or systems where malfunction can reasonably be expected to result in
personal injury, death or severe property or environmental damage. Any use of products by
the customer for such purposes are at the customer’s own risk.