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Background Statement for SEMI Draft Document 4810 NEW STANDARD: TEST METHOD FOR DETERMINATION OF DISLOCATION ETCH PIT DENSITY IN MONOCRYSTALS OF III-V COMPOUND SEMICONDUCTORS Notice: This background statement is not part of the balloted item. It is provided solely to assist the recipient in reaching an informed decision based on the rationale of the activity that preceded the creation of this Document. Notice: Recipients of this Document are invited to submit, with their comments, notification of any relevant patented technology or copyrighted items of which they are aware and to provide supporting documentation. In this context, “patented technology” is defined as technology for which a patent has issued or has been applied for. In the latter case, only publicly available information on the contents of the patent application is to be provided. Background Statement: Dislocation density as a measure of crystalline perfection has gained increasing importance during the last decade for III-V compound semiconductor wafers. This is due to the transition from ion implantation to epitaxial processes as the predominant production technique for microwave transistors and integrated circuits. The degradation behavior of high power bi-polar devices, like HBT, high-brightness LED and laser-diodes, is strongly influenced by the number of dislocations grown from the substrate in to the functional layers of the epitaxial structure. The formerly existing ASTM and DIN standards for measurement of dislocation etch pit density (EPD) are partly outdated and are no longer supported by the respective organizations. The valid SEMI standards M36 and M37 cover only special GaAs and InP wafers. This document is intended to replace these standards giving a comprehensive guidance for the EPD measurement on most of the industrial relevant III-V compound semiconductor materials Review and Adjudication Information Task Force Review Committee Adjudication Group: Determination of Dislocation Etch Pit Density in Monocrystals of III-V-Compound Semiconductors Europe Compound Semiconductor Materials Date: Tuesday 13 March 2012 Tuesday 13 March 2012 Time & Timezone: TBD TBD Location: CS Europe CS Europe

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Background Statement for SEMI Draft Document 4810NEW STANDARD: TEST METHOD FOR DETERMINATION OF DISLOCATION ETCH PIT DENSITY IN MONOCRYSTALS OF III-V COMPOUND SEMICONDUCTORSNotice: This background statement is not part of the balloted item. It is provided solely to assist the recipient in reaching an informed decision based on the rationale of the activity that preceded the creation of this Document.

Notice: Recipients of this Document are invited to submit, with their comments, notification of any relevant patented technology or copyrighted items of which they are aware and to provide supporting documentation. In this context, “patented technology” is defined as technology for which a patent has issued or has been applied for. In the latter case, only publicly available information on the contents of the patent application is to be provided.

Background Statement:

Dislocation density as a measure of crystalline perfection has gained increasing importance during the last decade for III-V compound semiconductor wafers. This is due to the transition from ion implantation to epitaxial processes as the predominant production technique for microwave transistors and integrated circuits. The degradation behavior of high power bi-polar devices, like HBT, high-brightness LED and laser-diodes, is strongly influenced by the number of dislocations grown from the substrate in to the functional layers of the epitaxial structure. The formerly existing ASTM and DIN standards for measurement of dislocation etch pit density (EPD) are partly outdated and are no longer supported by the respective organizations. The valid SEMI standards M36 and M37 cover only special GaAs and InP wafers.

This document is intended to replace these standards giving a comprehensive guidance for the EPD measurement on most of the industrial relevant III-V compound semiconductor materials

Review and Adjudication Information

Task Force Review Committee AdjudicationGroup: Determination of Dislocation Etch Pit Density

in Monocrystals of III-V-Compound Semiconductors

Europe Compound Semiconductor Materials

Date: Tuesday 13 March 2012 Tuesday 13 March 2012Time & Timezone: TBD TBDLocation: CS Europe CS EuropeCity, State/Country: Frankfurt, Germany Frankfurt, GermanyLeader(s): U. Kretzer (FCM) A. Weber (SiCrystal)

Standards Staff: Michael Tran (SEMI NA)[email protected]

Michael Tran (SEMI NA)[email protected]

This meeting’s details are subject to change, and additional review sessions may be scheduled if necessary. Contact the task force leaders or Standards staff for confirmation.

Telephone and web information will be distributed to interested parties as the meeting date approaches. If you will not be able to attend these meetings in person but would like to participate by telephone/web, please contact Standards staff.

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SEMI Draft Document 4810NEW STANDARD: TEST METHOD FOR DETEMINATION OF DISLOCATION ETCH PIT DENSITY IN MONOCRYSTALS OF III-V COMPOUND SEMICONDUCTORS1 Purpose1.1 The purpose of this document is to specify a test method for determination of the dislocation etch pit density of mono-crystals and wafers of the III-V compound semiconductors GaAs, InP and GaP.

2 Scope2.1 This standard test method covers the determination of dislocation etch pit density on round test slices and commercial wafers of III-V compound semiconductors using optical microscopy for identification and registration of dislocation etch pits.

2.2 The dislocation etch pit density is used as a measure for the dislocation density or the crystallographic perfection of a crystal, respectively.

2.3 This test method describes methods for preparation of slices and wafers of the III-V compound semiconductors GaAs, InP and GaP by structural etching. These etching procedures are performed to reveal dislocations by formation of etch pits on the surface of the test specimens.

2.4 The described methods for identification and registration of etch pits as well as the procedures for evaluation can be applied also to mono-crystalline semiconductor slices or wafers of other materials or orientations, provided that there are suitable structural etching procedures available.

2.5 This test method is applicable to material with dislocation densities up to 200,000 cm -2. The resistivity and conductivity type of the material is irrelevant.

NOTICE: SEMI Standards and Safety Guidelines do not purport to address all safety issues associated with their use. It is the responsibility of the users of the Documents to establish appropriate safety and health practices, and determine the applicability of regulatory or other limitations prior to use.

3 Referenced Standards and Documents3.1 SEMI Standards

SEMI M10 — Standard Nomenclature for Identification of Structures and Features Seen on Gallium Arsenide Wafers

SEMI M40 — Guide for Measurement of Roughness of Planar Surfaces on Silicon Wafers

SEMI M59 — Terminology for Silicon Technology

SEMI MF26 — Test Method for Determining the Orientation of a Semiconductive Single Crystal

NOTICE: Unless otherwise indicated, all documents cited shall be the latest published versions.

4 Terminology1: Refer to SEMI’s Compilation of Terms (COT) for a list of the most current terms and their definitions.

4.1 Terms, acronyms, and symbols relating to compound semiconductor material technology are defined in SEMI M10 and M59.

4.2 Other Terms Used in this Standard

4.2.1 saucer pit — a shallow etch pit in a crystal surface with no clearly recognizable bottom point, indicating other types of crystal lattice defect instead of dislocations

4.2.2 dislocation etch pit density (EPD) — the number of dislocation etch pits per unit area

This is a Draft Document of the SEMI International Standards program. No material on this page is to be construed as an official or adopted Standard or Safety Guideline. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited.

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Semiconductor Equipment and Materials International3081 Zanker RoadSan Jose, CA 95134-2127Phone: 408.943.6900, Fax: 408.943.7943

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4.2.3 off-orientation — deviation of a crystal surface from a crystallographic plane, characterized by an angle ϕ (see SEMI MF26) and a direction of tilt, which is given by the projection of a vector normal to the crystal surface onto the referenced crystallographic plane

4.2.4 measurement field — a rectangular area of the surface of the test specimen for which a local value of the dislocation etch pit density is determined

4.2.5 measurement location — the center of the measurement field specified by coordinates or an index which refers to a measurement location plan

4.2.6 measurement location plan — list of measurement locations for which measurements of local EPD are performed

5 Summary of Test Method5.1 In this test method dislocation etch pit density in monocrystals of III-V compound semiconductors is determined as a measure for the dislocation density.

5.2 Test specimens for this method are wafers or slices of monocrystals with surfaces with a deviation from the {100} crystallographic plan of less than 15°.

5.3 Rough surfaces of etch specimens are flattened by polish-etching with specific etchants.

5.4 The test specimens are etched with an etchant specific for the semiconductor material. On the surfaces of test specimens etch pits of characteristic shape are formed at the intersection points of dislocation lines with the surface.

5.5 The number of etch pits within certain measuring fields is determined by counting unsing an optical microscope. The number and position of measuring positions is defined by a measurement location plan.

5.6 The etch pit density is calculated as the number of etch pits per area unit.

6 Physical Background6.1 When the surface of a test specimen is treated by the etching techniques according to this standard, distinctive etch pits of characteristic shapes will result at the intersections of dislocation lines with the surface. Etching of {100} surfaces of GaAs generates elongated hexagonal etch pits (Fig. 1a), while on {100} surfaces of InP and GaP approximately rectangular etch pits appear (Fig. 1b and 1c). The side-walls of etch pits correspond to low-index planes of the crystal lattice. They converge towards a common bottom point. This bottom point is a characteristic feature of dislocation etch pits and allows a discrimination from other etching features.

This is a Draft Document of the SEMI International Standards program. No material on this page is to be construed as an official or adopted Standard or Safety Guideline. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited.

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a) b)

c)

Figure 1 Microscopical Images of Dislocation Etch Pits on {100} Surfaces of Different III-V Compound Semiconductor

Materials: GaAs (a), InP (b) and GaP (c)

Figure 2 Dislocation Etch Pit (A) and Saucer Pit (B) on a {100} GaAs Surface

This is a Draft Document of the SEMI International Standards program. No material on this page is to be construed as an official or adopted Standard or Safety Guideline. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited.

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a) b)

c) d)

Figure 3 Microscopical images of dislocation etch pits on GaAs surfaces with an off-orientation from the {100}

crystallographic plane of 6° (a, b) and 15° (c, d). The off-orientation is directed to the {111}Ga face (a, c) or the {111}As face (b, d). The distortion of the shape of etch pits due to off-orientation of the sample surface is

stronger in the case of tilt to the {111} As face. It is recommended to use that side of a wafer for EPD measurement which shows etch pits as in a) and c).

6.2 Besides dislocations other defects, such as point defects, precipitates and mechanical damage can cause the formation of etch pits. The resulting etch pits can be distinguished from dislocation etch pits by the missing bottom point (Fig. 2).

6.3 On surfaces deviating from the {100} crystallographic plane (off-orientated surfaces) the shape of dislocation etch pits changes depending on angle and direction of off-orientation (Fig. 3).When the angle ϕ exceeds a value of about 15° the distortion of the shape of etch pits prevents a reliable identification.

6.4 As demonstrated in Fig. 3 for GaAs, the distortion is stronger if the surface is tilted to a {111}As face direction as compared to a tilt to a {111}Ga face direction. For other III-V semiconductors a similar influence of tilt direction is observed. In the case of strong distortion of shape, as shown in Fig. 3d, a reliable identification of etch pits is impossible. Because of the symmetry properties of the zinc blende structure of III-V compound semiconductors the tilt direction changes from front to backside of a wafer in respect to the face directions. Hence, it is possible to choose that side of a wafer for EPD measurement, which shows the better developed etch pits.

This is a Draft Document of the SEMI International Standards program. No material on this page is to be construed as an official or adopted Standard or Safety Guideline. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited.

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6.5 Specific etchants are used which have a higher etching rate selectively at the intersection of the dislocation line with the surface. The suitable etchants are specific for a particular semiconductor and a particular crystallographic orientation of the surface (Table 1).

6.6 For a reliable identification of etch pits their lateral dimension must be within certain limits. The lower limit depends on the magnification of the microscope used for inspection. The diameter of etch pits should be at least ten times the optical resolution of the microscope. Overlapping of adjacent etch pits interferes with their reliable identification. Therefore their size should not exceed an upper limit which depends on dislocation density. For material with dislocation density below 10,000 cm-2 suitable diameters of etch pits are 30 to 60 µm. For higher dislocation densities between 10,000 cm-2 and 100,000 cm-2 their diameter should be 20 to 40 µm.

7 Equipment and auxiliary materials7.1 Etching equipment for molten potassium hydroxide (KOH)

7.1.1 All equipment must be fabricated from or sheathed by material chemically and thermally resistant against molten KOH, e.g. silver, pure nickel of a purity of at least 99.5%, glassy carbon

7.1.2 Crucible, containing molten KOH

7.1.3 Carrier for samples

7.1.4 Tweezers for handling of samples

7.1.5 Temperature measurement instrument with type K thermocouple

7.1.6 Hot plate or furnace for temperatures up to 400°C

7.2 Etching equipment for acidic etchants

7.2.1 All equipment must be fabricated from or sheathed by material chemically resistant against the used etchant, e.g. PTFE (polytetrafluoroethylene), ETFE (ethylene-tetrafluoroethylene), PFA (perfluoroalkoxy), PMP (polymethylpenten)

7.2.2 Beaker or etching basin, containing the etchant

7.2.3 Cooling basin or thermostat for controlling the temperature of etchant

7.2.4 Carrier for samples

7.2.5 Tweezers for handling of samples

7.3 Equipment for test specimen inspection

7.3.1 Incident light microscope with 50× to 200× magnification

7.3.2 Stage with sample holder or wafer chuck movable in the plane of sample surface. The range of motion has to allow the positioning of each part of the sample surface within the measuring field of the microscope. For an automatic execution of measurement a computer-controlled motor-driven stage is required.

7.3.3 CCD camera connected to the camera port of the microscope. For an automatic execution of measurement an electronic image analysis system is required.

7.4 Auxiliary materials

7.4.1 The use of chemicals of grade 1 purity is recommended (for references to specifications and guidelines see § 3). The suitability of chemicals of lower purity has to be tested for the particular case by the user of this standard.

8 Procedure8.1 Sample preparation

8.1.1 For a reliable identification and registration of etch pits a smooth surface is required, provided by a chemical-mechanical or etch-polishing process. Suitable etchants and conditions are listed in Table 2. After etching test specimens are rinsed with deionized water and dry-blown with filtered air or nitrogen.

This is a Draft Document of the SEMI International Standards program. No material on this page is to be construed as an official or adopted Standard or Safety Guideline. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited.

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8.1.2 For polish-etching the surface of test specimens must have an average rms micro-roughness Rq (SEMI M40) of Rq ≤ 15 µm and an off-orientation from the {100} crystallographic plane of ϕ ≤ 15°. If Rq > 15 µm or if the surface shows sawing marks, the surface must be flattened by lapping or grinding.

8.1.3 The roughness of the chemo-mechanical or etch-polished surface of the test specimens should not exceed a rms micro-roughness Rq of 100 nm within the area of the measuring fields. The etching time for etch-polishing time is influenced by temperature and eventual depletion of the etching solution.

8.1.4 The polished test specimens are etched by the structural etchants to form dislocation etch pits. Suitable etchants and conditions are listed in Table 2. The size of etch pits depends on etching time and temperature of the etchant. Before inserting GaAs test specimens into the KOH melt they should be pre-heated to the temperature of the melt to avoid breakage due to thermal shock. After etching test specimens are rinsed with deionized water and dry-blown with filtered air or nitrogen.

Table 1 Structural Etchants of {100} Surfaces of GaAs, InP and Ga

Material Structural Etchant Etching Time

{100} GaAs Molten KOH at 370°C to 400°C1 4 to 15 min.

{100} InP Mixture of aqueous solution of HBr (40%) and H2O2 in a ratio of 2:1 at room temperature

5 to 8 min.

{100} GaP Mixture of aqueous solutions of HF (40%) and H2O2 (30%) in a ratio of 3:1 at 70°C to 80°C2

5 to 8 min.

8.2

Measurement of dislocation density

8.2.1 General Remarks

8.2.1.1 In the considered compound semiconductors dislocations tend to form a three-dimensional cellular network. This can be observed in particular in material with dislocation density above 2000 to 3000 cm -2 and low doping levels. The surface of a test specimen represents a two dimensional cross section through this network. The dislocation etch pits are arranged in linear structures forming cell boundaries; whereas the inner volume of the cells

1 J.G. Grabmaier, C.B. Watson, Dislocation Etch Pits in Single Crystal GaAs, phys. stat. sol. (b) 32 (1969) K13 – K152 D.G. Hayes, A. Rasul, S.M. Davidson, A dislocation etchant for {100} gallium phosphide, Journal of Electronic Materials, 5 (1976) 351 - 361

This is a Draft Document of the SEMI International Standards program. No material on this page is to be construed as an official or adopted Standard or Safety Guideline. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited.

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Table 1 Polishing Etchants for {100} surfaces of GaAs, InP and GaP

Material Polishing etchant Etching time

{100} GaAs mixture of conc. H2SO4, aqueous solution of H2O2 (30%) and H2O in a ratio of 5:1:1 at 50°C to 70°C

5 to 15 min.

{100} InP mixture of aqueous solutions of HBr (40%) and H2O2 (30%) and H2O in a ratio of 1:0.07:1 at 40°C to 60°C

2 to 8 min.

{100} GaP mixture of aqueous solutions of HBr (40%) and H2O2 (30%) and H2O in a ratio of 1:0.07:1 at 40°C to 60°C

2 to 8 min.

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is almost free of etch pits (Fig. 4). The typical cell size can vary from 50 to 200 µm in undoped LEC-grown GaAs to 0.5 to 3 mm in undoped VGF or VB-grown GaAs.

a) b)

Figure 4 Dislocation Etch Pit Structures on {100} Surfaces of GaAs with Different Dislocation Densities a) Undoped

LEC-grown GaAs with EPD 100,000 cm-2 b) Undoped VGF-grown GaAs with EPD 5000 cm-2

8.2.2 Measuring fields and measurement locations

8.2.2.1 A measuring field is an area of quadratic shape with a width aF on the surface of the test specimen of diameter d for which a value of the etch pit density is determined. The measurement location is the geometrical center of a measurement field. The minimum distance of a measurement location from the edge of the test specimen is given by the edge distance d (see Table 3). All measurement locations are positioned within a radius of (d /2)−d from the center of the test specimen.

8.2.3 Measurement location plans

8.2.3.1 Measurement location plan A

8.2.3.1.1 The measurement locations are arranged on a regular quadratic grid with spacing aG, aligned along the <110> directions. The center of the test specimen is a measurement location. The grid spacing aG has to be smaller

than d10

.

8.2.3.2 Measurement location plan B

8.2.3.2.1 The measurement locations are arranged symmetrically to the center of the test specimen on diameter lines along the <110> and <100> crystallographic axes (see Fig. 5a). The center of the test specimen is a common measurement location for both axes. On each axis a sufficient number of measurement locations are positioned with equal spacing. The distance of two neighboring measurement locations must not exceed 25 mm (see Table 3).

This is a Draft Document of the SEMI International Standards program. No material on this page is to be construed as an official or adopted Standard or Safety Guideline. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited.

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edgedistance

<110>

centre of test specim en

m easuring fie ld

grid spacing a G

<100>

<110>

45°

1 2 3 4 5

7

8

9

6

edgedistance

m easuring fie ld

a) b)

Figure 5 Measurement Location Plans for Test Slices or Wafers with a Diameter of 100 mm. a) Measurement

Location Plan b) Measurement Location Plan B

8.2.4 Application of measurement location plans

8.2.4.1 Measurement location plan A can be applied for all kind of material covered by this standard. Measurement location plan B is provided for test specimens with etch pit densities between 10,000 cm -2 and 200,000 particularly originating from LEC-grown mono-crystals.

8.2.4.2 The width of measuring fields aF have to accommodate the typical cell size of the material to ensure an adequate precision of measurement. For material with etch pit density between 10,000 cm -2 and 200,000 cm-2 aF

should be at least 500 µm. For material with etch pit density between 2000 cm -2 and 10 000 cm-2 and for material exhibiting no cellular arrangement of etch pits aF should be at least 1 mm. The value of aF must not exceed the distance between measurement locations to avoid overlapping of measuring fields.

8.2.4.3 For measurement location plan B the fraction Fe of the evaluated test specimen surface is given by equation (1):

Fe=a

F2

aG2 (1)

8.2.4.4 The value Fe determines decisively the precision of the testing procedure (see § 9).

This is a Draft Document of the SEMI International Standards program. No material on this page is to be construed as an official or adopted Standard or Safety Guideline. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited.

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Table 2 Edge Distance, Minimum Number of Measurement Locations for Measurement Location Plan B for Standard Wafer Diameters

Diameter d of Test Specimen (mm) Edge Distance d (mm)

Minimum Number Of Measurement Locations For Measurement

Location Plan B

50.8 3.0 976.2 4.5 9100 6.0 9125 7.5 13150 9.0 13200 12.0 17

9 Calculation9.1 Local value of EPD

9.1.1 For each measurement location a local value of etch pit density EPDL is calculated from the number of etch pits N within the measuring field according to equation (2):

EPDL=Na

F 2 (2) 9.1.2 The value of aF must be given in cm to obtain the local EPD in cm-2.

9.2 Average value of EPD

9.2.1 The average EPD value for the test specimen has to be calculated from the EPDL values equally weighted by:

EPDav=1N ∑ EPDL

(3)9.2.2 If for measurement location plan A the width of measurement fields aF is chosen equal to the grid spacing aG

fraction Fe is 1, i.e. the complete surface of the test specimen except of the edge region is evaluated. This gives the opportunity to determine the true value of EPDav of the test specimen.

9.3 Optional graphical data representation

9.3.1 Frequency distribution of etch pit density

9.3.1.1 For a test specimen measured using measurement location plan A the distribution of dislocation density can be represented graphically by a histogram displaying the frequency of etch pit densities for the locations measured (Fig. 6).

9.3.1.2 To obtain a reasonable representation of the data the interval limits of the frequency distribution have to be

set to integer multiples of 1

aF2

.

This is a Draft Document of the SEMI International Standards program. No material on this page is to be construed as an official or adopted Standard or Safety Guideline. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited.

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4000 8000 12000 16000 200000.00

0.01

0.02

0.03

0.04

0.05

0.06

0.07

0.08

relative fre

quen

cy

etch pit density [cm-2]

4000 8000 12000 16000 200000.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

cumulative fre

quen

cy

etch pit density [cm-2]

Figure 6 Example for the Graphical Representation of Frequency Distribution of Etch Pit Density

9.3.2 Etch pit density maps

9.3.2.1 For a test specimen measured using measurement location plan A the measured data can be plotted as a map using a color or gray scale to code the values measured at the individual measurement locations (Fig. 7).

Figure 7 Examples for etch pit density maps a) 150 mm undoped semi-insulating GaAs wafer, EPDav = 8410 cm-2,

measuring field width aF = 0.5 mm, evaluated fraction of surface Fe = 100% b) 100 mm silicon doped GaAs wafer, EPDav = 54 cm-2, measuring field width aF = 0.5 mm, evaluated fraction of surface Fe = 100%

10 Precision of Measurement

This is a Draft Document of the SEMI International Standards program. No material on this page is to be construed as an official or adopted Standard or Safety Guideline. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited.

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Date: 5/20/23

10.1 The precision of measurement is influenced mainly by two factors: by the reliability of the etch pit detection and by statistical effects resulting from the sampling procedure.

10.2 For measurement location plan A the evaluated fraction Fe of the test specimen surface is decisive for the precision of the measurement. Depending on the degree of inhomogeneity of the etch pit density distribution the uncertainty of EPDav increases with decreasing Fe.

10.3 To illustrate this relation Fig. 8 shows upper bounds of error for EPDav as a function of Fe for test specimens of three different ranges of average etch pit density. These curves have been determined empirically from the analysis of measurements at 120 GaAs wafers with EPDav ranging from 30 cm-2 to 10,000 cm-2. Measurements have been carried out using a measuring field width aF of 0.5 mm and a grid spacing aG of 0.5 mm resulting in Fe = 1. Measurements with lower Fe have been simulated by omitting measuring fields in the calculation of EPD av. By this means the grid spacing was enlarged incrementally to 20 × aF. Additionally, the measurement field width was increased to 1.0 mm, 1.5 mm and 2.0 mm by combination of 4, 9 and 16 neighboring primary measuring fields. Based on the variation of both parameters the curves in Fig. 8 have been calculated so that 95% of the simulated measurements showed a deviation of EPDav from the original value below the bound.

10.4 In the case of use of measurement location plan B the relative uncertainty of EPDav is about 20%.

Figure 8 Upper Error Bounds for Measurement on GaAs wafers. The curves give 95% limits for the relative uncertainty of measurement in dependence of the evaluated fraction Fe of the test specimen surface.

This is a Draft Document of the SEMI International Standards program. No material on this page is to be construed as an official or adopted Standard or Safety Guideline. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited.

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Page 13: downloads.semi.orgdownloads.semi.org/.../$FILE/4810.docx · Web viewAfter etching test specimens are rinsed with deionized water and dry-blown with filtered air or nitrogen. For polish-etching

DRAFTDocument Number:

Date: 5/20/23

11 Report11.1 The test report must include the following.

11.1.1 Reference to this standard

11.1.2 Type of test specimen

11.1.3 Dimensions and shape of test specimen

11.1.4 Applied structure etching solution

11.1.5 Applied measurement location plan

11.1.5.1 In case of measurement plan A

11.1.5.1.1 Grid spacing aG

11.1.5.1.2 Width aF of measurement fields

11.1.5.2 In case of measurement plan B

11.1.5.2.1 Number N of measurement locations

11.1.5.2.2 Width aF of measurement fields

11.1.6 Average value of dislocation density EPDav

11.1.7 Optionally:

11.1.7.1 Dislocation density maps with the applied color or grey scale (measurement location plan A)

11.1.7.2 Frequency distribution of dislocation density (measurement location plan A)

11.1.7.3 Local etch pit density values EPDL (measurement location plan B)

11.1.8 Test date, test location, operator

12 Related documents12.1 SEMI standards

SEMI C28 — Specifications for Hydrofluoric Acid

SEMI C30 — Specifications for Hydrogen Peroxide

SEMI C39 — Specifications for Potassium Hydroxide Pellets

SEMI C44 — Specifications and Guidelines for Sulfuric Acid

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This is a Draft Document of the SEMI International Standards program. No material on this page is to be construed as an official or adopted Standard or Safety Guideline. Permission is granted to reproduce and/or distribute this document, in whole or in part, only within the scope of SEMI International Standards committee (document development) activity. All other reproduction and/or distribution without the prior written consent of SEMI is prohibited.

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