final lic manual studentcopy 1455085288190

EC1015 LABORATORY POLICIES AND REPORT FORMAT

Reports are due at the beginning of the lab period. The reports are intended to be a complete documentation of the work done in preparation for and during the lab. The report should be complete so that someone else familiar with digital design could use it to verify your work. The prelab and post lab report format is as follows:

1. A neat thorough prelab must be presented to your Staff In charge at the beginning of your scheduled lab period. Lab reports should be submitted on A4 paper. Your report is a professional presentation of your work in the lab. Neatness, organization, and completeness will be rewarded. Points will be deducted for any part that is not clear.

2. In this laboratory students will work in teams of three. However, the lab reports will be written individually. Please use the following format for your lab reports.

a. Cover Page: Include your name, Subject Code, Section No., Experiment No. and Date.

b. Objectives: Enumerate 3 or 4 of the topics that you think the lab will teach you. DO NOT REPEAT the wording in the lab manual procedures. There should be one or two sentences per objective. Remember, you should write about what you will learn, not what you will do.

c.Design: This part contains all the steps required to arrive at your final circuit. This should include diagrams, tables, equations, K-maps, explanations, etc. Be sure to reproduce any tables you completed for the lab. This section should also include a clear written description of your design process. Simply including a circuit schematic is not sufficient.

e. Questions: Specific questions (Prelab and Postlab) asked in the lab should be answered here. Retype the questions presented in the lab and then formally answer them.

3. Your work must be original and prepared independently. However, if you need any guidance or have any questions or problems, please do not hesitate to approach your staff in charge during office hours. Copying any prelab/ postlab will result in a grade of 0. The incident will be formally reported to the University and the students should follow the dress code in the Lab session.

4. Each laboratory exercise (circuit) must be completed and demonstrated to your Staff In charge in order to receive working circuit credit. This is the procedure to follow:

a. Circuit works: If the circuit works during the lab period (3 hours), call your staff in charge, and he/she will sign and date it.. This is the end of this lab, and you will get a complete grade for this portion of the lab.

b. Circuit does not work: If the circuit does not work, you must make use of the

open times for the lab room to complete your circuit. When your circuit is ready, contact your staff in charge to set up a time when the two of you can meet to check your circuit.

5. Attendance at your regularly scheduled lab period is required. An unexpected absence will result in loss of credit for your lab. If for valid reason a student misses a lab, or makes a reasonable request in advance of the class meeting, it is permissible for the student to do the lab in a different section later in the week if approved by the staff incharge of both the sections. Habitually late students (i.e., students late more than 15 minutes more than once) will receive 10 point reductions in their grades for each occurrence following the first.

6. Final grade in this course will be based on laboratory assignments. All labs have an equal weight in the final grade. Grading will be based on pre-lab work, laboratory reports, post-lab and in-lab performance (i.e., completing lab, answering laboratory related questions, etc.,).The Staff In charge will ask pertinent questions to individual members of a team at random. Labs will be graded as per the following grading policy:

Internal Assessment Marks: 60 End Semester Examination Marks: 40Carrying out lab work & Report

: 25

Mini Project : 10Attendance : 05Model Exam : 20

Circuit diagram & Waveforms

: 10

Design / Calculation : 05Procedure : 05Tabulation / Graph : 10Result : 05Viva-Voce : 05

7. Reports Due Dates: Reports are due one week after completion of the corresponding lab.

8. Systems of Tests: Regular laboratory class work over the full semester will carry a weight age of 60%. The remaining 40% weightage will be given by conducting an end semester practical examination for every individual student if possible or by conducting a 1 to 1 ½ hours duration common written test for all students, based on all the experiment carried out in the semester.

9. General Procedure

a. Properly place the components in the general purpose breadboard and identify the positive and negative terminals of the power supply, before making connection.

b. Keep the required supply voltage in Power supply and connect power supply voltage and ground terminals to the respective node points in the breadboard.

c. Connect the components as per the circuit diagram, after verifying connection switch on the supply and note down the required parameter values

d. After completion of the experiments, switch off the power supply and return the components.

EQUIPMENT AND LABORATORY MAINTENANCE

Be responsible for equipment and laboratory maintenance. For example:

1. Keep the lab and benches neat and organized.

2. Use the equipment properly. For example, use only the probes that have been

compensated for your oscilloscope with your oscilloscope. An oscilloscope and its

matched probes are labeled by the same number to help you keep using them together.

Do not take the sleeve off the sensitive probe tip and use the probe tip directly (e.g.,

by inserting the probe tip directly into a hole on a breadboard). Many probes have

been permanently damaged when used this way because a) the fragile tip is broken by

the severe probing strain, b) the probe accidentally falls to the ground, breaking the

fragile tip, or c) the probe sleeve is lost after it is removed from the probe tip. A short

hook-up wire hooked to the probe will allow fine probing without using the probe tip

directly.

3. Return instruments, manuals, tools, components, cables, etc., to the proper storage

location.

4. Bring defective equipment to the lab staff or laboratory maintenance staff for repair.

5. Notify the lab staff when the stock is about to run out of a certain component.

USEFUL LABORATORY PRACTICES

In general, keep the following points in mind:

1. Identify lab objectives. An experiment should not be treated as a cookbook

procedure. Find a rationale behind each step.

2. Come to the lab prepared. Preview the experiment as homework.

3. Keep a lab notebook to record all activities during all lab sessions.

4. Finish as much as possible before leaving. This includes acquiring data, interpreting

data, answering questions, and revolving uncertainties.

5. All data are real. If data look unbelievable, check all the steps carefully. Consult the lab staff.

6. Safety is first. Change instrument settings slowly. Observe the effect of the most recent

change before proceeding with more change. Set voltage/current/power limit. It is important

that right from the beginning of your lab work you consider the possible interactions between

measuring instruments and the device under test. For example:

7. The input impedance of meters can cause measurement error in high impedance circuits.

8. The input capacitance of scopes, scope probes, or connecting cables may have important high

frequency loading effects.

9. When using an oscilloscope to make accurate waveform or frequency response measurements

with a x10 probe, make sure the probe is properly compensated.

10. Learn to use the current limiting features of the laboratory power supplies to protest the

device under test from possible damage under short circuit conditions.

11. Make sure to have low impedance ground connections between the test instruments and your

“breadboard”. Avoid groundloops!

The list could go on much longer. It represents the pitfalls of doing electronics in the real world.

IX. SAFETY PRECAUTIONS AND LABORATORY RULES

To be responsible for your own safety and keep the laboratory in a good order, you must comply with

the rules below.

Solid footwear must be worn by all students inside the laboratory. Staffs are required by the

university to ensure that everyone in the laboratory is wearing solid footwear. Students with

bare feet, thongs, sandals, or other forms of open footwear will not be allowed into the

laboratory.

No smoking, drinking, or eating is permitted in the laboratory (this includes chewing gum and

confectionaries).

Always have your circuits checked by a demonstrator before switching on, and always switch

the power off immediately after taking measurements.

Act sensibly and tidy up after yourself.

/There is a safety switch on each bench which switches power to (and protects) the GPO's

(general purpose outlets/power points).

Under no circumstances should you attempt to remove any of the panels on the bench. There

is a 220 volt supply behind them which could be lethal.

You should not take equipment from another bench. If something is faulty (or missing) ask

the lab staff for assistance.

SAFETY

Safety in the electrical laboratory, as everywhere else, is a matter of the knowledge of potential

hazards, following safety precautions, and common sense. Observing safety precautions is important

due to pronounced hazards in any electrical/computer engineering laboratory. Death is usually certain

when 0.1 ampere or more flows through the head or upper thorax and have been fatal to persons with

coronary conditions. The current depends on body resistance, the resistance between body and

ground, and the voltage source. If the skin is wet, the heart is weak, the body contact with ground is

large and direct, then 40 volts could be fatal. Therefore, never take a chance on "low" voltage. When

working in a laboratory, injuries such as burns, broken bones, sprains, or damage to eyes are possible

and precautions must be taken to avoid these as well as the much less common fatal electrical shock.

Make sure that you have handy emergency phone numbers to call for assistance if necessary. If any

safety questions arise, consult the lab demonstrator or technical assistant/technician for guidance and

instructions. Observing proper safety precautions is important when working in the laboratory to

prevent harm to yourself or others. The most common hazard is the electric shock which can be fatal

if one is not careful.

ELECTRIC SHOCK

Shock is caused by passing an electric current through the human body. The severity depends mainly

on the amount of current and is less function of the applied voltage. The threshold of electric shock is

about 1 mA which usually gives an unpleasant tingling. For currents above 10 mA, severe muscle

pain occurs and the victim can't let go of the conductor due to muscle spasm. Current between 100

mA and 200 mA (50 Hz AC) causes ventricular fibrillation of the heart and is most likely to be lethal.

What is the voltage required for a fatal current to flow? This depends on the skin resistance. Wet skin

can have a resistance as low as 150 Ohm and dry skin may have a resistance of 15 kOhm. Arms and

legs have a resistance of about 100 Ohm and the trunk 200 Ohm. This implies that 240 V can cause

about 500 mA to flow in the body if the skin is wet and thus be fatal. In addition skin resistance falls

quickly at the point of contact, so it is important to break the contact as quickly as possible to prevent

the current from rising to lethal levels.

EQUIPMENT GROUNDING

Grounding is very important. Improper grounding can be the source of errors, noise and a lot of

trouble. Here we will focus on equipment grounding as a protection against electrical shocks. Electric

instruments and appliances have equipments casings that are electrically insulated from the wires that

carry the power. The isolation is provided by the insulation of the wires. However, if the wire

insulation gets damaged and makes contact to the casing, the casing will be at the high voltage

supplied by the wires. If the user touches the instrument he or she will feel the high voltage. If, while

standing on a wet floor, a user simultaneously comes in contact with the instrument case and a pipe or

faucet connected to ground, a sizable current can flow through him or he. However, if the case is

connected to the ground by use of a third (ground) wire, the current will flow from the hot wire

directly to the ground and bypass the user.

Equipments with a three wire cord is thus much safer to use. The ground wire (3rd wire) which is

connected to metal case, is also connected to the earth ground (usually a pipe or bar in the ground)

through the wall plug outlet.

Always observe the following safety precautions when working in the laboratory:

1. Do not work alone while working with high voltages or on energized electrical equipment or

electrically operated machinery like a drill.

2. Power must be switched off whenever an experiment or project is being assembled, disassembled,

or modified. Discharge any high voltage points to grounds with a well insulated jumper.

3. Remember that capacitors can store dangerous quantities of energy.

4. Make measurements on live circuits or discharge capacitors with well insulated probes keeping

one hand behind your back or in your pocket. Do not allow any part of your body to contact any

part of the circuit or equipment connected to the circuit.

5. After switching power off, discharge any capacitors that were in the circuit. Do not trust

supposedly discharged capacitors. Certain types of capacitors can build up a residual charge after

being discharged. Use a shorting bar across the capacitor, and keep it connected until ready for

use. If you use electrolytic capacitors, do not:

put excessive voltage across them

put ac across them

connect them in reverse polarity

6. Take extreme care when using tools that can cause short circuits if accidental contact is made to

other circuit elements. Only tools with insulated handles should be used.

7. If a person comes in contact with a high voltage, immediately shut off power. Do not attempt to

remove a person in contact with a high voltage unless you are insulated from them. If the victim is

not breathing, apply CPR immediately continuing until he/she is revived, and have someone dial

emergency numbers for assistance.

8. Check wire current carrying capacity if you will be using high currents. Also make sure your

leads are rated to withstand the voltages you are using. This includes instrument leads.

9. Avoid simultaneous touching of any metal chassis used as an enclosure for your circuits and any

pipes in the laboratory that may make contact with the earth, such as a water pipe. Use a floating

voltmeter to measure the voltage from ground to the chassis to see if a hazardous potential

difference exists.

10. Make sure that the lab instruments are at ground potential by using the ground terminal supplied

on the instrument. Never handle wet, damp, or ungrounded electrical equipment.

11. Never touch electrical equipment while standing on a damp or metal floor.

12. Wearing a ring or watch can be hazardous in an electrical lab since such items make good

electrodes for the human body.

13. When using rotating machinery, place neckties or necklaces inside your shirt or, better yet,

remove them.

14. Never open field circuits of D-C motors because the resulting dangerously high speeds may cause

a "mechanical explosion".

15. Keep your eyes away from arcing points. High intensity arcs may seriously impair your vision or

a shower of molten copper may cause permanent eye injury.

16. Never operate the black circuit breakers on the main and branch circuit panels.

17. In an emergency all power in the laboratory can be switched off by depressing the large red

button on the main breaker panel. Locate it. It is to be used for emergencies only.

18. Chairs and stools should be kept under benches when not in use. Sit upright on chairs or stools

keeping the feet on the floor. Be alert for wet floors near the stools.

19. Horseplay, running, or practical jokes must not occur in the laboratory.

20. Never use water on an electrical fire. If possible switch power off, then use CO2 or a dry type fire

extinguisher. Locate extinguishers and read operating instructions before an emergency occurs.

21. Never plunge for a falling part of a live circuit such as leads or measuring equipment.

22. Never touch even one wire of a circuit; it may be hot.

23. Avoid heat dissipating surfaces of high wattage resistors and loads because they can cause severe

burns.

24. Keep clear of rotating machinery.

Precautionary steps before starting an experiment so as not to waste time allocated

a) Read materials related to experiment before hand as preparation for pre-lab quiz and experimental

calculation.

b) Make sure that apparatus to be used are in good condition. Seek help from technicians or the lab

demonstrator in charge should any problem arises.

Power supply is working properly ie Imax (maximum current) LED indicator is disable.

Maximum current will retard the dial movement and eventually damage the equipment.

Two factors that will light up the LED indicator are short circuit and insufficient supply

of current by the equipment itself. To monitor and maintain a constant power supply, the

equipment must be connected to circuit during voltage measurement. DMM are not to be

used simultaneously with oscilloscope to avert wrong results.

Digital multimeter (DMM) with low battery indicated is not to be used. By proper

connection, check fuses functionality (especially important for current measurement).

Comprehend the use of DMM for various functions. Verify measurements obtained with

theoretical values calculated as it is quite often where 2 decimal point reading and 3

decimal point reading are very much deviated.

The functionality of voltage waveform generators are to be understood. Make sure that

frequency desired is displayed by selecting appropriate multiplier knob. Improper settings

(ie selected knob is not set at minimum (in direction of CAL – calibrate) at the bottom of

knob) might result in misleading values and hence incorrect results. Avoid connecting

oscilloscope together with DMM as this will lead to erroneous result.

Make sure both analog and digital oscilloscopes are properly calibrated by positioning

sweep variables for VOLT / DIV in direction of CAL. Calibration can also be achieved

by stand alone operation where coaxial cable connects CH1 to bottom left hand terminal

of oscilloscope. This procedure also verifies coaxial cable continuity.

c) Internal circuitry configuration of breadboard or Vero board should be at students’ fingertips (ie

holes are connected horizontally not vertically for the main part with engravings disconnecting in-

line holes).

d) Students should be rest assured that measured values (theoretical values) of discrete components

retrieved ie resistor, capacitor and inductor are in accordance the required ones.

e) Continuity check of connecter or wire using DMM should be performed prior to proceeding an

experiment. Minimize wires usage to avert mistakes.

PREFACE

The EC1015 Linear Integrated Circuits Lab is designed to help students understand the

basic principles of Operational amplifier circuits as well as giving them the insight on design,

simulation and hardware implementation of circuits. The main aim is to provide hands-on

experience to the students so that they are able to put theoretical concepts to practice.

The content of this course consists of two parts, ‘simulation’ and ‘hardwired’.

Computer simulation is stressed upon as it is a key analysis tool of engineering design.

“OrCAD Pspice and OrCAD Capture” software is used for simulation of Operational

amplifier circuits.

Students will carry out design experiments as a part of the experiments list provided

in this lab manual. Students will be given a specific design problem, which after completion

they will verify using the simulation software or hardwired implementation.

LIST OF EXPERIMENTS

Exp. No Title

1

Basic op-amp circuits

Inverting , Non-inverting voltage amplifiers & voltage

follower

2Linear op-amp circuits

Differentiator & Integrator

3Non-linear op-amp circuits

Precision Rectifiers(Half wave rectifier & full wave rectifier)

4 Comparator(Basic comparator & Schmitt trigger)

5Oscillators

RC Phase shift Oscillator and Wein bridge Oscillator

6IC555 Timer

Astable and Monostable operation

7DAC

Weighted Resistor & R-2R ladder types

8 AC Amplifiers(Inverting & Non-Inverting amplifiers)

9Op-amp applications- Adder, Clipper, Clamper, Square wave

generator

10Active Filters

LPF, HPF, BPF & BSF

INTRODUCTION TO ANALOG SYSTEM LAB KIT (ALSK) PRO

Part I – Learning the basics

In the first part, the students will be exposed to the operation of the basic building blocks of

analog systems. Using the general purpose operational amplifiers and the precision analog

multiplier, the student will build gain stages, buffers, instrumentation amplifiers and voltage

regulators. These experiments bring out several important issues, such as measurement of

gain-bandwidth product, slew-rate, as well as saturation limits of the operational amplifiers.

Part II – Building analog systems

In the second part, the students will be focused on learning about analog systems. Integrators

and differentiators will be introduced, which are essential for implementing filters that can

band-limit a signal prior to the sampling process to avoid aliasing errors.

System Lab Kit overview

ASLK PRO has been developed at Texas Instruments India. This kit is designed for

undergraduate engineering students to perform analog lab experiments. The main idea behind

ASLK PRO is to provide a cost efficient platform or test bed for students to realize almost

any analog system using general purpose ICs such as OP-Amps and analog multipliers.

ASLK PRO comes with three general-purpose operational amplifiers (TL082) and three

wide-bandwidth precision analog multipliers (MPY634) from Texas Instruments. We have

also included two 12-bit parallel-input multiplying digital-to-analog converters DAC7821, a

wide-input non-synchronous buck-type DC/DC controller TPS40200, and a low dropout

regulator TPS7250 from Texas Instruments. A portion of ASLK PRO is left for general-

purpose prototyping which can be used for carrying out mini-projects.

The kit has a provision to connect ±10V DC power supply. The kit comes with the necessary

short and long connectors. This comprehensive user manual included with the kit gives

complete insight of how to use ASLK PRO. The manual covers exercises of analog system

design along with brief theory and simulation results.

The following software is necessary to carry out the experiments suggested in this manual.

1. TINA or PSpice or any powerful simulator based on the SPICE Simulation Engine

2. FilterPro - A software program for designing analog filters

3. SwitcherPro - A software program for designing power supplies

The Analog System Lab kit ASLK PRO is divided into many sections. Refer to the photo of

ASLK PRO when you read the following description.

There are three TL082 OP-Amp ICs labelled 1, 2, 3 on ASLK PRO. Each of these ICs has

two amplifiers, which are labelled A and B. Thus 1A and 1B are the two OP-AMps on OP-

AMP IC 1, etc. The six OP-amps are categorized as below.

OP-Amp Type Purpose

1A TYPE I Inverting Configuration only

1B TYPE I Inverting Configuration only

2A TYPE II Full Configuration

2B TYPE II Full Configuration

3A TYPE III Basic Configuration

3B TYPE III Basic Configuration

Thus, the OP-amps are marked TYPE I, TYPE II and TYPE III on the board. The OP-Amps

marked TYPE I can be connected in the inverting configuration only. With the help of

connectors, either resistors or capacitors can be used in the feedback loop of the amplifier.

There are two such TYPE I amplifiers. There are two TYPE II amplifiers which can be

configured to act as inverting or non-inverting. Finally, we have two TYPE III amplifiers

which can be used as voltage buffers. Three analog multipliers are included in the kit. These

are wide-bandwidth precision analog multipliers from Texas Instruments (MPY634). Each

multiplier is a 14-pin IC and operates on internally provided ±10V supply.

There are two digital-to-analog converters (DAC) provided in the kit, labeled DAC I and

DAC II. Both the DACs are DAC7821 from Texas Instruments. They are 12-bit, parallel-

input multiplying DACs which can be used in place of analog multipliers in circuits like

AGC/AVC. Ground and power supplies are provided internally to the DAC. DAC Logic

Supply Jumper can be used to connect logic power supplies of both DAC I and DAC II to

either LDO or DC/DC converter located on the board. Using Tri-state switches you can set

12-bits of input data for each DAC to desired value. Click the Latch Data button to trigger

Digital-to-analog conversion.

We have included a wide-input non-synchronous DC/DC buck converter TPS40200 from

Texas Instruments on ASLK PRO. The converter provides an output of 3.3V over a wide

input range of 5.5-15V at output currents ranging from 0.125A to 2.5A. Using Vout SEL

jumper you can select output voltage to be either 5V or 3.3V. Another jumper allows you to

select whether input voltage is provided from the board (+10V), or externally using screw

terminals. We have included two transistor sockets on the board, which are needed in

designing an LDO regulator, or custom experiments.

A specialized LDO regulator IC (TPS7250) has been included on the board, which can

provide a constant output voltage for input voltage ranging from 5.5V to 11V. Ground

connection is internally provided to the IC. Using ON/OFF jumper you can enable or disable

LDO IC. Another jumper allows you to select whether input voltage is provided from the

board (+10V), or externally using screw terminals.

There are two 1kX trimmers (potentiometer) in the kit to enable the designer to obtain a

variable voltage if needed for a circuit. The potentiometers are labeled P1 and P2. These

operate respectively in the range 0V to +10V, and -10V to 0V. The kit has screw terminals to

connect ±10V power supply. All the ICs on the board are internally connected to power

supply. e sockets on the board, which can be used as rectifiers in custom laboratory

experiments. The top right portion of the kit is a general-purpose area which can be used as a

proto-board. ± 10V points and GND are provided for this area.

Lab Setup

ASLK PRO and the associated Lab Manual from Texas Instruments India – the lab kit comes

with required connectors. We provide an experiment that helps you build a circuit to directly

interface analog outputs to an oscilloscope. Dual power supply with the operating voltages of

±10V. Function generators which can operate in the range on 1 to 10 MHz and capable of

generating sine, square and triangular waves. A computer with installed circuit simulation

software. When we do not explicitly mention the magnitude and frequency of the input

waveform, please use 0 to 1V as the amplitude of the input and 1 kHz as the frequency.

Always use sinusoidal input when you plot the frequency response and use square wave input

when you plot the transient response.

Precaution! Please note that TL082 is a dual OP-Amp. This means that the IC has two OP-

Amp circuits. If your experiment requires only one of the two ICs, do not leave the inputs and

output of the other OP- Amp open; instead, place the second OP-Amp in unity-gain mode and

ground the inputs.

1. BASIC OP-AMP CIRCUITS

1.1 OBJECTIVE

1. To design the following basic op-amp circuits and explain the operation of each:

a. Inverting amplifier

b. Non-inverting amplifier

c. Voltage follower

1.2 HARDWARE REQUIRED

S.No Equipment/Component name Specifications/Value Quantity

1 IC 741 Refer data sheet in

appendix

1

2 Cathode Ray Oscilloscope (0 – 20MHz) 1 1

3 Resistors 1.5K Ω 2

4 Dual Regulated power supply (0 -30V), 1A 1

5 Function Generator (0-2) MHz 1

6 ASLK PRO Kit Refer data sheet in

appendix

1

1.3THEORY

An op-amp is a high gain, direct coupled differential linear amplifier choose response

characteristics are externally controlled by negative feedback from the output to input, op-

amp has very high input impedance, typically a few mega ohms and low output impedance,

less than 100.

Op-amps can perform mathematical operations like summation integration,

differentiation, logarithm, anti-logarithm, etc., and hence the name operational amplifier op-

amps are also used as video and audio amplifiers, oscillators and so on, in communication

electronics, in instrumentation and control, in medical electronics, etc.

1.3.1 Circuit symbol and op-amp terminals

The circuit schematic of an op-amp is a triangle as shown below in Fig. 1-1 op-amp

has two input terminal. The minus input, marked (-) is the inverting input. A signal applied to

the minus terminal will be shifted in phase 180o at the output. The plus input, marked (+) is

the non-inverting input. A signal applied to the plus terminal will appear in the same phase at

the output as at the input. +VCC denotes the positive and negative power supplies. Most op-

amps operate with a wide range of supply voltages. A dual power supply of +15V is quite

common in practical op-amp circuits. The use of the positive and negative supply voltages

allows the output of the op-amp to swing in both positive and negative directions.

Fig-1-1 op-amp circuit symbol

1.3.2 Op amp internal circuit

Commercial integrated circuit OP-amps usually consists of your cascaded blocks as shown in

figure 1-2shown below.

V2

non-invertinginput

output-

-Vcc

inverting input

+offset null

+Vcc

offset null

u A 7 4 1

Differential Amplifier

Differential Amplifier

Buffer and Level

Translator Output driver

V1

Fig 1-2Internal block schematic op-amp

The first two stages are cascaded difference amplifier used to provide high gain. The third

stage is a buffer and the last stage is the output driver. The buffer is usually an emitter

fallowing whose input impedance is very high so that it prevents loading of the high gain

stage. The output stage is designed to provide low output impedance. The buffer stage along

with the output stage also acts as a level shifter so that output voltage is zero for zero inputs.

In this laboratory experiment, you will learn several basic ways in which an op-amp

can be connected using negative feedback to stabilize the gain and increase the frequency

response. The extremely high open-loop gain of an op-amp creates an unstable situation

because a small noise voltage on the input can be amplified to a point where the amplifier in

driven out of its linear region. Also unwanted oscillations can occur. In addition, the open-

loop gain parameter of an op-amp can vary greatly from one device to the next. Negative

feedback takes a portion of output and applies it back out of phase with the input, creating an

effective reduction in gain. This closed-loop gain is usually much less than the open-loop

gain and independent of it.

1.3.3 Closed – loop voltage gain, ACL

The closed-loop voltage gain is the voltage gain of an op-amp with external feedback.

The amplifier configuration consists of the op-amp and an external negative feedback circuit

that connects the output to the inverting input. The closed loop voltage gain is determined by

the external component values and can be precisely controlled by them.

1.3.4 Non-inverting amplifier

An op-amp connected in a closed-loop configuration as a non-inverting amplifier with

a controlled amount of voltage gain is shown in Fig 1-3.

-V c c

R f

R 1

V o

V in

u A 7 4 1

+V c c

-

+

Fig. 1-3 Non-inverting amplifier configuration of op-amp

The input signal is applied to the non-inverting (+) input. The output is applied back to the

inverting(-) input through the feedback circuit (closed loop) formed by the input resistor R1

and the feedback resistor Rf. This creates negative feedback as follows. Resistors R1 and Rf

form a voltage-divider circuit, which reduces VO and connects the reduced voltage Vf to the

inverting input. The feedback is expressed as

V f=(R1

R1+R f)Vo

The difference of the input voltage, Vin and the feedback voltage, Vfis the differential input of

the op-amp. This differential voltage is amplified by the gain of the op-amp and produces an

output voltage expressed as

Vo=(1+ R f

R1)V in

The closed-loop gain of the non-inverting amplifier is, thus

ACL(NI )=1+R f

R1

Notice that the closed loop gain is

independent of open-loop gain of op-amp

set by selecting values of R1 and Rf

An expression for the input impedance of a non-inverting amplifier can be written as

Zin (NI )=(1+AOL β )Z in

Where AOL = open-loop voltage gain of op-amp

Zin = internal input impedance of op-amp (without feedback)

= attenuation of the feedback circuit

=V f

Vo=

R1

R1+R f

Above equation shows that the input impedance of the non-inverting amplifier configuration

with negative feedback is much greater than the internal output impedance of the op-amp

itself.

The output impedance of a Non-Inverting amplifier can be written as

Zo(NI )

= Zo1+AOL β

This equation shows that the output impedance of non-inverting amplifier is much less than

the internal output impedance, Zo of the op-amp.

1.3.5 Voltage follower

The voltage follower configuration is a special case of the non-inverting amplifier

where all the output voltage is feedback to the inverting input by straight connection, as

shown in fig. 1.4

Fig. 1.4 Voltage follower configuration of op-amp

As you can see, the straight feedback connection has a voltage gain of (which means there is

no gain).

ACL (VF) = 1

The most important features of the voltage follower configuration are its very high input

impedance and its very low output impedance. These features make it a nearly ideal buffer

amplifier for interfacing high-impedance sources and low-impedance loads.

Z IN (VF )=(1+AOL)Z in

ZO (VF )=ZO

1+AOL

As you can see, the voltage follower input impedance is greater for a given AOL and Zin than

for the non-inverting amplifier. Also, its output impedance is much smaller.

+V c c

+

-V c c

u A 74 1-

V o

V in

1.3.6. Inverting amplifier

An op-amp connected as an inverting amplifier with a controlled amount of voltage

gain is shown in fig. 1.5

Fig.1.5 inverting amplifier

The input signal is applied through a series input resistor R1 to the inverting input. Also, the

output is fed back through Rf to the same input. The non-inverting input is grounded. An

expression for the output voltage of the inverting amplifier is written as

V O=−R f

R1V in

The –ve sign indicates inversion. The closed-loop gain of the inverting amplifier is, thus

ACL ( I )=−R f

R1

The input & output impedances of an inverting amplifier are

Zin(I) = R1

ZO ( I )=Zo

1+AOL β

The output impedance of both the non-inverting and inverting amplifier configurations is

very low; in fact, it is almost zero in practical cases. Because of this near zero output

impedance, any load impedance connected to the op-amp output can vary greatly and not

change the output voltage at all.

1.3.7. Design Constraints

The output signal is limited by the IC's power sources: the output signal cannot be greater

than +15V.

R 1

R f

V in

+V c c

u A 7 4 1-

+

-V c c

V o

1.4 PRE LAB QUESTIONS

2. Identify each of the op-amp configurations

Fig.(a)

3. A non-inverting amplifier has R1 of 1K&Rfof 100K. Determine Vf and

(Feedback voltage and feedback fraction), if VO = 5V

4. For the amplifier in Fig.(b) determine the following: (a) ACL(NI) (b) VO (c) Vf

Vin

+Vcc

+

-Vcc

u A 7 4 1-

Vo

-Vcc

R f

R 1

Vo

Vin

u A 74 1

+Vcc

-

+

R 1

R f

Vin+Vcc

u A 7 4 1-

+

-Vcc

Vo

+Vcc

u A 7 4 1 Vo

+

-Vcc

R f = 5 6 0 k

R 1 = 1 . 5 k

-

Vin10 mVrms

Fig.(b)

1.5 EXPERIMENT

(1) Non-Inverting amplifier

1.1 Design a non-inverting amplifier for the gain of 15. Let R1=1.5k Assemble the circuit.

1.2 Feed sinusoidal input of amplitude 10V and frequency 1KHz

1.3 Observe the input voltage and output voltage on a CRO. Tabulate the reading in Table

(2) Voltage follower

2.1 Assemble a voltage follower circuit.

2.2 Feed sinusoidal input of amplitude 100V and frequency 1KHz.

2.3 Observe the input and output voltages on a CRO. Tabulate the readings in Table.

(3) Inverting amplifier

3.1 Design an inverting amplifier for the gain of 15. Let R1=1.5k. Assemble the circuit.

3.2 Feed sinusoidal input of amplitude 1V and frequency 1KHz.

3.3 Observe the input and output voltages on a CRO. Tabulate the readings in Table

op-amp

configuration

/ circuit

Input signal Output signal Voltage gain

Amplitude Frequency Amplitude FrequencyDesigned

value

Observed

value

Non-inverting

amplifier

Voltage

follower

Inverting

amplifier

1.6. POST LAB QUESTIONS

1. What is the relationship, if any, between the polarity of the output and input voltages in

your experimental op-amp? Refer to your data.

2. Comment on the statement: “The closed-loop gain-bandwidth product is a constant for a

given op-amp”.

3. Find the value of Rf that will produce closed-loop gain of 300 in each amplifier in

fig.(c)

Fig.(c)

4. Determine the approximate values for each of the following quantities in Fig.(d).

Fig.(d)

5. If a signal voltage of 10mV is applied to each amplifier in Fig.(e),

what are the output voltages?

R f

u A 74 1

-Vcc

+

-

+Vcc

Vin

R 1 = 2 . 2k

Vo

R f

+Vcc

-Vcc

-Vou A 7 4 1

+

R 1 = 1 2 k

Vin

Ii n-- ---

+

R f = 2 2 k

V o

V in1 V

R 1 = 2 . 2 k

-

If

u A 7 4 1

+Vcc

-Vcc

-----

R f =1 0 0 k

uA 7 4 1

-Vcc

+

-

+Vcc

Vin

R 1 = 1 0 0 k

Vo

Fig. (e)

Vin

+Vcc

+

-Vcc

u A 7 4 1-

Vo

-V c c

R f =1 M

R 1 =4 7 k

V o

V in

u A 7 4 1

+V c c

-

+

+

-V c cR 1 =1 0 k

R f = 1 0 k

R 1 =1 0 k

-V in

+V c c

u A 7 4 1R 2 =1 0 k

V o

R 2 =1 k

V in-

R f =1 0 0 k

+

+V c cR 1 =1 k

V ou A 7 4 1

-V c c

2. LINEAR OP-AMP CIRCUITS

2.1 OBJECTIVE

1. Design an integrator for a frequency of 1KHz, given R=1KΩ , C=0.1 µF and Rf

= 1MΩ. Conduct the experiment and plot integrated output waveforms for various

input waveforms and analyze

2. Design an differentiator for a frequency of 1KHz, given R=10KΩ , and C=0.1µf

and Rf = 470Ω. Conduct the experiment and plot integrated output waveforms for

various input waveforms and analyze


S.No Equipment/Component name Specifications/Value Quantity1 IC 741 Refer data sheet in

appendix1

2 Cathode Ray Oscilloscope (0 – 20MHz) 1 13 Resistors 1K Ω

1M Ω10 K Ω470 Ω

1111

4 Capacitors 0.1µf 2

5 Dual Regulated power supply (0 -30V), 1A 16 Function Generator (0-2) MHz 17 ASLK PRO Kit 1

2.3 THEORY

In this laboratory experiment, you will learn several basic ways in which an op-amp

can be connected using negative feedback to stabilize the gain and increase the frequency

response. The extremely high open-loop gain of an op-amp creates an unstable situation

because a small noise voltage on the input can be amplified to a point where the amplifier in

driven out of its linear region. Also unwanted oscillations can occur. In addition, the open-

loop gain parameter of an op-amp can vary greatly from one device to the next. Negative

feedback takes a portion of output and applies it back out of phase with the input, creating an

effective reduction in gain. This closed-loop gain is usually much less than the open-loop

gain and independent of it.

2.3.1 Integrator

An op-amp integrator simulates mathematical integration which is basically a

summing process that determines the total area under the curve of a function ie., the

integrator does integration of the input voltage waveform. Here the input element is resistor

and the feedback element is capacitor as shown in fig.2-1.

Fig.2-1 Basic op-amp integrator

The output voltage is given by

V O=− 1RC∫o

t

V S dt+V C ( t=0 )

Where VC (t=0) is the initial voltage on the capacitor. For proper integration, RC has to be

much greater than the time period of the input signal.

It can be seen that the gain of the integrator decreases with the increasing frequency

so, the integrator circuit does not have any high frequency problem unlike a differentiator

circuit. However, at low frequencies such as at dc, the gain becomes infinite. Hence the op-

amp saturates (ie., the capacitor is fully charged and it behaves like an open circuit). A

practical integrator circuit is shown in Fig. 2-2.

Fig. 2-2 Practical op-amp integrator

2.3.2 Differentiator

An op-amp differentiator simulates mathematical differentiation, which is a process of

determining the instantaneous rate of change of a function. Differentiator performs the

reverse of integration function. The output waveform is derivative of the input waveform.

C

V ou A 7 4 1

R

-V in

+V c c

+

-V c c

C

R f

V ou A 7 41

R

-V in

+V c c

+

-V c c

Here, the input element is a capacitor and the feedback element is a resistor. An ideal

differentiation is shown in fig. 2-3.

Fig.2-3 Basic op-amp differentiator

The output voltage is given by

V O=−RC (dV S

dt)

For proper differentiation, RC has to be much smaller than the time period of the input signal.

It can be seen that at high frequencies a differentiator may become unstable and break into

oscillation. Also, the input impedance of the differentiator decreases with increase in

frequency, thereby making the circuit sensitive to high frequency noise. So, in order to limit

the gain of the differentiator at high frequencies, the input capacitor is connected in series

with a resistance R1 and hence avoiding high frequency noise and stability problems. A

practical differentiator circuit is shown in fig. 2-4.

Fig. 2-4 Practical op-amp differentiator

u A 7 4 1

V in

-V c c

V o

+

-

C

R f

+V c c

2.3.3 Design Constraints

Integrator circuit

The output of the integrator cannot rise indefinitely as the output will be limited.

The output of the op amp integrator will be limited by supply voltage.

When designing one of these circuits, it may be necessary to limit the gain or increase

the supply voltage to accommodate the likely output voltage swings.

While small input voltages and for short times may be acceptable, care must be taken

when designing circuits where the input voltages are maintained over longer periods of

time.

Differentiator circuit

Output rises with frequency: One of the key facts of having a series capacitor is that

it has an increased frequency response at higher frequencies. The differentiator output

rises linearly with frequency, although at some stage the limitations of the op amp will

mean this does not hold good. Accordingly precautions may need to be made to account

for this. The circuit, for example will be very susceptible to high frequency noise, stray

pick-up, etc.

Component value limits: It is always best to keep the values of the capacitor and

particularly the resistor within sensible limits. Often values of less than 100kΩ for the

resistor are best. In this way the input impedance of the op amp should have no effect

on the operation of the circuit.\


1. Determine the input and output impedances for each amplifier configuration, (Z in=10M,

ZO=75, AOL = 175,000) in fig.(a)

Fig. (a)

2. Determine the BW of each of the amplifiers in fig(b). The op-amps have an open-loop

gain of 90dB and a unity gain bound width of 2MHz.

-V c c

R f =5 6 0 k

R 1 =2 . 7 k

V o

V in

u A 7 4 1

+V c c

-

+Vin

+Vcc

+

-Vcc

uA 7 41-

Vo

R f =1 5 0k

u A 7 4 1

-V c c

+

-

+V c c

V in

R 1 =1 0 k

V o

Fig.(b)

3. Determine the output voltage of each amplifier in Fig (c).

Fig.(c)

-V c c

R f =2 2 0 k

R 1 =3 .3 k

V o

V in

u A 7 4 1

+V c c

-

+

R f =4 7 k

u A 7 4 1

-V c c

+

-

+V c c

V in

R 1 =1 k

V o

1 k

8V-

R f =1 0 k

+

+V c c1V

1 k

V o

3V

u A 7 4 1

-V c c

1 k

0.2V

-

+V c c

+

1 k

0.5V

-V c c

1 kV ou A 7 4 1

R f =1 0 k

100 k

3V

4V

-

100 k

R f =2 5 k

+

+V c c2V

100 k

V o

1V

u A 7 4 1

-V c c

100 k100 k

8V-

R f =1 0 k

+

+V c c2V

47 k

V o

3V

u A 7 4 1

-V c c

10 k

V o-

R f =1 0 0 k

2V

R 1 =1 0 k

R f =1 0 0 k

-V c c

+

+V c cR 1 =1 0 k

3V

u A 7 4 1

V o-

R f = 10 k

2V

R 1 =1 0 k

R f = 10 k

-V c c

+

+V c cR 1 =1 0 k

3V

uA 7 4 1

2.5 EXPERIMENT

(1) Integrator

1.1 Assemble an integrator circuit with R=1K and C=0.1µf. Connect Rf of value 1M

across the capacitor.

1.2 Feed +1V, 500Hz square wave input.

1.3 Observe the input and output voltages on a CRO.

1.4 Determine the gain of the circuit and tabulate the readings in table. Model waveform is

shown.

1.5 Plot the input and output voltages on the same scale on a linear graph sheet.

(2) Differentiator

2.1 Assemble a differentiator circuit with R=10K and C=0.1µf. Connect a resistor R1 of

value 470 between the source and the capacitor.

2.2 Feed +1V, 500Hz square wave input.

2.3 Observe the input and output voltages on a CRO.

op-amp

configuration /

circuit

Input signal Output signal

Amplitude Frequency Amplitude Frequency

Integrator

Differentiator

2.4 Determine the gain of the circuit and tabulate the readings in table. Model waveform is

shown.

2.5 Plot the input and output voltages on the same scale on a linear graph sheet.

a)

(b)

Fig.2.5 Waveform for (a) op-amp integrator, (b) op-amp differentiator

2.6 POST LAB QUESTIONS

1. Determine the gain-bandwidth product of each amplifier.

2. Determine the input and output impedances of each amplifier.

3. (a) What is the normal output voltage in fig. 2-14?

(b) What is the output voltage of R2 opens?

(c) What happens if R5 opens?

Fig. 2-14

R f =1 0 k

u A 7 4 1

R 30 . 9 1 k

-V c c

+

-

+V c cV in

R 1 = 1 k

V o

10k

0.2V

10 k

-

1 0 k

+

+V c c

0.1V

0.5V

10k

V o

1V

u A 7 4 1

-V c c

10 k

3. NON- LINEAR OP-AMP CIRCUITS

3.1 OBJECTIVE

a. To study the operation of active diode circuits (precisions circuits) using op-amps, such as

half wave rectifier and full wave rectifier


S.No Equipment/Component name Specifications/

Value

Quantity


appendix

1


3 Resistors 10 K Ω 6

4 Semiconductor(Diode) 1N4002 2


6 Function Generator (0-2) MHz 1

7 ASLK PRO Kit Refer data sheet in

appendix

1

3.3 THEORY

The major limitation of ordinary diodes is that it cannot rectify voltage below 0.6v,

thecut in voltage of the diode. The precision rectifier, which is also known as a super

diode, is a configuration obtained with an operational amplifier in order to have a circuit

behaving like an ideal diode and rectifier. It can be useful for high-precision signal

processing.

3.3.1 Active Half Wave Rectifier

Op-amps can enhance the performance of diode circuits. For one thing, the op-amp

can eliminate the effect of diode offset voltage, allowing us to rectify, peak-detect, clip, and

clamp low-level signals (those with amplitudes smaller than the offset voltage). And because

of their buffering action op-amps can eliminate the effects of source and load on diode

circuits. Circuits that combine op-amps and diodes are called active diode circuits. Fig. (a)

shows an active HWR, with gain.

Vi

+ D1

uA741 Vo

- R1

RL

R2

Fig(a) Active HWR, (b) input and output waveforms

When the input signal goes positive, the op-amp goes positive and turns on the diode. The

circuit then acts as a conventional non-inverting amplifier, and the positive half-cycle

appears across the load resistor. On the other hand, when the input goes negative, the op-

amp output goes negative and turns off the diode. Since the diode is open, no voltage

appears across the load resistor. This is why the final output is almost a perfect half-wave

signal.

The high gain of the op-amp virtually eliminates the effect of offset voltage. For

instance, if the offset voltage equals 0.7V and open-loop gain is 100,000, the input that just

turns on the diode is

Vin

0.7V

7 V .100,000

When the input is greater than 7µV, the diode turns on and the circuit acts like a voltage

follower. The effect is equivalent to reducing the offset voltage by a factor of A.

The active HWR is useful with low-level signals. For instance, if we want to

measure sinusoidal voltages in the millivolt region, we can add a milli ammeter in series

with RL with the proper value of RL, we can calibrate the meter to indicate rms millivolts.


The output signal is limited by the IC's power sources: the output signal cannot be

greater than +15V

3.3.3 Experiment

1. Connect the circuit as shown in the figure. Consider all resistors value 10kΩ . Use

1N4002 diodes. Assemble the circuit.

2. Feed sinusoidal input of amplitude 200mVPP and frequency 100Hz. Using a CRO

observe the input and output voltages simultaneously. Determine the amplitude and

frequency of the output voltage.

3. Increase the frequency of the input signal till distortion appears in the output. Record

this frequency in the below table

4. Plot the input and output voltages on the same scale.

3.3.4 Full Wave Rectifier

A Full Wave Rectifier is a circuit, which converts an ac voltage into a pulsating dc

voltage using both half cycles of the applied ac voltage. It uses two diodes of which one

conducts during one half cycle while the other conducts during the other half cycle of the

applied ac voltage.

During the positive half cycle of the input voltage, diode D1 becomes forward

biased and D2 becomes reverse biased. Hence D1 conducts and D2 remains OFF. The

load current flows through D1 and the voltage drop across RL will be equal to the input

voltage. During the negative half cycle of the input voltage, diode D1 becomes reverse

biased and D2 becomes forward biased. Hence D1 remains OFF and D2 conducts. The

load current flows through D2 and the voltage drop across RL will be equal to the input

voltage.

Particulars Amplitude Time period Frequency

Input Voltage

Output Voltage

\

Input waveform

Output waveform:

Fig (a) Full wave rectifier, (b) input and output waveforms

Experiment1. Connect the circuit as shown in the figure. Consider all resistors value 10kΩ . Use

1N4002 diodes. Assemble the circuit.

2. Feed sinusoidal input of amplitude 200mVPP and frequency 100Hz.

3. Using a CRO observe the input and output voltages simultaneously. Determine the

amplitude and frequency of the output voltage. Increase the frequency of the input signal

till distortion appears in the output. Record this frequency in the below table.

4. Plot the input and output voltages on the same scale.

Particulars Amplitude Time period Frequency

Input Voltage

Output Voltage

3.4 PRE-LAB QUESTIONS

1. What is a precision diode

2. Give the uses of precision diode

3. Give some applications of precision diode

4. What are the major limitations of an ordinary diode?

5. For a precision HWR, draw the output waveform if Vin is a 300mV peak sine wave at

1 KHz.

3.5 POST LAB QUESTIONS

1. If the diode is reversed in half wave rectifier, what would the output voltage be?

2. Draw the equivalent circuit of a full wave rectifier for input voltage less than zero

volts(Vi<0)

3. Draw the circuit of a Clipper which will clip the input signal below a reference voltage.

4. What is Clamper circuit?

4. COMPARATOR4.1 OBJECTIVE:

1. Design the comparator for a frequency of 1 KHz sine wave with 5 Vpp at the non-

inverting input terminal and apply 1V dc voltage as reference voltage at the inverting

terminal of IC741

2. Design a Schmitt Trigger and conduct an experiment to obtain VUTP and VLTP for various

values of R1 and R2 for the specified design constraint with upper and lower threshold

should be ±1V, for the frequency range of 100 Hz to 10KHz.

4.2 COMPARATOR

4.2.1 Apparatus required:


1 IC 741 Refer data sheet 1


3 Multimeter 1

4 Resistors 10 kΩ 2


4.2.2 Theory:

A Comparator is a non-linear signal processor. It is an open loop mode application of

Op-amp operated in saturation mode. Comparator compares a signal voltage at one input with

a reference voltage at the other input. Here the Op-amp is operated in open loop mode and

hence the output is ±Vsat. It is basically classified as inverting and non-inverting comparator.

In a non-inverting comparator Vin is given to +ve terminal and Vref to –ve terminal. When

Vin < Vref, the output is –Vsat and when Vin > Vref, the output is +Vsat (see expected

waveforms). In an inverting comparator input is given to the inverting terminal and reference

voltage is given to the non inverting terminal. The output of the inverting comparator is the

inverse of the output of non-inverting comparator. The comparator can be used as a zero

crossing detector, window detector, time marker generator and phase meter

.

4.2.3 Experiment

1. Connect the components/equipment as shown in the circuit diagram.

2. Switch ON the power supply.

3. Apply 1 KHz sine wave with 5 Vpp at the non-inverting input terminal of IC741 using a

function generator.

4. Apply 1V dc voltage as reference voltage at the inverting terminal of IC741.

5. Connect the channel-1 of CRO at the input terminals and channel-2 of CRO at the

output terminals.

6. Observe the input sinusoidal signal at channel-1 and the corresponding output square

wave at channel-2 of CRO. Note down their amplitude and time period.

7. Overlap both the input and output waves and note down voltages at positions on sine

wave where the output changes its state. These voltages denote the Reference voltage.

8. Plot the output square wave corresponding to the sine input with Vref = 1V.

4.2.4 Expected Waveforms: Comparator Input & Output Waveforms

Observations

Theoretical Reference voltage (From the circuit)

Practical Reference voltage (From output waveform)

4.2.5 Pre Lab Question:

1. How many basic input parameters are required for a comparator?

2. How is Vo related to Vin and Vref?

3. Why this circuit is called a non-inverting comparator?

4. What do these maximum and minimum values correspond to?

4.2.6 Post Lab Question:

1. Draw the circuit diagram of a non-inverting comparator and inverting comparator.

2. What do you think is the role of resistors R1 and R2?

3. What is the output of a non-inverting comparator and inverting comparator if the

input is triangular signal?

4. What happens when Vref becomes greater than the maximum value of Vin?

5. What happens when Vref becomes less than the minimum value of Vin?

Result:

4.3 SCHMITT TRIGGER CIRCUITS

4.3.1 Apparatus required:


1 IC 741 Refer data sheet 1


3 Multimeter 1

4 Resistors 10K Ω

56 K Ω

2

1


6` Function Generator (0-2) MHz 1

4.3.2 Theory:

Circuit shows an inverting comparator with positive feedback. This circuit converts an

irregular shaped waveform to square wave or pulse. This circuit is known as Schmitt trigger

or Regenerative comparator or Squaring circuit. The input voltage Vin triggers (changes the

state of ) the output Vo every time it exceeds certain voltage levels called Upper threshold

voltage, VUT and Lower threshold voltage, VLT. The hysteresis width is the difference

between these two threshold voltages i.e. VUT – VLT. These threshold voltages are calculated

as follows.

VUT = (R2/R1+R2) Vsat when Vo= Vsat

VLT = (R2/R1+R2) (-Vsat) when Vo= -Vsat

The output of Schmitt trigger is a square wave when the input is sine wave or triangular

wave, where as if the input is a saw tooth wave then the output is a pulse wave.

R=10kΩ

R2 =10kΩ

Vin = 5Vpp

Schmitt trigger circuit using IC 741

Design Equations:


Minimum Input voltage is 1v and maximum output voltage is 10v.

Biasing voltage is ±12v

Frequency range is 100 Hz up to 10kHz

4.3.4 Experiment:

1. Connect the components / equipment as shown in the circuit diagram.

2. Switch ON the power supply.

3. Apply 5 Vpp and 1KHz input sine wave using function generator.

4. Connect the channel - 1 of CRO at the input terminals and Channel-2 at the output

terminals.

5. Observe the output square waveform corresponding to input sinusoidal signal.

6. Overlap both the input and output waves and note down voltages at positions on sine

wave where output changes its state. These voltages denote the Upper threshold voltage

and the Lower threshold voltage (see EXPECTED WAVEFORMS below).

7. Verify that these practical threshold voltages are almost same as the theoretical

threshold voltages calculated using formulas given in the THEORY section above.

8. Sketch the waveforms by noting down the amplitude and the time period of the input

Vin and the output Vo.

4.3.4 Model output Schmitt trigger input and output Waveforms:

Observation Table

Sl

no.

Theoretical Values Practical Value

1

2

3

4.3.5 Pre Lab Question:

1. Which is type of comparator called Schmitt trigger using IC741?

2. What is the output wave of Schmitt trigger if the input is sine wave?

3. What type of waveform is obtained when triangular or ramp waveforms are applied to

Schmitt trigger circuit?

4.3.6 Post Lab Question:

1. How do you calculate the theoretical values of VUT and VLT in the case of IC741?

2. What is the Hysteresis width?

3. What is the minimum amplitude of the input sine wave in the case of Schmitt trigger

using IC741

Results:

5. OSCILLATORS5.1 OBJECTIVE

1. Design a RC Phase Shift Oscillator for the oscillation frequency f0 =500Hz with peak to

peak voltage 20V with the closed loop gain of 30. Perform the experiment and plot the

waveforms

2. Design a Wein Bridge Oscillator for the oscillation frequency f0 =1 KHz with peak to

peak voltage 20V for the closed loop gain of 3. Perform the experiment and plot the

waveforms


S.No Equipment/Component name Specifications/Value Quantity1 IC 741 Refer data sheet in

appendix1

2 Cathode Ray Oscilloscope (0 – 20MHz) 1 13 Resistors 1.5K Ω

15K Ω10 K Ω18 K Ω435K Ω (1M Ω pot)

13111

4 Capacitors 0.1µf 5

5 Dual Regulated power supply (0 -30V), 1A 16 Function Generator (0-2) MHz 17 ASLK PRO Kit 1

5.3 THEORY

5.3.1 RC phase shift oscillator

The feedback network consists of three identical RC sections. Each section produces a phase

shift of 60o Therefore, the net phase shift of the feedback is 180 o The amplifier stage

introduces a phase shift of 180 o Therefore, the total phase shift between the input and output

is 360 o or 0 o. When the circuit is energized, by switching on the supply, the circuit starts

oscillating. The oscillations will be maintained if the loop gain is at least equal to unity.

Feedback fraction of the RC phase shift network

=1/29

The frequency of oscillation

f0=1/2 πRC6.

Circuit diagram

C=0.1µF, R=1.5K, R1=15K, RF=1M pot

DESIGN:

f0=1/2 πRC6

Rf ≥ 29R1

R1 ≥ 10R

Choose C =0.1µF

f0 = 500 Hz

R = 1 = 1

62πf0C 62πx500x0.1x10−6

R = 1.3 KΩ

Choose R = 1.5KΩ

R1≥15KΩ (to prevent loading)

Therefore, R1 = 10R = 15KΩ

Rf = 29R1=29x15KΩ=435KΩ (Use 1MΩpot)

Test Procedure:

1. Design the circuit for f 0=500Hz.calculate R1,R2,and Rf

2. Connect the circuit as shown in the figure with the designed values.

3. Switch on the power supply and observe the waveform.

4. Note down the amplitude and time period.

5. Plot the waveforms on a graph sheet.

5.3.2 Wein Bridge Oscillator

It is commonly used in audio frequency oscillator. The feedback signal is connected in

the input terminal so that the output amplifier is working as a non-inverting amplifier. The

Wien bridge circuit is connected between amplifier input terminal and output terminal. The

bridge has a series R network, in one arm and a parallel RC network in the adjoining arm. In

the remaining two arms of the bridge, resistor R1 and Rf are connected. the phase angle

criterion for oscillation is that the total phase shift around the circuit must be zero. This

condition occurs when bridge is balanced. At resonance frequency of oscillation is exactly the

resonance frequency of balanced Wien bridge and is given by f0 = 1/ (2πfC).assuming that

the resistors are input impedance value and capacitance are equal to the value in the reactive

stage of Wien bridge. At this frequency, the gain required for sustained.

Design

Given, fo = 1KHz;

Assume C = 0.0015µF

fo = 1/(2π RC),

R = 100KΩ

Rf = 2R = 200KΩ


The loading effect of the amplifier on the feedback network has an effect on the

frequency of oscillations and can cause the oscillator frequency to be up to 25% higher

than calculated. Then the feedback network should be driven from a high impedance

output source and fed into a low impedance load such as a common emitter transistor

amplifier but better still is to use an Operational Amplifier as it satisfies these

conditions perfectly.

The voltage gain of the Wein bridge oscillator circuit must be equal to or greater than

three “Gain = 3″ for oscillations to start.

Due to the open-loop gain limitations of operational amplifiers, frequencies above

1MHz are unachievable without the use of special high frequency op-amps.

Test Procedure:

1. Design the circuit for f 0=1KHz.calculate R and Rf





Oscillator Amplitude Time Period

RC Phase shift

Wein Bridge Oscillator

http://www.electronics-tutorials.ws/opamp/opamp_1.html


1) Give the condition which determines the frequency of oscillation

2) Give the formula to calculate frequency of oscillation for RC and Wein bridge

oscillator.

3) Where do you use IC oscillators?

5.5 POSTLAB QUESTIONS

1. What are the merits and Demerits of RC phase shift oscillator?.

2. Why do we need three RC networks for a phase shift oscillator?

3. Explain the main difference between an amplifier and an oscillator.

6. APPLICATIONS OF IC 555 TIMER

6.1 OBJECTIVE

1. Design a Monostable multivibrator for an ON- time of 11secs, with capacitor value of 1

µF. Conduct the experiment and plot appropriate graphs

2. Design an Astable multivibrator for a frequency of 1KHz with 60% duty cylcle using

555 timer



1 IC 555 Timer Refer data sheet in appendix 1


3 Resistors

330 Ω15K Ω10 M Ω6.8 K Ω1K Ω

11111

4 Capacitors0.1µf

1µf

2

2

5 Regulated power supply (0 -5V), 1A 16 Function Generator (0-2) MHz 1

6.3 THEORY

The 555 Timer is a monolithic timing circuit that can produce accurate and highly

stable time delays or oscillations. The timer basically operates in one of the two modes—

monostable(one-shot) multivibrator or as an as table(free-running) multivibrator. In the

monostable mode, it can produce accurate time delays from microseconds to hours. In the

astable mode, it can produce rectangular waves with a variable duty cycle. Frequently, the

555 is used in astable mode to generate a continuous series of pulses, but you can also use the

555 to make a one-shot or monostable circuit.

Applications of 555 timer in monostable mode include timers, missing pulse detection,

bounce free switches, touch switches, frequency divider, capacitance measurement, pulse

width modulation (PWM) etc.

In astable or free running mode, the 555 can operate as an oscillator. The uses include

LED and lamp flashers, logic clocks, security alarms, pulse generation, tone generation, pulse

position modulation, etc. In the bistable mode, the 555 can operate as a flip-flop and is used

to make bounce-free latched switches, etc.

Pin diagram of IC55

Functional block diagram of IC 555

6.3.1 MONOSTABLE MULTIVIBRATOR

The circuit has an external resistor and capacitor. The voltage across the capacitor is

used for the threshold to pin 6. When the trigger arrives at pin 2, the circuit produces output

pulse at pin 3. Initially, if the output of the timer is low, that is, the circuit is in a stable state,

transistor Q1 is on and the external capacitor C is shorted to ground. Upon application of a

negative trigger pulse to pin 2, transistor Q1 is turned off, which releases the short circuit

across the capacitor and as a result, the output becomes high. The capacitor now starts

charging up towards vcc through RA. When the voltage across the capacitor equals 2/3vcc

the output of comparator 1 switches from low to high, which in turn makes the output low via

the output of the flip-flop. Also, the output of the flip-flop turns transistor Q1 on and hence

the capacitor rapidly discharges through the transistor. The output of the monostable

multivibrator remains low until a trigger pulse is again applied. The cycle then repeats. Below

figure shows the trigger input, output voltage, and capacitor voltage waveforms. As shown,

the pulse width of the trigger input must be smaller than the expected pulse width of the

output waveform. Moreover, the trigger pulse must be a negative-going input signal with an

amplitude larger than 1/3 vcc. The time for which the output remains high is given by time

period = 1.1RAC

Where RA is in ohms, C in farads and time period in seconds. Once the circuit is triggered, the

output will remain high for the time interval time period. It will not change even if an input

trigger is applied during this time interval. In other words, the circuit is said to be non-

retriggerable. However, the timing can be interrupted by the application of a negative signal

at the reset input on pin 4. A voltage level going from +vcc to ground at the reset input will

cause the timer to immediately switch back to its stable state with the output low.

The trigger input may be driven by the output of astable multivibrator with high duty

cycle. If the desired pulse width is of the order of seconds, the output can be seen using a

LED and the resistance value used will be of the order of MΩ. In this case the trigger can be

supplied manually by grounding the trigger input for a fraction of a second.

Input and output waveform

DESIGN Time period of

pulse=T=1.1RC=11s

Let C=100f

T=1.1RC

11s=1.1*R*1uf

R=10M

6.3.2 ASTABLE MULTIVIBRATOR

An astable multivibrator is a wave-generating circuit in which neither of the output

levels is stable. The output keeps on switching between the two unstable states and is a

periodic, rectangular waveform. The circuit is therefore known as an ‘astable multivibrator’.

Also, no external trigger is required to change the state of the output, hence it is also called

‘free-running multivibrator’. The time for which the output remains in one particular state is

determined by the two resistors and a capacitor externally connected to the 555 timer.

If the output is high initially, capacitor C starts charging towards vcc through RA and

RB. As soon as the voltage across the capacitor becomes equal to 2/3 vcc, the upper

comparator triggers the flip-flop, and the output becomes low. The capacitor now starts

discharging through RB and transistor Q1. When the voltage across the capacitor becomes

1/3vcc, the output of the lower comparator triggers the flip-flop, and the output becomes

high. The cycle then repeats.

The output voltage and capacitor voltage waveforms are shown in Figure below.

Output voltage waveform

the time during which the capacitor charges from 1/3vcc to 2/3 vcc is equal to the time the

output is high and is given by

ton =0.69(RA + RB)C

the time during which the capacitor discharges from 2/3vcc to 1/3vcc is equal to the time the

output is low and is given by

toff =0.69RBC

the total period of the output wave form is

T=ton+toff=0.69(RA+2RB)C

Thus the frequency of oscillation is

fo=1/T=(1.45/(RA+2RB)C)


The 555 Timer is a very versatile low cost timing IC that can produce a very accurate

timing periods with good stability of around 1%

Duty cycle should be greater than 50% to 80%

Single RC network connected to a single positive supply of between 4.5 and 16 volts.

Load resistance minimum value is 1KΩ

6.4 PRE-LAB

Choose the correct answer

1. A quasi-stable state is such that the output

a) does not change at all

b) Changes unpredictably

c) Changes after a predetermined period of time

d) Changes just after a very short duration of time.

2. A monostable multivibrator is also called a ‘one-shot multivibrator’ because

a) Each time a trigger pulse is applied, the circuit produces a single pulse.

b) The circuit has to be triggered only once

c) The output pulse duration is very small

d) None of the above.

3. true/false

Pin 5 is bypassed to ground through a 0.01 μF capacitor to prevent problems due to random

electrical noise. (True / False)

6.5 EXPRIMENT

6.5.1 MONOSTABLE MULTIVIBRATOR


2. Switch on the power supply.

3. Give the trigger pulse to pin 2 just by touching the pin for second.

4. Trigger can be obtained from either CRO external 2v or FG.

5. Check the response by LED glowing upto the designed RC time delay.

6.5.2 ASTABLE MULTIVIBRATOR





Theoretical O/P Practical O/P

TOTAL TIME TOTAL TIME

TON TON

TOFF TOFF

AMPLITUDE of

Square .Close to VCC

AMPLITUDE of

Square .

Charg& Discharging

Of Capcitor by

measuring Amplitude

2/3 VCC – 1/3 VCC

3.3 – 1.6 = 1.7 v

Charg& Discharging

Of Capcitor by

measuring Amplitude

6.6 POST LAB QUESTION

1. If the diode is connected across RB in the astable multivibrator circuit, what is condition

on RA and RB to achieve duty cycle of 50%?

2. What is the output state of a 555 timer connected in a monostable mode with a high

trigger input.

3. For the proper functioning of a monostable multivibrator, what must be the relative

magnitude of the pulse-width of the trigger input in comparison to the expected pulse-

width of the output waveform?

7. DIGITAL-TO-ANALOG CONVERTER

7.1 OBJECTIVES

1. Design a D to A Convertor with a resolution of 0.3125V using R-2R network.

Assume the logic 1 to be 5V and logic 0 to be 0V.

2. Design a D to A Convertor with a resolution of 0.3125V using binary weighted

resistors. Assume the logic 1 to be 5V and logic 0 to be 0V.




appendix

1

3 Resistors 4K Ω

2K Ω

1K Ω

1

7

4


5 Regulated power supply (0 -5V), 1A 1

6 Multimeter 1

7.3 THEORY

In electronics, a digital-to- analog converter (DAC or D-to-A) is a device for converting a

digital (usually binary) code to an analog signal (current, voltage or electric charge). Digital-

to-analog converters are the interface between the abstract digital world and the analog real

life. An analog-to-digital converter (abbreviated ADC, A/D or A to D) is an electronic circuit

that converts continuous signals to discrete digital numbers. Most of the real world physical

quantities such as voltage, current, temperature, pressure and time are available in analog

form. Even though an analog signal represent a real physical parameter with accuracy, it is

difficult to process, store or transmit the analog signal without introducing considerable error

because of the superimposition of noise as in the case of amplitude modulation. Therefore,

for processing, transmission and storage purposes, it is often convenient to express these

variable in digital form. It gives better accuracy and reduces noise.

D/A conversion is an important interface process for converting digital signals to

analog (linear) signals. An example is a voice signal that is digitized for storage processing,

or transmission and must be changed back into an approximation of the original audio signal

in order to drive a speaker.

Figure-1: A basic DAC

D/A Conversion fundamentals

The DAC fundamentally converts finite-precision numbers (usually fixed-point binary

numbers) into a physical quantity, usually an electrical voltage. Normally the output voltage

is a linear function of the input number.

Figure-2: Block Schematic of a basic DAC

Figure-2 shows the basic configuration for digital-to-analog (D/A) conversion. The

input is an n-bit binary word D and is combined with a reference voltage VR to give an

analog output signal. The output of a DAC can be either a voltage or current. For a voltage

output DAC, the D/A converter is mathematically described as

Vo = K VFS (d12-1+ d22-2+….+dn2-n)

Where, Vo = output voltage

VFS = full scale output voltage

K = scaling factor usually adjusted to unity

d1 d2... dn = n-bit binary fractional word with the decimal point located at the left d1 = most significant bit (MSB) with a weight of VFS / 2

dn = least significant bit (ISB) with a weight of VFs / 2n

Since the input to the D/A converter has a finite number of digital combinations, the resulting

analog output also has a limited number of possible values (unlike pure analog signals, which

may have an infinite number of values). The greater the number of possible values, the closer

the analog output will be to the ideal value. The number of possible levels is determined by

the number of lines or bits in the digital number. More specifically, the number of states is

computed as 2N where N is the number of bits in the digital number. For example, an 8-bit

D/A converter could be expected to produce 28, or 256, discrete output steps. If the full-scale

range of the converter is 0 to 10 volts, then each step will be 10/256, or about 39 millivolts. If

finer resolution is required, we need more bits in the digital number. Thus, a converter with

10-bit resolution would provide 210, or 1024, steps with each step being equivalent to

10/1024, or about 9.8 millivolts. Accuracy of a D/A converter describes the amount of error

between the actual output of the converter and the theoretical output for a given input

number. This rating inherently includes several other sources of error.

A certain amount of time is required for the output of a D/A converter to be correct

once a particular digital number has been applied at the input. Two major factors cause this

delay. First, it takes time for the changes to pass through the converter circuitry; this is called

propagation time. Second, the output of the D/A converter has a maximum rate of change

called slew rate, which is identical to the slew rate problems discussed with reference to op

amps. The delays caused by slew rate limiting and propagation time are collectively referred

to as settling time--the total time required for the analog output to stabilize after a new digital

number has been applied to the input.

The overall operating range of a D/A converter can be shifted up or down from the

optimum point. This DC offset is called offset error. In a somewhat similar manner, one end

of the range can be correct but the other extreme too high or too low. This is called a gain

error or scaling error.

As with A/D converters, we normally want a monotonic output. In other words, the

output should increase whenever the input number increases. However, it is possible for a

D/A converter to have a reduction in analog output at a particular point in its range, even

though the digital input is increasing uniformly.

Figure-3: Oscilloscope display showing several imperfections in a low-quality D/A converter.

Figure-3 shows the performance of a low-quality D/A converter. Several of the potential

problems described are present in the converted waveform. The input to the converter is a 4-bit

down counter (e.g., 15, 14, 13... 2, 1, 0, 15), and the analog output should be 16 equally spaced,

decreasing steps for each cycle, producing a reverse saw tooth waveform. If you examine the

waveform carefully, you can see the 16 distinct output levels; however, the steps are not equal in

amplitude (linearity problems)--the midpoint level actually increases instead of decreasing (non

monotonic), and there are several glitches caused by switching transients.

WEIGHTED D/A CONVERTER

Figure- 4 shows the schematic diagram of a weighted digital-to-analog converter circuit built

around a 741 op amp. You can recognize the configuration as being identical to the inverting

summing amplifier.

Figure-4: A weighted D/A converter with 3-bit resolution

Calculations: Output Voltage is given by

Vo = - ((Rf / R1)+ (Rf / R1) +(Rf / R1) ) VR

where, VR = 5V , Rf = 2R , b3 (MSB bit ) andb0(LSB bit )

R2R LADDER D/A CONVERTER

One of the most popular methods for D/A conversion is shown in Figure-5. It is called

an R2R ladder D/A converter, since the input network resembles the rungs on a ladder and

the resistors in the input network are either equal (R) or have a 2:1 ratio (2R). One advantage

of the R2R converter over the weighted converter previously discussed is immediately

apparent; the resistors have a 2:1 ratio regardless of the number of bits being converted. This

makes matching resistors much easier and even makes the use of integrated resistors

practical.

An easy way to analyze the operation of the circuit is to Thevenize the input circuit

for one or more digital input numbers. Once the input circuit has been simplified with The

venin’s Theorem, you will be left with a simple inverting amplifier circuit whose input

voltage is the The venin equivalent voltage and whose gain is determined by the ratio of

feedback resistance to The venin equivalent input resistance. By performing several analyses

with different input numbers, you will discover that the least significant input (b0) produces

the least effect on output voltage, and the next input (bl) has twice as much effect on output

voltage. Similarly, bit b2 has twice the effect of b1, but only half the effect onoutput voltage

of b3. These variable effects are identical to the relative weights of the digits in a binary

number.

Figure-5: A 3-bit R2R ladder D/A converter utilizing a 741 op amp

Calculations: Output Voltage is given by

Vo = - VR * (Rf / 2R) * ( b2/2 + b1/4 + b0/8 )

where, VR = 5V , Rf = 2R , b2(MSB bit ) and b0 (LSB bit )

Design Constraints

Resistance should be use ±1 to ±5 tolerance

Input voltage should be 5V for high and 0V for low.

EXPERIMENT

(a) Weighted Resistor DAC

1. Setup the circuit as shown in Figure-4.

2. Reference voltage VR is set as 5V

3. Find the output voltage Vo for different combinations of digital binary inputs from

000 to 111.

4. Compare the calculated values with observed values and plot DAC characteristics

(b) R-2R LADDER DAC

1. Setup the circuit as shown in Figure-5. Select the approximate value of R and 2R

2. Set the approximate value of R and 2R.

3. Reference voltage VR is set as 5V

4. Find the output voltage Vo for different combinations of digital binary inputs from

000 to 111.

5. Compare the calculated values with observed values and plot DAC characteristics

(c) Experimental data and observations

Weighted Resistor DAC

b2 b1 b0 Vo ( observed) Vo ( Calculated)

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

R-2R LADDER DAC

b2 b1 b0 Vo ( observed) Vo ( Calculated)

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 0 1

1 1 0

1 1 1

PRE LAB QUESTIONS

1. Classify DACs on the basis of their output.

2. How many resistors are required in a 12-bit weighted-resistor DAC?

3. How many levels are possible in a 2-bit DAC? What is its resolution if the output voltage

range is 0 to 3 V?

4. A 5-bit D/A converter is available. Assume that ‘00000’ corresponds to an output of +10 V

and that the D/A converter is connected for -0.1V per increment. What output voltage will be

produced for ‘11111’?

POST LAB QUESTIONS

1. Determine the output voltage of the DAC in Figure-7(a). The sequence of four-digit binary codes

represented by the waveforms in Figure-7(b) are applied to the inputs. A high level is a binary l,

and low level is a binary 0. The least significant binary digit is Do.

Figure-7

2. The R-2R ladder DAC shown in Figure-8 below consists of 10K & 20KΩ resistors, VREF =

2V and R1 = 10KΩ. Determine the values required for RF such that VFS = 10V.

Figure-8

8. AC AMPLIFIERS8.1 OBJECTIVE

To sketch the following basic op-amp circuits and explains the operation of each:

Inverting amplifier

Non-inverting amplifier

8.2 SOFTWARE REQUIRED

ORCAD 9.2

8.3 THEORY

8.3.1 AC AMPLIFIER

The inverting and non-inverting op-amp amplifier configurations respond to both ac and dc

signals. To get the ac frequency response of an op amp or if the ac input signal is

superimposed with dc level, it becomes essential to block the dc component. This is achieved

by using an AC amplifier with a coupling capacitor. AC amplifiers are of inverting and non-

inverting type.

8.3.2 INVERTING AC AMPLIFIER

The circuit is shown in below figure. The capacitor blocks the dc component of the input and

together with the resistor R1 sets the lower 3 dB frequency of the amplifier.

8.3.3. NON-INVERTING AMPLIFIER

In most cases it is possible to DC couple the circuit. However in this case it is necessary to

ensure that the non-inverting has a DC path to earth for the very small input current that is

needed. This can be achieved by inserting a high value resistor, R3 in the diagram, to ground

as shown below. The value of this may typically be 100 k ohms or more. If this resistor is not

inserted the output of the operational amplifier will be driven into one of the voltage rails.

When inserting a resistor in this manner it should be remembered that the capacitor-resistor

combination forms a high pass filter with a cut-off frequency. The cut-off point occurs at a

frequency where the capacitive reactance is equal to the resistance.

Inverting Amplifier

Design an inverting amplifier for the gain of 15. Let R1=1.5k, C=0.1µF.

Non-Inverting amplifier

Design a non-inverting amplifier for the gain of 15. Let R1=1.5k , C=0.1µF.

TEST PROCEDURE

1. Open the Pspice AD Lite software by double clicking its icon.

2. After few moments Command window will appear.

3. Go to the File Menu and select a new text file. (File New text file)

4. A blank text file will appear with a title ‘untitled’

5. Now start typing your program. After completing, save the text file as .cir with

appropriate name. To execute the program go to Debug Menu and select Run.

6. After execution output will appear in the Command window .If there is an error then

with an alarm, type of error will appear .

7. If the results contain errors, start up the text editing program again and modify the

net list.

8. Rectify the error if any and go to Debug Menu and select Run.

9. If there is no errors go to Trace menu and click add trace. Enter the output node

Voltage and click ok then the output will display.

Prelab

1. What is the input impedance of a non inverting op-amp amplifier?

2. If the open loop gain of an op-amp is very large, does the closed loop gain depend upon

the external components or the op-amp?

3. Define common mode rejection ratio

4. Explain the meaning of open loop and closed loop operation of an op- amp?

5. What is a practical op-amp? Draw its equivalent circuit.

Postlab

1. Determine the bandwidth of a non-inverting amplifier, voltage follower and inverting

amplifier

2. Determine the gain-bandwidth product of each amplifier.

3. Determine the input and output impedances of each amplifier.

9. OP-AMP APPLICATIONS9.1 OBJECTIVE

To study the operation of following circuits

a)Adder

b)Clipper

c)Clamper

d)Square waveform generator


ORCAD 9.2

9.3 THEORY

9.3.1 Summing amplifier

The summing amplifier is an application of the inverting op-amp configuration. The

summing amplifier has two or more inputs, and its output age is proportional to the algebraic

sum of its input voltages. Fig. 7-4 shows a two-input inverting summing amplifier.

Case-1: If all the three resistors are equal (R1=R2=Rf=R) then

VO = - (Vinl + Vin2)

The above equation shows that the output voltage has the same magnitude as the sum of two

input voltages but with a negative sign indicating inversion.

Case-2: When Rf is larger than the input resistors, the amplifier has a gain of −

R f

R

where R is the value of each equal value input resistor (R1=R2=R). The general expression for the

output is

Vo=−R f

R(V in 1+V in 2 )

The above equation shows that the output voltage has the same magnitude as the sum of all the

input voltages multiplied by a constant determined by the ratio −

R f

R

Case-3: By setting the ration Rf/R equal to the reciprocal of the number of inputs (n), ie.,

Fig 1.Summing Amplifier

Fig 2.Summer output

R f

R=1

n, a

summing amplifier can be made to produce the mathematical average of the input voltages.

Case-4: A different weight can be assigned to each input of a summing amplifier by simply

adjusting the values of the input resistors. In this case, the output voltage can be expressed as

Vo=−(Rf

R1V in1+

R f

R2V in2 )

The weight of a particular input is set by the ratio of Rf to Rx for the input (Rx= R1, R2…)

1.3.2. Active clipper

Clipper is a circuit that is used to clip off (remove) a certain portion of the input

signal to obtain a desired output wave shape. In op-amp clipper circuits, a rectified diode ma

be used to clip off certain parts of the input signal. Fig. 2-2-4 (a) shows an active positive

clipper, a circuit that removes positive parts of the input signal. The clipping level is

determined by the reference voltage

Vref.R

Vo

2.2k

Vin D1

-

uA741

+

Vref

.

+VCC 10k

POT

Fig 3(a) Active Limiter

(b) (c)

Fig 4 (b) input & output waveforms with +Vref, (c) input & output waveforms with -Vref

With the wiper all the way to the left, Vref is o and the non-inverting input is grounded.

When Vin goes positive, the error voltage drives the op-amp output negative and turns on the

diode. This means the final output VO is 0 (same as Vref) for any positive value of Vin.

When Vin goes negative, the op-amp output is positive, which turns off the diode

and opens the loop. When this happens, the final output VO is free to follow the negative

half cycle of the input voltage. This is why the negative half cycle appears at the output. To

change the clipping level, all we do is adjust Vref as needed.

Active clamper

In clamper circuits, a predetermined dc level is added to the input voltage. In other

words, the output is clamped to a desired dc level. If the clamped dc level is positive, the

clamper is called a positive clamper. On the other hand, if the clamped dc level is negative, it

is called a negative clamper. The other equivalent terms for clamper are dc inserter or dc

restorer.

A clamper circuit with a variable dc level is shown in fig (a). Here the input wave

form is clamped at +Vref and hence the circuit is called a positive clamper.

1uF

C1

- + Vo

Vp RL

Vin 1k

R

4.7k +VCC D1

-

uA741

+

Rp -VCC

10k

Fig 5 (a) Peak clamper circuit

The output voltage of the clamper is a net result of ac and dc input voltages applied to the

inverting and non-inverting input terminals respectively. Therefore, to understand the circuit

operation, each input must be considered separately. First, consider Vref at the non-inverting

input. Since this voltage is positive, is +Vo is positive, which forward biases diode D1. This

closes the feedback loop and the op-amp operates as a voltage follower. This is possible

because C1 is an open circuit for dc voltage. Therefore Vo = Vref. As for as voltage Vin at the

inverting input is concerned during its negative half-cycle D1 conducts, charging C1 to the

negative peak value of the VP. However, during the positive half-cycle of Vin diode D1 is

reverse biased and hence the voltage VP across the capacitor acquired during the negative

half-cycle is retained. Since this voltage VP is in series with the positive peak voltage VP, the

output peak voltage Vo=2VP. Thus the net output is Vref +VP, so the negative peak of 2VP is

at Vref. For precision clamping C1Rd<<T/2, where Rd is the forward resistance of the diode

D1 (100Ω typically) and T is the time period of Vin. The input and output wave forms are

shown in figure.

(i) (ii)

(iii)

Fig 6(b) Input and output waveforms (i) with Vref=0V, (ii) with +Vref, (iii) with -Vref

Resistor R is used to protect the op-amp against excessive discharge currents from capacitor

C1 especially when the dc supply voltages are switched off. Negative clamping at a negative

voltage is accomplished by reversing diode D1 and using the negative reference voltage –

Vref.

Square wave generator

The square wave generator circuit is forced to operate in the saturated region. That is,

the o/p of the Op-Amp is forced to swing between positive saturation (+V sat) and negative

saturation (-Vsat), resulting in the square wave output. This square wave generator is also

called free running or astable multivibrator.

R2/[R1+R2]Vout = βVout

Fig.7 square wave generator

A fraction of the output (βV) is feedback to the input non-inverting terminal. Thus

the Vref is βV and may take values as + βVsat or – βVsat. The output is also feedback to the

negative i/p terminal after integrating by means of a low pass RC combination. Whenever

the i/p at the negative terminal exceeds Vref switching takes place resulting in a square wave

output. Time period of square wave is given as

for R1 = 1.16 R2, it can be seen that T = 2RC.

Square Wave Generator

T = 1.6 ms

V = 24 V

Vsat = 12V; βVsat = 4v

EXPERIMENT

Use op-amp dc power supply voltages of + 15V.

(1) Summer

Connect the summer circuit as shown in fig 1 with R1, R2, Rf = 10KΩ. Use PSPICE

simulation

(2) Active clipper

Connect the clipping circuit as shown in fig 3 (a) with R=2.2kΩ. Use 1N4002 diode.

Sinusoidal input of amplitude 3Vp and frequency 1KHz using PSPICE simulation.

(3) Active clamper

Design a positive clamping circuit with clamping level at zero as shown in fig.5 (a). Note that

Vref = 0V. Consider C1 = 0.1µF, R = 4.7 KΩ and RL = 10 KΩ . Use 1N4002 diode. Feed

5VPP, 10 KHz sinusoidal inputs. Simulate using PSPICE.

(4)Square waveform generator

Connect the circuit as shown in fig 7 with C=0.05µf, R1=20K pot, R2=10K, Rf=10K.

Simulate using PSPICE

Prelab

1. What is a Differential amplifier

2. Define a Summing amplifier

3. Define difference mode gain and common mode gain

4. Give the applications of summing and differential amplifier

5. What is the total time period of the waveform generated by the square wave generator?

6. How can you obtain a non symmetrical square waveform?

7. Which circuit is called a gating circuit? Why?

8. A triangular wave can be generated by a integrating ___________.

9. What is the difference between saw tooth and triangular wave?

TEST PROCEDURE



3. Go to the File Menu and select a new text file. (File Newtext file)




6. After execution output will appear in the Command window. If there is an error then

with an alarm, type of error will appear.

7. If the results contain errors, start up the text editing program again and modify the net

list.


9. If there is no errors go to Trace menu and click add trace. Enter the output node voltage

and click ok then the output will display.

Postlab

1. If the diode is reversed in fig. 3 (a), what would the output be like?

2. If the diode is reversed in fig. 5(a), what would be the output?

10. ACTIVE FILTERS

10.1 OBJECTIVE

To construct a low pass , high pass ,Band pass and Band stop filter using PSPICE simulation

and to plot the frequency response.


ORCAD 9.2

10.3 THEORY

A filter is a circuit that lets certain frequencies pass and blocks other frequencies. This

selective nature can be done two ways, either with passive filters or with active filters.

Passive filters completely comprised of passive elements; namely resistors, capacitors and/or

inductors. Active filters use active devices, i.e. an op-amp, to filter out unwanted signals.

Active filters have the following advantages over passive filters.

Gain and frequency adjustment and tuning.

No inductors (reduces cost and size).

No loading effects.

Some disadvantages of active filters.

Bandwidth limitations

Fabrication tolerances

Can only respond to a specific range of signal magnitudes.

Figure 2 shows the performance of an ideal low-pass, band-pass, and high pass circuit. Active

filters can be classified as; low-pass, high-pass, band-pass, notch, or all pass circuit. These

circuits are all used for different purposes, but this lab will focus on the design of second

order low pass and high pass Filters using PSPICE.

10.1.Graph of practical (a) low pass and (b) high pass filter (c) Band Pass filter

(d) Band Stop filter

SECOND ORDER LOW PASS FILTER

Fig.10.2.Second-Order low-pass filter

SECOND ORDER HIGH PASS FILTER

Fig.10.3.Second-Order high-pass filter

BAND PASS FILTER

The bandpass filter passes one set of frequencies while rejecting all others. The band-stop

filter does just the opposite. It rejects a band of frequencies, while passing all others. This is

also called a band-reject or band-elimination filter. Like bandpass filters, band-stop filters

may also be classified as (i) wide-band and (ii) narrow band reject filters.

The narrow band reject filter is also called a notch filter. Because of its higher Q, which

exceeds 10, the bandwidth of the narrow band reject filter is much smaller than that of a wide

band reject filter.

Band Pass Filter

Fig 10.4 Band Pass Fiter

This cascading together of the individual low and high pass passive filters produces a low

“Q-factor” type filter circuit which has a wide pass band. The first stage of the filter will be

the high pass stage that uses the capacitor to block any DC biasing from the source. This

design has the advantage of producing a relatively flat asymmetrical pass band frequency

response with one half representing the low pass response and the other half representing

high pass response as shown.

The higher corner point ( ƒH ) as well as the lower corner frequency cut-off point ( ƒL ) are

calculated the same as before in the standard first-order low and high pass filter circuits.

Obviously, a reasonable separation is required between the two cut-off points to prevent any

interaction between the low pass and high pass stages. The amplifier also provides isolation

between the two stages and defines the overall voltage gain of the circuit.

The bandwidth of the filter is therefore the difference between these upper and lower -3dB

points. For example, if the -3dB cut-off points are at 200Hz and 600Hz then the bandwidth of

the filter would be given as: Bandwidth (BW) = 600 – 200 = 400Hz. The normalized

frequency response and phase shift for an active band pass filter will be as follows.

While the above passive tuned filter circuit will work as a band pass filter, the pass band

(bandwidth) can be quite wide and this may be a problem if we want to isolate a small band

of frequencies. Active band pass filter can also be made using inverting operational amplifier.

So by rearranging the positions of the resistors and capacitors within the filter we can

produce a much better filter circuit as shown below. For an active band pass filter, the lower

cut-off -3dB point is given by ƒC2 while the upper cut-off -3dB point is given by ƒC1.

BAND-STOP (OR REJECT) FILTER.

Fig 10.5 Band Stop Filter

A wide band-stop filter using a low-pass filter, a high-pass filter and a summing amplifier

is shown in figure. For a proper band reject response, the low cut-off frequency fL of high-

pass filter must be larger than the high cut-off frequency fH of the low-pass filter. In addition,

the pass band gain of both the high-pass and low-pass sections must be equal.

This is also called a notch filter. It is commonly used for attenuation of a single frequency

such as 60 Hz power line frequency hum. The most widely used notch filter is the twin-T

network illustrated in fig. (a). This is a passive filter composed of two T-shaped networks.

One T-network is made up of two resistors and a capacitor, while the other is made of two

capacitors and a resistor. One drawback of above notch filter (passive twin-T network) is that

it has relatively low figure of merit Q. However, Q of the network can be increased

significantly if it is used with the voltage follower. Here the output of the voltage follower is

supplied back to the junction of R/2 and 2 C.

10.4 PRE-LAB

1. Compute the transfer function of the amplifier in Figure assuming an ideal op-amp.

Use the PSPICE model of an op-amp and verify your results in PSPICE using the following

values: Vcc=+12V, Vee=-12V, R1=1kΩ, and VS being a sin wave with a frequency of 10

kHz and amplitude of 1mV.

10.5 EXPERIMENT

10.5.1 Low pass filter

Design a Second order low pass filter as shown in figure 2 for the values R1 = R2=3.3KΩ,

C2=C4=0.047uF, Rx=5.8KΩ, Ry-10KΩ and sinusoidal input of amplitude 1V and frequency

10KHz using PSPICE simulation.

10.5.2 High pass filter

Design a Second order High pass filter as shown in figure 3 for the values R1 = R2=3.3KΩ,

C2=C4=0.047uF, Rx=5.8KΩ, Ry=10KΩ and sinusoidal input of amplitude 1V and frequency

10KHz using PSPICE simulation.

10.5.3 Band Pass Filter

Design a Band Pass Filter as shown in figure 4 keep the same values of low pass and high

pass filter values and sinusoidal input of amplitude 1V and frequency 10KHz using PSPICE

simulation.

10.5.4 Band Stop Filter

Design a Band Stop filter as shown in figure 5 for the corresponding values as in figure and

sinusoidal input of amplitude 1V and frequency 10KHz using PSPICE simulation.

10.6 TEST PROCEDURE



4. Go to the File Menu and select a New text file. (File Newtext file)




7. After execution output will appear in the Command window. If there is an error then with

an alarm, type of error will appear.

8. If the results contain errors, start up the text editing program again and modify the net list.


10. If there is no errors go to Trace menu and click add trace. Enter the output node voltage

and click ok then the output will display.

10.7 POST LAB QUESTION

1. Derive the transfer function of the circuit in Figure. By observing the transfer function,

what is the purpose of this topology? Verify your results in PSPICE with an “AC”

simulation using R1=500 Ω, R2=2.5kΩ, a source with a 0.5V magnitude, and C=0.01F.

Do the PSPICE results agree with what you derived?

final lic manual studentcopy 1455085288190

Documents