final solution 09

7/30/2019 Final Solution 09

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E 40

FINAL EXAMINATION

AUTUMN 09

NAME _________SOLUTION___________

I.D. NUMBER ______________________________

SIGNATURE ______________________________

TIME : 3 HOURS

OPEN BOOKS, OPEN NOTES

NO PC or WIRELESS COMMUNICATION DEVICES

STATE your ASSUMPTIONS and REASONINGNO CREDIT FOR ANSWERS WITHOUT WORK OR REASONING

(1) __________/10 (5) __________/14

(2) __________/12 (6) __________/14

(3) __________/12 (7) __________/12

(4) __________/12 (8) __________/14

Total __________/100


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1) Check the correct answers or fill in the blanks. (10%)

a) Which modulation technique is most commonly used in mobile phone ?AM _____; FM _____; PSK __X__; ASK_____; FSK_____

b) What are the TWO most common techniques that allow multiple mobile phone users tocommunicate with the same frequency channel ?TDD _____; FDD _____; TDMA __X__; FDMA_____; CDMA__X__

c) How many users can communicate simultaneously with a GSM base station ?8 _____; 300 _____; 2400 __X__; 4800 _____; unlimited _____;

d) Convert the decimal number -92 to a 9-bit signed2s complementbinary number.

____110100100_____

remainder92 / 2 = 46 046 / 2 = 23 023 / 2 = 11 111/2 = 5 15/2 = 2 12/2 = 1 0

8-bit binary of 100 is 01011100

1s compliment 101000112s compliment 101001009-bit signed 2s compliment 110100100

e) Convert the binary number11101.1011 to a decimal number.

____29.6875_______

1 X 24 + 1 X 23 + 1 X 22 + 0 X 21 + 1 X 20 + 1 X 2-1 + 0 X 2-2 + 1 X 2-3 + 1 X 2-4= 29.6875


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2) For the following circuit (12%)

4.5mA 2K 7mA

+

2K

5K V10.5 V1

V2V3

IX

a) Define the node voltages. Write a set ofequations to solve the node voltages. Define

whateveradditional variables that may be necessary to set up the equations.

KCL @ node 1

0m7K5

VV

K2

V 211 (1)

KCL @ node 2

0IK5

VVX

12

(2)

KCL @ node 3

0m5.4I

K2

VX

3

(3)

Voltage Controlled Voltage Source

132 V5.0VV (4)

b) Solve the equations to find the node voltages.

(1) 7V1 2V2 = 70

(2) V1 + V2 5KIX =

(3) V3 2KIX =

(4) 0.5V1 V2 V3 = 0

Solving this matrix of equations yields

V1 = 10V; V2 = 0V; V3 = 5V; and IX = 2mA (not required)


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c) Determine the power of each source (i.e., two independent-current-sources and onevoltage-controlled-voltage-source) and if it is supplying or dissipating power.

P4.5mA = V3 X (mA) = (-5) X (m) = 22.5mW (supplying power)

P7mA = V1 X (7mA) = 10 X (7m) = 70mW (supplying power)

PVCVS = 0.5V1 X IX= 5 X 2m = +10mW (dissipating power)

Followings are not required:

P2K-left = V32 / (2K) = (-5)2 / 2K = +12.5mW (dissipating power)

P2K-right = V12

/ (1K) = (10)2

/ 2K = +50mW (dissipating power)

P5K

= (V1 V2)

2

/ (5K

) = (100)2

/ 5K = +20mW (dissipating power)

Total = 22.5m 70m + 10m + 12.5m + 50m + 20m = 0


5/15

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3) For the following circuit (12%)

a) Derive

in

out

V

V

-

+

-

+

10K

Vout

Vin

10K

10K

R2

10K

R1

One can solve KCL for the entire circuit.A simpler approach is to recognize that the top op amp is an inverting amplifier :

X

1

2

ou VR

RtV (1)

The bottom op amp is a difference amplifier :

)VV(V outinX (2)

(2) (1) )tVV(RRV ouin

1

2out ;

2

1in

out

R

R1

1VV

---------------------------------------------------------------------------------------------------Derivation of Difference Amplifier :V+ = Vin

(Vout V)/10K + (Vx V)/10K = 0; V = (Vout + Vx)

V+ = V; Vin = (Vout + Vx); Vx = Vin Vout

b) Evaluate

in

out

V

VifR1 = R2. Explain the result.

11

1

V

V

in

out

If R1=R2, the top op amp has a gain of1. This is similar to connecting VX to the +input of the bottom op amp, i.e., positive feedback. VX will be pinned near the +ve orve power supply, so will Vout.

Vx


6/15

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4) Design an Op-Amp circuit that functions as a 4-bit Digital-to-Analog converter. (12%)Inputs : 4 digital bit D3, D2, D1 and D0 : logic 1 = 1V, logic 0 = 0V

Conversion from binary to decimal :0

01

12

23

3 2D2D2D2D Scale the output such that when D3 D2 D1 D0 = 1 1 1 1, Vout = 10V

when D3 D2 D1 D0 = 0 0 0 0, Vout = 0V

?D0

D1

D2

D3

Vout

a) Derive Vout as a function ofD3 , D2 , D1 and D0 .

Vout = S (0

01

12

23

3 2D2D2D2D )

10V = S (0123 21212121 ) = 15S

S =3

2

Vout = )DD2D4D8(3

20123 = 0123 D

3

2D

3

4D

3

8D

3

16

b) Sketch the circuit schematic. Use as many op amps as you may need, but ONLY 1K

and 10K resistors. For the op amp, assume VCC = 15V, VEE = -15V.

Following is a possible circuit :

-

+

-

+

VXVout

1K

1K

1/4 K (4 1k in parallel)

1/2 K (2 1k in parallel)

2 K (2 1k in series)

1k

1k 1/3 K (3 1k in parallel)

D3

D2

D1

D0


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5) v(t) (in volt) = 10 + 5 cos(105

t) (14%)

a) Find iC(t).

10mH

+v

10nF

1K 2K

iCiL

i

ZR-C = R + 1/jC

iC = v / ZR-C = v / (R + 1/jRC)

v(=0) = 10ViC(=0) = v / (R + 1/j0C) = 10 / (1K + j) = 0

v(=105) = 5 cos(10

5t) = 5 0

o= 5 + j0

iC(=105) = v / (R + 1/jC) = 5 / [1K + 1/j(105)(10nF)] = 5/(1K j1K) = 5m / (1 j)

= 5m/(12+12)1/2 tan-1(1/1)]} = 3.55m 45o= 3.55m cos(10

5t 45o)

Total iC(t) = 3.55 cos(105

t 45o) mA

b) Find iL(t).

ZR-L = R + jL

iL = v / ZR-L = v / (R + jL)

v(=0) = 10ViL(=0) = v / (R + j0L) = 10 / (2K + j0) = 5mA

v(=105) = 5 cos(105 t) = 5 0o = 5 + j0

iL(=105

) = v / (R + jL) = 5 / (2K + j(105

)(10mH)] = 5 / (2K + j1K) = 5m / (2 + j)= 5m/(2

2+1

2)1/2

tan-1(1/2)] = 2.24m 26.6o = 2.24m cos(105 t 63.4o)

Total iL(t)= 5mA + 2.24 cos(105

t 26.6o) mA


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c) Find i(t) as a cosine function.

i(t) = iC(t) + iL(t)

i(=0) = iC(=0) + iL(=0) = 0 + 5mA = 5mA

i(=105) = iC(=10

5) + iL(=10

5) = 5m/(1 j) + 5m/(2 + j)

= 5m(1 j)/(1 + 1) + 5m(2 j)/(4 + 1) = (2.5m + 2m) + j(2.5m 1m)= 4.5m + j1.5m = (4.52+1.52)1/2 tan-1(1.5/4.5) = 4.74m o= 4.74m cos(105 t o)

Total i(t) = 5mA + 4.74 cos(105

to) mA

d) Find RMS value ofv(t)

5.1122

50100

dt)tcos5(T1dt)tcos100(T1dt)10(T1

dt)tcos510(T1dt)t(vT1v

2

T

0

2T

0

T

0

2

T

0

2T

0

22

rms

Vrms = 10.6V


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6) (14%)

a) Determine the transfer function (

in

out

v

vas a function of) for the following circuit.

+

Vin

+

Vout

LR

9R

LjR

RLj

Lj/1R/1

1Z LR

R9)LjR/(RLj

)LjR(LRj

R9Z

Z

v

v

)(H LR

LR

in

out

RLj10R9

RLj

2

R9/L10j1

R9/Lj


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b) Sketch the magnitude |in

out

v

v| in db versus . Identify all critical points and

asymptotes.

Log()

R/L0.1R/L0.01R/L 10R/L 100R/L40db

0db

-40db

20db

-20db

10db

30db

-10db

-30db

9R/L

jL/9R

9R/10L1/(1+ j9R/10L)

9R/10LH()


11/15

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c) Sketch the phase angle

in

out

v

vversus. Identify all critical points and asymptotes.

Log()

R/L0.1R/L0.01R/L 10R/L 100R/L

0o

200o

-200o

-100o

100ojL/9R

1/(1+ j9R/

H()


12/15

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7) (12%)

a) You are given ONE 100-pF capacitor, ONE1-mH inductor, and a whole bunch of100-

and 1-K resistors. Resistor costs 10 cents each, capacitor costs 25 cents each andinductor costs 50 cents each. Design a filter (with minimum cost) to achieve the

following phase anglein

out

v

v

versus angular frequency (

) behavior. Sketch the

circuit and specify all component values.

This is a high-pass filter with -3db = 300,000 .

R-C high-pass filter : -3db = 1/RC ; C = 100pF ;

R = 1/(3X105 X 10-10) = 33.3K (thirty 1-K in series with three 1-K in parallel)Cost = $0.25 + 36 X $0.1 = $3.85

R-L high-pass filter : -3db = R/L ; L = 1mH ;R = 3X105 X 10-3 = 300 (three 100- in series)Cost = $0.50 + 3 X $0.1 = $0.80

vovi

1mH

100 100 100


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b) Sketch the corresponding magnitude |in

out

v

v| (in db) versus angular frequency ()

behavior. Identify all critical points and asymptotes.

300000

20 db/decade


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8) It is useful to implement a logic circuit for voting. (14%)There are three input bits A, B, and C; a control bit D; and an output bit Vote.i. When the control D is 0, the inputs are not established, the output Vote is ignored.ii. When the control D is 1, the output Vote is the logic state of the majority of inputs.

a) Fill in the truth table for this logic circuit.output

A B C D Vote

0 0 0 0 X

1 0 0 0 X

0 1 0 0 X

1 1 0 0 X0 0 1 0 X

1 0 1 0 X

0 1 1 0 X

1 1 1 0 X

0 0 0 1 0

1 0 0 1 0

0 1 0 1 0

1 1 0 1 1

0 0 1 1 0

1 0 1 1 1

0 1 1 1 1

1 1 1 1 1

inputs


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b) Is it more effective (i.e., with the minimum number of gates) to implement Vote withonly NORoronly NAND gates ?.

AB \ CD 0 0 0 1 1 1 1 0

0 0 X 0 0 X

0 1 X 0 1 X1 1 X 1 1 X

1 0 X 0 1 X

Sum of Product: Vote = AB + BC + AC

A

B

BVote

C

A

C

AB \ CD 0 0 0 1 1 1 1 0

0 0 X 0 0 X

0 1 X 0 1 X

1 1 X 1 1 X

1 0 X 0 1 X

____ _ _ _ _ _ _

Product of Sum: Vote = AB + BC + AC____ _ _ _ _ _ _Vote = AB + BC + AC; Vote = (A+B) (B+C) (A+C)

A

B

BVote

CA

C

Both implementations are equally effective, because it should be equally effective tocount the yes votes (SOP), or the no votes (POS).The vote result should be independent of the control bit D.

final solution 09

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