fpga security and cryptographic application generating stream cyphers

FPGA SECURITY AND CRYPTOGRAPHIC

APPLICATION GENERATING STREAM CYPHERS

Shemal ShroffShoaib Bhuria

Yash NaikPeter Hall

OUTLINE Introduction to Security Relevance to FPGA Design and Manufacture flow for an FPGA Things to secure and why? Types of Attack Prevention PUFs

WHAT IS SECURITY (FROM A NETWORKING ASPECT)?

Provisions and policies adopted by a network administrator To prevent and monitor:

Unauthorized access, Misuse, Modification, Denial of a computer network and network-accessible resources.

Simmonds, A; Sandilands, P; van Ekert, L (2004). "An Ontology for Network Security Attacks". Lecture Notes in Computer Science. Lecture Notes in Computer Science 3285: 317–323

HOW IS IT RELEVANT TO AN FPGA?

Research on “FPGA Security” has been active since the early 2000s. Several commercial and military applications employ programmable logic. This makes design security important for safety and national security.

WP365, Solving Today’s Design Security Concerns, Xilinx White Paper.

WHY WOULD SOMEONE ATTACK THE FPGA? To learn the confidential cryptographic key.

One-to-one copy or “cloning” together with its key. Reverse engineering of encryption algorithm. Execute certain cryptographic operation with presumably secret key.

E.g. pay-tv and in-government communications

Thomas Wollinger and Christoff Paar, Security Aspects of FPGAs in Cryptographic Applications in New Algorithms, Architectures and Applications for Reconfigurable Computing, Springer, 2005, Ch. 21, pp 265-278.

Saar Drimer, Volatile FPGA Design Security – A Survey, v0.96, April 2008.

DESIGN AND MANUFACTURE FLOW

Figure: Simplified depiction of the FPGA design, manufacturing, packaging, and testing processes.


DEVELOPMENT, MANUFACTURING AND

DISTRIBUTION OF AN FPGA-BASED SYSTEM

Figure: Development, manufacturing, and distribution of an FPGA-based system.


WEAKEST LINK IN SRAM-BASED DEVICES

B. Dipert. Cunning circuits confound crooks. http://www.e-insite.net/ednmag/contents/images/21df2.pdf, October 12 2000.

THINGS TO SECURE IN FPGA Bitstream Configuration of the device

WHY DO YOU NEED TO SECURE A BITSTREAM?

Bitstream has all the configuration bits required for programming the FPGA. If the bitstream is compromised then your design can be cloned or reverse

engineered.

WHY DO YOU NEED TO SECURE THE

CONFIGURATION OF THE FPGA? To protect the logic of FPGA

To prevent manipulation of design using JTAG. Single Event Upset (SEU) or faults Verify that the application is trusted to be correct. Authenticate the application.

TYPES OF ATTACK

Attacks

Bitstream

Black box Attack

Reverse engineering

Cloning of sRAM FPGAs

Readback Attack

Side Channel Attack

Configuration of the device

Fault injection

Hardware virus

Manipulating design

through JTAG

Voltage modification

Temperature modification

TYPE OF BITSTREAM ATTACKS

1. Black Box Attack2. Reverse-Engineering of the

Bitstreams3. Cloning of sRAM FPGAs4. Readback Attack5. Side Channel Attacks

1. BLACK BOX ATTACK Step 1: The attacker inputs all

possible combinations, while saving the corresponding outputs.

Step 2: Develops a K-map to simplify the resulting tables

Step 3: Extracts the logic of the FPGA.


EXAMPLE

C AB

00 01 11 10

0 0 1 0 01 0 0 0 0

A B C Output (Y)

0 0 0 00 0 1 00 1 0 10 1 1 01 0 0 01 0 1 01 1 0 01 1 1 0

LOGIC CIRCUIT Y = (A.B)’.B.C’ = A’BC’

PREVENTION Not a real threat nowadays, due to:

complexity of the designs size of state-of-the-art FPGAs.

Common I/O pins which makes it difficult to connect to the right pin. An attacker has to connect to device’s pin of a known function like,

Microprocessor interrupt input, And also, Figure out whether to:

Drive a pin with a voltage, Sense its output state, or both isn’t a straightforward exercise.

B. Dipert. Cunning circuits confound crooks. http://www.e-insite.net/ednmag/contents/images/21df2.pdf, October 12 2000.Thomas Wollinger and Christoff Paar, Security Aspects of FPGAs in Cryptographic Applications in New Algorithms, Architectures and Applications for Reconfigurable Computing, Springer, 2005, Ch. 21, pp 265-278.

COMPLEXITY OF THE BLACK BOX ATTACK

We have, in total, input combinations. Lets assume that latency for the adder is 10 ns. Therefore, time to apply all the combinations is x10 ns. This takes approximately 5849 years which is equivalent to 5.849 x hours.

Adder A = 32 bits

B = 32 bits Output

2. REVERSE-ENGINEERING OF BITSTREAMS

Reconstructing the original circuit details Altering the design Incorporating it in other designs

Reverse Engineering



PREVENTION These are the toughest to crack.

Why? Increase in gate counts w.r.t number

of I/O pins Antifuse Encryption PUFs

B. Dipert. Cunning circuits confound crooks. http://www.e-insite.net/ednmag/contents/images/21df2.pdf, October 12 2000.

3. CLONING OF SRAM FPGAS Security implications of storing data unprotected and external to FPGA Non-volatile memory Transmitted during power up Vulnerability = can be easily eavesdropped Feasible


PREVENTION Non-volatile + FPGA on one chip Battery-Backed RAM eFUSE Device DNA Encryption PUFs


DESCRIPTION Battery-Backed RAM

256-bit key stored in volatile on-chip memory cells. Must receive continuous power from the external battery.

eFUSE securely store bitstream decryption key. No BB-RAM and external battery. The OTP eFUSE links are permanently programmed. No need battery backup.

Device DNA Virtex-6 has embedded, unique device identifier (Device DNA). unique 57-bit identifier is nonvolatile and permanently programmed

4. READBACK ATTACK Present in all FPGAs. For easy debugging. Read the configuration of FPGA through JTAG.


PREVENTION A security bit can be used to prevent the readback functionality. Although, fault injection has proven successful to overcome these

countermeasures in FPGA. PUFs

5. SIDE CHANNEL ATTACKS side channel can leak important information. Side channel can be:

power consumption Light Electromagnetic radiation.

Power analysis of bitstream

A. Bogdanov, A. Moradi et. Al, efficient and side-channel resistant authenticated encryption of FPGA Bitstreams, International Conference on Reconfigurable computing and FPGAs, 2012.


5.1 SIMPLE EM ATTACK Magnetic field surrounding FPGA

Loop antenna to pick variations of field

160 bit EC point Multiplication

5.1 SIMPLE EM ATTACK Prior info of Encryption is must

HOW CAN WE FIX THIS ?

5.2 DIFFERENTIAL EM ATTACK

5.3 SIMPLE POWER ANALYSIS

Power trace from an RSA operation Uses standard square and multiply Square and multiply operations have visibly different power profiles ‘1’ relates to squaring step followed by a multiplication step ‘0’ in the exponent involves only a squaring step

5.4 DIFFERENTIAL POWER ANALYSIS

5.5 LIGHT EMISSION AS A SIDE CHANNEL

CMOS transistors emit photons. Electrons gain energy when current flows. Emission energy is much higher for transition 0->1 than 1->0 To observe the light emitted, the chip needs to be opened either from its

backside or front side, depending on its package type. Photons collected by high sensitivity photon sensor. InGaAs detectors have best quantum efficiency.

J.Di. Battista, J. Courrege, B. Rouzeyre, L. Torres and P. Perdu, “When Failure Analysis meets Side-Channel Attacks”, CHES 2010, IACR, Santa Barbara, California, USA.

5.6 LIGHT EMISSION AS A SIDE CHANNEL

First the light emission activity is localized by turning the cryptoprocessor is on/off.

It is not necessary to know either the architecture of the algorithm, or its implementation.

This technique is now less used because of the increasing number of metal layers which act as a light screen.

PREVENTION There are two kinds of countermeasures: Hardware and software Software countermeasures refer to algorithmic changes, such as masking

of secret keys with random values, which are also applicable to implementations in custom hardware or FPGA.

More Complex Algorithms Hardware countermeasures often deal either with some form of power

trace smoothing or with transistor-level changes of the logic. This technique is now less used because of the increasing number of metal

layers which act as a light screen.


CHANGING THE CONFIGURATION OF FPGA Temperature Modification Voltage Modification Fault Injection/Single Event Upsets Hardware Virus Manipulating design through JTAG

TEMPERATURE/VOLTAGE MONITORING AND ALARMS

(DETECTION) Modify operating voltages or temperatures of FPGA. Causes unintended behavior. Can be used to extract data or bypass certain security features.

PREVENTION Monitor and correctly respond to fluctuations in the operating temperature

and voltage. Virtex-6 FPGA System Monitor (SYSMON)

INJECTION OF FAULT’S

INJECTION OF FAULTS

PREVENTION CRC circuitry Zeroization of Device


REST OF THEM Hardware virus or a hardware Trojan Kill switch Manipulating the design through JTAG

PREVENTION Disable write feature in JTAG Don’t download untrusted designs.

WHAT ARE PUFS? Physical entity easy to manufacture but difficult to clone. PUFs implement a challenge-response authentication. Unpredictable response. This is because of the physical factors.

WHY ARE PUFS USED IN CRYPTOGRAPHIC APPLICATIONS?

PUFs generate different outputs for same inputs.

Also, they can generate same outputs for different inputs.

This randomness is due to the Challenge-Response Pairs.

Ideal for cryptographic applications

MAIN TYPES OF PUFS Arbiter PUFs

Based on MUXes and Arbiter Ring Oscillator or RO-PUF

Based on Delay Circuit and Counters

Note: RO PUFs are more suitable for ASICs and FPGAs. Therefore, we will concentrate on it.

RO-PUF Consists of N oscillators circuits. Each Oscillator has a unique

frequency. At any instance two oscillators are

picked by the MUXes. Every counter will counter

number of cycles. Output will be 0 or 1 depending

on counter values.

LIMITATIONS OF RO-PUF Sensitive to temperature

variations Limited number of Outputs Limited number of Challenge

Response Pairs

SOME ATTACKER ALWAYS POPS UP

PUFs used to store memory (sRAMs) are the vulnerable to attacks because, They are not Manufacturer Resistant Nature of Response Controlled

In IEEE HOST 2013, an sRAM PUF was cloned to generate an identical response to a same input.

The attackers used a “Focused Ion Beam Circuit Edit” for the same.

fpga security and cryptographic application generating stream cyphers

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