fundamental of sdh technology

Sampling is the periodical measurement of the value of the analogue signal.

A sampled signal contains all the information if the sampling frequency is at least twice the highest

frequency of the signal to be sampled.

As the analogue signals in telephony are band-limited from 300 to 3400Hz, .To allow the actual slopes of

the filters used a sampling rate of 8 khz is required.After bad limiting with a low-pass filter the analog

signal is sampled and the samples obtained are digitally encoded. The recommended sampling rate by

ITU-T G.711 is 8000samples per second.8 bits that is one byte should be used per sample.The time

taken for one sample is 125 sec.This time of one sample is called one frame.

Conversion of voice into digital signal:1.Voice Frequency 4 KHz

2.Sampling 4 KHz * 2 = 8 KHz

3.Quantizing = Amplitude is given a certain value.

4.Encoding 8 KHz * 8 = 64 KHz

5.Line Coding

Digital data and voice transmission is based on a 2.048Mbit/s consisting of 30 time

division multiplexed (TDM) voice channels, each running at 64Kbps (known as E1 and

described by the CCITT G.702,G.703 specification) and two additional channels carrying

control information. At the E1 level, timing is controlled to an accuracy of 1 in 1011 by

synchronising to a master Caesium clock. Increasing traffic has demanded that more of

these basic E1 are to be multiplexed together to provide increased capacity. So time rates

have increased through 8, 34, and 140Mbit/s. The highest capacity encountered by PDH

fibre optic links is 565Mbit/s, with each link carrying 7,680 base channels.

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PCM 30 MUX consisting of 30 time division multiplexed (TDM) voice channels, each

running at 64Kbps (known as E1 and described by the CCITT G.702,G.703 specification)

and two additional channels carrying control information. 0 & 16 Channel are carrying the

control information. 0 is for frame alingnment signal and 16 is for Non frame alignment

signal. 32 channels /Time slots each of 125 micro seconds.

Each Time slot is divided in to 8 bytes and over all time period of 8 bytes is of 3.9 micro

sec.Each byte is of 488 nsec time period .

In the figure above ,2 extra bytes are placed in time slot 0 and time slot 16 respectively.One byte

inserted in time slot 0 is used for Frame alignment, that is when PCM-30 MUX is de-muxed, this byte is

used again for Frame alignment. The other byte in Time slot 16 is used in the switch.

The signal of PCM-30 Mux is called E1 when it carries switching data and output from digital switches or

transmission equipment within the same station.When the signal is provided to transmission equipment it

is connected to the interface of (PCM-30) in SDH hierarchy.

In a PDH multiplexer individual bits must be running at the same speed otherwise the bits cannot be

interleaved The speed of the higher order side is generated by an internal oscillator in the multiplexer and is

not derived from the primary reference clock

The possible Plesiochronous difference is catered for by using a technique known as Justification

Extra bits are added(stuffed)into the digital tributaries which effectively increases the speed of the tributary

until they are all identical

Jitter Effects:

To measure jitter effects, the incoming signal is regenerated to produce a virtually jitter-free signal, which is used for comparison purposes.

No external reference clock source is required for jitter measurement. The maximum measurable jitter frequency is a function of the bit rate and ranges at 2.488 Gbit/s (STM-

16/OC-48) up to 20 MHz.

The unit of jitter amplitude is the unit interval (UI), where 1 UI corresponds to an error of the width of one bit. Test times on the order of minutes are necessary to accurately

measure jitter.

Jitter:

Periodic or random changes in the phase of the transmission clock referred to the master or

reference clock. In other words, the edges of a digital signal are advanced or retarded in time

when compared with the reference clock or an absolutely regular time framework. Jitter generally

referes to deviations of more than 10Hz.

Wander:

Slow changes in phase (below 10Hz); a special type of jitter.

Interference signals

Impulsive noise or cross talk may cause phase variations (non systematic jitter). Normally high frequency

jitter.

Pattern dependent jitter

Distortion of the signal lead to so-called inter-symbol interference, which is pulse cross talk that varies

with time (Pattern dependent jitter.

Phase noise

The clock regenerators in SDH systems are generally synchronized to a reference clock. Some phase

variations remain, due to thermal noise or drift in the oscillator used.

Delay variation

Changes in the signal delay times in the transmission path lead to corresponding phase variations. These

variations are generally slow (Wander). (e.g. Temperature changes in optical fibers).

Stuffing and wait time jitter

During removing of stuffing bits gaps have to be compensated out by a smoothed clock.

Mapping jitter

see above

Pointer jitter

During incrementing or decrementing of the pointer value. This shifts the payload by 8 or 24 bits corresponding to a

phase hit of 8 or 24 UI.

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Measure of jitter amplitude in Unit Interval [UI].

1UI corresponds to an amplitude of one bit clock period. The unit interval UI is independent of bit rate

and signal coding as it is referred to the length of a clock period. The peak to peak value is expressed in

UIpp.

International standards define upper limits for MTIE and TDEV.

A rough assesment of the tributary wander that may occure can be made by observing the pointer in an

SDH system. If no pointer jumps are seen, this means that no wander occured during the period of

observation. If pointer jumps occure, the wander values can be accessed as follows:

For example, a pointer jump in the AU level at STM-1 corresponds to 3x8 bits at 155 Mbit/s. This means

that the drift is 156 ns referred to the payload of 140 Mbit/s.

Summary of the PDH/SDH multiplex procedure:

Container C-n: (n=1-4)

Basic information structure which forms the synchronous payload. The input data rate is adapted

by fixed stuffing bits. Clock deviations are compensated by a stuffing procedure similar to PDH.

Virtual Container VC-n: (n=1-4)

The virtual container is the information structure with facilities for maintenance and supervising. It

comprises the information (payload) and the POH. Maintenance signals are path related which

spans from end-to-end through the SDH system.

Tributary Unit TU-n: (n=1-3); only for VC-1/2/3

The tributary unit is formed of the virtual container and a pointer to indicate the start of the VC.

The pointer position is fixed.

Triburary Unit Group TUG-n: (n=3,4); only if TU's are available

this is formed by a group of identical TUs for further processing.

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Administration Unit AU-n: (n=3,4)

This element comprises a VC and an AU pointer. The pointer position is fixed within the STM-1 frame.

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A STM-1 signal has a byte-oriented structure with 9 rows and 270 columns. A distinction is made between three

areas:

the payload area, which uses 261 columns

the pointer area

the section overhead, which is splittet up into two parts the Regenerator- and the Multiplex-Section Overhead.

Each byte corresponds to a 64kbit/s channel. The overall bit rate of the STM-1 frame corresponds to 155.520

Mbit/s. The frame repetition time is 125s.

The STM-n frame structure is best represented as a rectangle of 9 x 270 x n.

The 9 x n first columns are the frame header and the rest of the frame is the inner structure data i.e. payload

(including the data, indication bits, stuff bits, pointers and management).

The STM-n frame is usually transmitted over an optical fiber. The frame is transmitted row by row (first is

transmitted the first row then the second and so on). At the beginning of each frame, synchronization bytes A1, A2

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are transmitted .

The multiplexing method of 4 STM-1 streams into a STM-1x4 is an interleaving of the STM-1 streams to produce the STM-4

stream.

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Summary of the PDH/SDH multiplex procedure:

Container C-n: (n=1-4)

Basic information structure which forms the synchronous payload. The input data rate is adapted by

fixed stuffing bits. Clock deviations are compensated by a stuffing procedure similar to PDH.

Virtual Container VC-n: (n=1-4)

The virtual container is the information structure with facilities for maintenance and supervising. It

comprises the information (payload) and the POH. Maintenance signals are path related which spans

from end-to-end through the SDH system.

Tributary Unit TU-n: (n=1-3); only for VC-1/2/3

The tributary unit is formed of the virtual container and a pointer to indicate the start of the VC. The

pointer position is fixed.

Triburary Unit Group TUG-n: (n=3,4); only if TU's are available

this is formed by a group of identical TUs for further processing.

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Administration Unit AU-n: (n=3,4)

This element comprises a VC and an AU pointer. The pointer position is fixed within the STM-1 frame.

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The PDH signals are first adapted to Containers.This process is defined Frame Alignment.

That is from PCM-30 to C-12, 34M toC3 and 140M to C4.In this process several stuffing bytes are

added.

The process from containers to Virtual Containers is defined mapping.

In mapping path POH bytes are added to the containers namely to C-12,V5,J2,N2 and K4 are added to

make VC-12.

To VC-3/ VC-4, J1,B3,C2,G1,F2,H4,F3,K3,and N1 are added.

Virtual Containers consist of POH and payload. These containers located in the third column from the

right are defined

Lower Order Virtual Containers(LOVC)

The higher layer Tributary Unit accomadates lower order Virtual containers regardless of the locations of

the starting byte.

The location of the starting byte is written in the Pointer bytes.This process is defined as pointer

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processing.

When 3 parallel TU-12 are bound up into one TUG-2 this process is defined as multiplexing.

7 TUG-2s are bound up into one TUG-3.

3 TUG-3s are bound up into one VC-4.

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The 32 bytes times 4 frames of PCM-30 signals (total 128 bytes ) are adapted in C12s, it becomes 136 bytes

totally with 2 stuffing bytes added to each frame respectively.The values for Justification control bits illustrated in

the figure below are 000 for C2 and 111 for C1.When the Justification opportunity bits are indicated with Justification bit the corresponding bits is filled with stuffing value, not with a datum.Therefore the current actual

value for S1is not defined.The receiver needs to ignore the content value.S2 is a datum.

However within 500 sec that is in consecutive 4 frames in some reason or other the signal speed of PCM-30

becomes slower and fails to deliver 1024 bits,or 128 bytes and results in 1023 bits.The justification opportunity

bit S2 is filled with stuffing value and C2is filled with 111.The receiver is to ignore the content value for S2.

In case when the signal speed of PCM-30 becomes faster and delivers 1025 bits or 128 bytes plus 1 bit the

justification opportunity bit S1 adapts a datum and C1 is filled with 000.

The summary of the possible combinations of the values C1 and C2 are as follows.

C1 C2

1023 bits delivered within 500 sec 111 111

1024 bits delivered within 500 sec (normal) 111 000

1025 bits delivered within 500 sec 000 000

Majority vote is used to make a justification decision for the protection against single bit errors in C bits when the signal is

demultiplexed .The bits indicated as overhead bits are reserved for future use.

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The four consecutive frames described in the above process is defined as multiframe structure.The

next process from C-12 to VC-12 is defined as Mapping.InMapping 4 different POH bytes are inserted to

the beginning of 4 consecutive frames respectively.Namely V5, J2, N2, K4 are inserted to the beginning

of each frame respectively.which makes up 35 bytes of VC-12.And this multiframe will be repeated in

every 500 sec.The structure of VC-12 results in POH and Information payload.

The VC-12 s are adapted in TU-12s, the method of Alignment is defined to use.The Alignment absorbs

the offset of the frame start for VC-12 and that for TU-12.

A set of four consecutive frames of VC-12s are always adapted in 4 consecutive TU-12s.The start byte

of 4 consecutive frames of VC-12 is V5, whose location is written V1 and V2 bytes in binary numbers as

pointer value.The formats of V1 and V2 are described in the figure.The first 4 bits are allotted for New

Data Flag (NDF), the following 2 bits are allotted for SS bits, and the rest of 10 bits are allotted for

Pointer value.

An indicator whose value defines the frame offset of a Virtual Container with respect to

the frame reference of the transport entity on which it is supported.

In case of TU-12, the pointer value indicate the frame offset of the beginning of the

multiframed VC-12,that is location of V5.

The starting position of the pointer is just after V2 byte with 0, and the position of

maximum pointer value is located in the last byte of the first frame in the multiframe

structure.An actual pointer value will fluctuate between 0 and the specified maximum

value and indicate the corresponding position in the multiframe.

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Objectives: Given a knowledge of SDH Basics, be able to :

Describe signal names and definitions of the multiplexing steps in SDH

Describe the SDH frame structure

Describe the pointer function

Describe the justification principle using the pointer

Terms of multiplexing structure:

1. Container (C-n)1.1 A bandwidth packet to store PDH signals or B-ISDN signals or other services

unknown yet.

2. Virtual container (VC-n)

2.1 A bandwidth packet to store signals with path overhead (POH), that carries information for Path layer administration, and is added to the container.

2.2 VC-4 is named as High Order VC (HOVC) and other VCs are called Low Order VC (LOVC), because always LOVC is carried by HOVC.

2.3 For SONET, VC-3 is HOVC.

3. Concatenated virtual container (VC-4-nc)

3.1 To carry high bandwidth information larger than VC-4 size, multiple VC-4s are combined into a unit.

4. Tributary unit (TU-n)

4.1 TU pointer is added to a LOVC to indicate its phase relation to HOVC, to which it is mapped.

5. Tributary unit group (TUG-n)

5.1 Multiple tributary units of the same type and speed/size are byte interleaved multiplexed into TUG-n.

6. TUG-2 may contain TU-11 or TU-12 or TU-2.

7. TUG-3 may contain multiple TUG-2s or a single TU-3.

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1. Administrative unit (AU-n)

1.1 Phase information between a HOVC and STM-N frame (AU pointer) is added to a HOVC.

AU-4 is VC-4 plus AU pointer.(for SDH)

AU-3 is VC-3 plus AU pointer.(for SONET)

2. Administrative unit group (AUG-n)

2.1 Group of multiple AU-3s or AU-4s or an AU-4-nc.

3. Synchronous transfer module (STM-N)

3.1 Line or NNI(Network Node Interface) signal

3.2 The AUG-ns are housed in the payload to which Regenerator and Multiplex section overhead data are added.

4. Mapping

4.1 Process to put a service into a VC as a first step. Putting LOVCs into a HOVC via TUG is not a mapping but a multiplexing.

5. Aligning

5.1 Pointer processing.

6. Multiplexing

6.1 Process to combine multiple signal into a higher capacity unit using simple byte interleaved multiplexing.

7. ETSI and SONET standard

7.1 Multiplexing route via AU-4 is ETSI standard and used by most countries.

7.2 Route via AU-3 is SONET standard used in North America. Japan also adopts this route.

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1. Multiplexing process is described from a different point of view.

2. Except for special case, usually a PDH signal is not synchronous to a SDH signal. Frequency

adjustment, i.e. justification between PDH and SDH, is necessary and carried out by stuffing

bits (S) in a C-12.

Stuffing bits or bytes other than for the justification are also inserted in order to get neat size

harmonization with other level packets during mapping and multiplexing. This kind of stuffing

bytes are used in every step.

3. The drawing shows multiplex concept. Actual process is not packet level multiplex but byte

interleaved multiplex, i.e. neighbor byte belongs to other packet.

4. In this process, AUG-1 is the same as the AU-4.

1. A STM-1 frame cycle is 125 s and contains 2,430 bytes.

1.1 In the SDH, vertical and horizontal matrixes represent a frame structure.

Vertical matrixes are always nine rows.

1.2 The number of horizontal matrixes depends on the bit rate (from STM-1 to STM-N).

1.3 Transmission order is row by row and left to right.

2. For STM-1, the matrixes are nine rows by 270 columns.

(Segments represent the conventional frame structure.)

3. In this matrix representation, overheads are arranged on the left end.

3.1 The number of overheads is nine rows by nine columns.

3.2 The first to third rows are the Regenerator section overhead data.

3.3 The fourth row is the AU pointer.

3.4 The fifth to ninth rows are the Multiplex section overhead.

4. The remaining portion supports the traffic, referred to as a payload.

1. Byte Interleaved Multiplex

1.1 SOHs of all STM-1s are terminated (as a result they turn into AU-4).

1.2 Phase of AU-4s are aligned and all AU pointers are renewed (detail will be explained later).

1.3 1st byte of 1st AU-4 (A) is put to 1st byte of AUG-n, 1st byte of 2nd AU-4 (B) to 2nd byte of

AUG-n, ......., 1st byte of (n)th AU-4 (N) to (n)th byte of AUG-4.

1.4 2nd byte of 1st AU-4 (A) is put to (n+1)th of AUG-n, 2nd byte of 2nd AU-4 (B) to (n+2)th byte

of AUG-n, ......., 2nd byte of (n)th AU-4 (N) to (2n)th byte of AUG-4

1.5 ...............

1.6 Pointers of AU-4s are also byte interleaved multiplexed into 4th row and 1st to 9th column,

indicated as AU PTRs.

1.7 Insert a new STM-N SOH.

2. STM-n Frame

2.1 Number of row remains 9. Nine rows rule is common to all packet.

2.2 Column number for SOH and AU pointers is 9 x n and columns for payload are 261 x n.

2.3 Frame period is 125 micro seconds.

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1. Multiplexing of LOVC into STM-n takes two steps,

1.1 LOVCs into a HOVC and HOVCs into an STM-N. Pointer is used for the multiplexing.

1.2 Unlike PDH case, no frame alignment signal (FAS) is used, i.e. no FAS in the VC. Example is VC-12 to STM-4, i.e. multiplexing 63 VC-12s into a VC-4 then the VC-4s into a STM-4.

2. Multiplexing of VC-12s into a VC-4

2.1 Phase relation between a TU-12 and the VC-4 is fixed, but between TU-12 and VC-12 it is not fixed. As a result, phase relation between a VC-12 and the VC-4 is not fixed. The first byte of a VC-12 can be placed at any byte of the VC-4, although it must belongs to the TU-12 to which the VC-12 is aligned.

2.2 Also, phase relations between 63 VC-12s are not fixed. The first bytes of 63 VC-12s are scattered in the VC-4 payload at random.

2.3 Those floating phase relation is indicated by TU-12 pointer that carries a pointer offset number of the byte where the VC-12s first byte is placed. TU-12 pointers appear at the fixed area of the VC-4.

3. Multiplexing of VC-3s into a VC-4

3.1 Using TU-3 and by a similar way as above, maximum 3 VC-3s can be multiplexed.

3.2 TU-3 pointers appear at the fixed area that is different from TU-12 pointers.

4. By reading TU pointer value, a desired VC-12 or VC-3 can be accessed quickly and easily.

5. VC-12s and VC-3(s) can be mixed into a VC-4.

6. Multiplexing of VC-4s into a STM-4

6.1 By replacing TU-12 to AU-4, VC-12 to VC-4, VC-4 to STM-4, 63 to 4 and TU pointer to AU pointer, above

explanation can be applied.

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1. Pointer offset number of AU-4

1.1 Three successive bytes of AU-4 payload have same pointer offset number and 0~782 are assigned

(3x782=2349=AU-4 payload size).

1.2 Three bytes just after AU pointer are 0s.

1.3 The first byte of 3 same address is allowed to be the first byte of a VC-4.

1.4 A VC-4 frame spread over two AU-4 frames.

2. Pointer offset number of AU-3

2.1 Repeated numbering is not applied to AU-3 (0~782=AU-3 payload size).

3. This method results in that numbering of byte in STM-N payload is identical regardless of its AU composition (i.e.

ether ETSI or SONET standard).

4. Pointer Structure

4.1 Two bytes (H1 and H2) are combined making 16 bits word.

4.2 The last 10 bits show the pointer offset number where a VC-4 frame starts in the binary system.

4.3 The same 10 bits change to Increment (I) or Decrement (D) bits when a justification between VC-4 and

AU-4 is applied to that frame (SDH~SDH justification). The justification carried out using H3s or 0 address

bytes.

4.4 New Data Flag (NNNN) indicates arbitrary pointer value change due to payload change.

4.5 SS (10) show the signal type is AU-4 or AU-4-Xc or AU-3 or TU-3. (Currently, SS of AU pointer is not used for any purpose.)

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1. A complete set of VC-12 and TU-12 require a multiframe, 4 frames and 125x4=500s, in order to

accommodates POHs and bytes for pointer.

2. V1, V2 and V3 are used in the same way as H1, H2 and H3 of AU-4 pointer. V4 is not defined.

3. The offset numbers are 0~139 and start right after V2. Different from AU-4, succeeding bit has

different number.

4. Justification between VC-12 and TU-12 is done using V3 and the byte after V3.

1. When AU-4s (VC-4s) from different STM-N lines are transferred to a new STM-N at a add-drop

or cross-connection station, their arriving phases are different.

2. For the transfer, the phases of AU-4s must be aligned, giving them delay of 0.5 frame period

in average.

3. If the same delay is applied to VC-4 also, by the repetition of mux./demux., which is quite

common in the SDH network, accumulation of delay will be enormous. This must be avoided to

maintain good transmission quality.

4. Without giving the delay to VC-4, its new phase relation to the new AU-4 is set to the AU-4

pointer.

5. Position of gaps in VC-4 for insertion of SOH must be changed, and this requires buffer and

some delay will be induced. But it is very small comparing to 0.5 frame time.

6. Thus, minimization of accumulated delay is realized by the pointer renewal.

1. Since SDH is a synchronous system, justification (synchronization) between SDH signals is generally not required.

2. Cases in which justification is required for the SDH:

2.1 Interconnection of networks where independent Primary Reference Clocks (PRC) are used. This occurs

for a connection between different countries or different network operators.

2.2 Some stations become asynchronous, i.e. go into an internal clock, by a loss of reference signal, e.g. a line

failure.

3. In those cases, an STM-n (or HOVC) frame must carry VC-4(s) (or LOVCs) that are generated by using different

(asynchronous) clock. Then the justification between SDH signals is necessary.

4. STM-N (AU-4) ~ VC-4 (for ETSI)

4.1 Justification is done by using H3 bytes (3 bytes) for expanded payload capacity (Negative Justification) and

excluding 0 address bytes (3 bytes) for reduced payload capacity (Positive Justification) every several frames.

Justification interval and positive/negative selection is determined by the clock frequency difference.

5. HOVC=VC-4 (TU-3) ~ LOVC(VC-3) (for ETSI)

5.1 Justification is carried out using H3 byte (1 byte) and 0 address byte (1 byte) of the TU-3 in the same way.

6. HOVC=VC-4 (TU-n) ~ LOVC(VC-n ), n=11or 12 or 2 (for ETSI)

6.1 Justification is carried out using V3 byte (1 byte) and 0 address byte (1 byte) of the TU-n in the same way.

7. Justification information is carried by using a pointer as the increment (I) or decrement (D) bits depending on whether it

is positive or negative justification.

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1. This figure depicts positive justification of AU-4.

2. When the bit rate of VC-4 is lower than that of STM-N : (to be

precise [VC-4] x 270 / 261 < [STM-N] / N)

2.1 Positive justification is applied, i.e.when an underflow of data is detected, the payload

size of the corresponding frame is reduced by excluding 0 address bytes from a part of

payload.

2.2 The receiving station is instructed to neglect the bytes by the polarity change of I bits of

the frame.

2.3 Following frames go back to normal payload size and pointer value is increased by one

until the next underflow detection.

3. Up to 2 bits error in I bits can be corrected by the majority rule at the receiving side.

1. This drawing shows negative justification.

2. When the bit rate of VC-4 is higher than that of STM-N : (to be

precise [VC-4] x 270 / 261 > [STM-N ] / N)

2.1 Negative justification is applied, i.e.when an overflow of data is detected the payload

size of the corresponding frame is expanded by using H3 bytes as a part of payload.

2.2 The receiving station is instructed to adopt the H3s as information bytes by the polarity

change of D bits of the frame.

2.3 Following frames go back to normal payload size and pointer value is decreased by one

until the next overflow detection.

3. Up to 2 bits error in D bits can be corrected by the majority rule at the receiving side.

Objectives: Given a knowledge of SDH Basic, be able to :

Layout and describe the purposes of RSOH, MSOH, and POH

Describe mapping of tributary signals to NNI

1. Section overheads (SOHs) of STM-1 are depicted by the shaded parts in the above drawing.

1.1 Regenerator SOH (RSOH), 3 rows by 9 columns, can be accessed at terminating points of a

regenerator section (RS), at both regenerators and multiplexers.

1.2 Multiplex SOH (MSOH),5 rows by 9 columns, , can be accessed at multiplex section (MS)

terminating points, i.e.at multiplexers only. It passes through regenerators transparently.

1.3 Information carried by RSOH and MSOH is mainly used for administration of RS and MS

layer,respectively .

2. Marked bytes are already defined. Unmarked bytes are reserved for future use.

3. bytes are defined as Media-dependent. If necessary. (For SDH radio it is defined in ITU-R F.750)

4. Bytes marked are assigned for national use. Each country can define their function differently but the

definition is valid within the country, not international.

5. Column number of STM-N is 9 x n and same byte assignment is applied but byte number of A1, A2, B2,

and are increased accordingly.

6. For STM-16, 64 and 256, using some of unmarked bytes FEC (Forward Error Correction) is implemented.

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1. A1, A2 : Frame Alignment Signal (FAS)

1.1 A1: 11110110 A2: 00101000

1.2 A receiver finds the STM-N frame by detecting fixed A1....A2 .... pattern which appears periodically at

125s interval. (Remember VC-n does not have any FAS, its frame is found by using pointer.)

2. J0 : Regenerator Section Trace

2.1 For verification of Regenerator Section connection

2.2 A transmitter can set an identifier (name) to STM-N signal, maximum 15 characters using J0, and a

receiver compares the received ID (J0 value) to the expected J0 value, which is preset in the receiver,

to verify the connection.

2.3 To carry 15 characters 16 multiframe is formed, the first J0 for FAS and error detection and 15 J0s

for ID.

2.4 (Early recommendation defined this byte as C1 (STM identifier) that shows the unique order number

of STM-1s in STM-N to assist demultiplexing process.)

3. B1, B2 : Error Monitoring

3.1 BIP-X (Bit Interleaved Parity-X) detects error occurrence.

3.2 B1: For Regenerator Section error detection by BIP-8.

B2: For Multiplex Section error detection by BIP-24N (N; STM level). Detail of BIP-X will be explained latter.

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1. E1, E2 : Engineering Orderwire

One byte in STM-n frame makes a 64 kb/s data channel. Digitized (PCM) voice of an engineering orderwire is carried by E1 and/or E2.

1.1 E1 can be accessed from both multiplexer and regenerators.

1.2 E2 can be accessed only from the multiplexer.

2. F1 : User ChannelA network operator can use the F1 user channel (64 kb/s clear channel) for its own purpose.

3. D1-3, D4-12 : Data Communication Channels (DCC)Both D1-3 (192 kb/s) of the RSOH and D4-12 (576 kb/s) of the MSOH are used for data communication channels.

3.1 They are often called DCCr and DCCm, r and m means RS and MS. DCCr is recommended for OAMP information transmission (NMS connection).

3.2 DCCm is a kind of an user accessible channel and its purpose is not limited to NMS connection.

4. K1, K2 : Automatic Protection Switching (APS) Signaling

4.1 Used to exchange control information among nodes in an MS-SP Ring (BLSR) and a line-protection linear systems.

4.2 Some bits in K2 are used as a Multiplex Section Remote Defect Indication (MS-RDI) that indicates detection of defect in the receiving section or reception of MS-AIS.

5. S1 : Synchronization Status

5.1 S1 shows the quality level of the clock source that generated the STM-n frame.

5.2 It is used to control network synchronization, i.e. for selection of a reference clock source.

6. M1 : Multiplex Section Remote Error Indication (MS-REI)

6.1 M1 is used to report a result of error detection by B2, by number of BIP violation = error count, back to the transmission source.

6.2 For STM-64 and 256 two bytes (M0 and M1) are assigned.

2. Z1, Z2 : (Spare Bytes) STM-N (N>4) has additional spare bytes (Z0).

49

1. Section Trace Method

1.1 In the Figure above, J0 bytes is assigned for Section Trace byte.

1.2 Those parameter applies to Section carrying a section trace (or Section Access Pointer Identifier

SAPI )

1.3 The sending SAPI in TX side is compared to a expected SAPI in RX side. If the Section Traces do

not match,

At Node a Path Trace expected value is : ABCDEGF

Received value is : ABCDEFG

1.4 AIS and RDI will be generated and AIS is transmitted downstream, while RDI is transmitted to

opposite NE.

2. Path Trace Method

2.1 In the Figure above , J1 or J2 bytes is assigned for path Trace byte.

2.2 Those parameter applies to VC-4, VC-3 and VC-12 signals, each carrying a path trance(or Access

Pointer Identifier API )

2.3 The sending API in TX side is compared to expected API in RX side.

2.4 If the path traces do not match,

At Node A Path Trace expected value is : ABCDEGF

Received value is : ABCDEFG

2.5 AIS and RDI will be generated and AIS is transmitted downstream, while RDI is transmitted to opposite NE.

50

1. Section Trace (J0)

1.1 J0 Section Trace is used for checking the optical fiber or the cable connection between the

Nodes that terminate Regenerator section.

1.2 At RST block of each station, setting of J0 sending at TX side value and J0 expected value at

RX side is necessary.

1.3 Set Send value to a=abc at Node A and Expected value to b=abc at Node B.

1.4 At Node B, received value a=abc and expected value b=abc are checked to see that they match. If they are much (a=b), all received data are outputted into downstream.

1.5 If not(a=abc, b=acb), J0 TIM (Trace Indicator Mismatch) Alarm is reported and all 1 data (AIS) output downstream.

1.6 In line protection configured Figure above, set a different value with normal line and protection

line. If misconnection of optical fiber occurs, J0 TIM Alarm will reported, and checking of

optical fiber connection can be done.

1. BIP-X (Bit Interleaved Parity-X), X=8 for above example BIP-8

2. An error detection block is divided in to small sub-blocks with N bits. (For SDH, the block corresponds

to STM-N or VC-n frame.)

3. Kth bits of all sub-blocks in the block are checked in sequence (K1,K2, ,Ki, , Kn) and number of 1 is counted. When the counting result is even, the Kth bit of the designated sub-block in

the following block is set to 0, for counting result of odd to 1. This process is called even parity.

(For SDH, the designated sub-block is B1 or B2s or B3 )

4. The same procedure is applied to all of X bits in sub-block in parallel.

5. At the receiver, same check is done to the received signal and the result is compared to the indication

of the designated sub-block received. Inconsistency means error detection.

6. Multiple errors in a sequence (K1,K2, ,Ki, , Kn) result in no error or only one error for even and odd errors respectively. But the length of sequence is short enough to avoid such inconvenience

under practical error rate and almost always the result is correct.

1. Computing area of B1 BIP is entire bits of STM-N frame.

2. But B2 BIP excludes RSOH area. Bytes in RSOH might be accessesed by regenerators and changed.

If RSOH is included, those changes are recognized as errors by B2.

3. Relationship with the scrambling function

3.1 Calculate the parity of B1 after scrambling.

3.2 Calculate the parity of B2 before scrambling.

(Since scrambling function belongs to the Multiplex section, not to Regenerator section, it is

included to the B2 monitoring but excluded from B1.)

Path Overhead Function(POH)

1. J1 : Path Trace

ID can be set to a VC and same function as J0 of RSOH is realized for a path. It is used for verification of a path connection.

2. B3 : Error Monitoring (BIP-8)End-to-end path error monitoring

3. C2 : Signal LabelShows the type of a service in a VC payload.

4. G1 : Path StatusUsed to report the receiving status of a path back to the sending side.REI and RDI

5. F2, F3 : Path User ChannelsAlong with a service transmission, two 64 kb/s clear channels are provided to the path.

Path user or network operator can use them for their own purpose.

6. H4 : Position IndicatorThis byte provides

6.1 A mutliframe and sequence indicator for VC3/4 concatenation.

6.2 A generalized position indicator (e.q. mutliframe indicator for VC-11, VC-2)

6.3 Different purpose for other payload type.

7. K3 : Automatic Protection Switching (APS) ChannelFor automatic switching control of VC-3 or VC-4 path

8. N1 : Network Operator ByteFor tandem connection maintenance (see next page)

54

H4 Position Indicator

1. The H4 byte provides a generalized multi-frame indicator for payload.

2. Four consecutive frame (125s x 4 = 500s) are required to make complete TU-12 (VC-12) and it is

necessary to identify the first frame for correct recovery of the information. The H4 byte is used for

this purpose in VC-4 train.

3. The 7th and 8th bits in H4 byte is used and indicates the type as TU-12 multiframe indicator (V1, V2,

V3 and V4)

4. And other bits in H4 byte is set to 1 in the interim.

Path Trace (J1, J2)

1. J1, J2 Path Trace is used for detecting misconnections between the Nodes that terminate those

paths.

2. For establishing the path from LPT block of Node A to that of Node C, set J1 Send value of LPT

block of Node A to a=abc and J1 Expected value of LPT block of Node C to b=abc (setting value : a=b=abc as original value different from other path )

3. At Node C, received J1 value and expected value b=abc are checked to see that they match.

4. If not(a=abc, b=acb), J1 TIM Alarm is reported and all 1 data output downstream of Node C..

5. Therefore, when J1 send value (a=abc) and expected value (b=abc) are set correctly, path at each

Node can be set correctly and J1 TIM Alarm will not be reported .

6. If there is a wrong path( a=abc, b=acb), J1 TIM Alarm will be reported, and checking of path can be

done.

1. The Tandem Connection (TC) is one of the network administration layers (Path, TC, MS and RS). It is

an optional layer and to use it or not is left to operators discretion.

2. TCs can be defined to any part of a path by a network operator. It is possible to set multiple TC to a

path, if they have no overlap.

3. The network operator can monitor the error performance of the TC, i.e. a defined portion of a path, by

using the Network Operator Byte (N1) of POH.

4. It is possible to detect error occurrence between the path starting point and the TC starting point by

monitoring B3 (or V5 for LOVC) at the TC starting point. In the same way detection of errors between

the path starting point and the TC ending point is possible. And their difference shows errors occurred

in the TC.

5. The B3 monitoring result at the TC starting point is reported to the TC end by using a half of N1 byte.

The TC end calculates the errors of TC by subtracting this value from its monitoring result of B3.

6. The second half of the N1 byte is used for a data communication channel between both ends of the

TC.

1. The LOPOH consist of four bytes (V5, J2, N2 and K4) and four multi-frame (500s) is used to

accommodate them in order to avoid unnecessary bit rate increase.

2. The V5 byte is divided into 5 functions.

3. Functions of LOPOH are identical to HOPOH except that it does not have path user channel.

4. REI is only used by a VC-11 byte synchronous path. It is used when a failure is declared. It is

undefined for VC-12 and VC-2.

1. The Table of The (Section) path access pointer Identifier [(S)PAI] is shown in above.

2. (S)PAI is used free a 16 bytes E.164 format as shown on the Table above.

3. 15 bytes are used for the transport of the 15 ASCII characters required for the E.164 numbering

format.

4. ASCII: American Standard Code for information interchange.

1. A remote station alarm is a report of signal receiving status back to the transmission source.

2. Maintenance signals of SDH system consist of AIS, RDI and REI.

3. AIS (Alarm Indication Signal)

3.1 Reports signal failure in the upper stream of the signal flow to the down stream, indicating

you are receiving defective signal but its not your fault. It is generated when LOF (Loss of

framing), LOS (Loss of signal), LOP (Loss of pointer), AIS, EBER (Excessive bit error,

optional), etc. are detected.

4. RDI (Remote Defect Indication)

4.1 Reports detection of received signal failure to the transmitting side, under the same condition

as AIS.

5. REI (Remote Error Indication)

5.1 Reports error count detected by BIP-X to the transmitting side (for LOVC, only error presence).

6. RFI (Remote Failure Indication)

6.1 reports declaration of failure (persistence of failure beyond threshold) to the transmission side. This is defined

only for VC-11.

60

1. Asynchronous 2,048 kb/s signal

1.1 Frequency justification between PDH and SDH is necessary. In most of VC-12 frame normal

payload space (32 bytes/125s) is used, for faster 2M, additional space (S1 bit) is used in a frame where data overflow is detected (32 bytes + 1 bit) and for slower 2M, S2 bit is eliminated

from the payload space of a frame where underflow is detected (32 bytes - 1 bit). Usage of S1

and S2 are shown by C1 and C2 bits respectively.

1.2 Position of the 2M frame in the VC-12 is not fixed and it is found by using 2Ms FAS. No

visibility of 64 kb/s channels in 2M.

2. Bit synchronous 2,048 kb/s signal

2.1 No frequency justification is required. Always S2 bit is used and S1 bit is not used. To indicate

this status C2 and C1 are always set to 1 and 0 automatically.

2.2 Same equipment can handle both asynchronous and bit synchronous 2M without any

modification. So the latest G.707 considers this mapping as a part of the asynch. 2M.

3. Byte synchronous 2,048 kb/s signal

3.1 Location of 64 kb/s channels of 2M in VC-12 is allocated, thus visibility of channels in SDH signal is

implemented.

61

1. Mapping the asynchronous 34,368 kb/s signal into VC-3.

2. VC-3 frame is divided into three subframes and same mapping structure is applied to all of them.

3. Justification bits (S1, S2)

4. Each justification control bit (C1, C2) consists of five bits and error correction by majority rule is

implemented.

5. As the size of VC-3 is common to 34M and 45M, for 34M mapping many stuffing bytes are inserted to

fill up the data size gap.

1. Mapping the asynchronous 139,264 kb/s signal into VC-4.

2. VC-4 frame is divided into nine sub frames, which correspond to nine rows. Same mapping structure

is applied to all of them.

3. Negative justification is enabled for each sub frame.

4. Justification bit (S)

5. The justification control bit (C) have five parallel bits.

6. No positive justification is employed.

1. An ATM cell has a fixed length of 53 bytes (5 header bytes + 48 information bytes).

2. ATM cells are mapped into the payload of VC with its byte boundaries aligned to the VC-4 byte

boundaries.

3. Since the capacity (2,340 bytes) of the VC-4 payload is not an integer multiple of a cell length, the

last cell mapped to the payload may cross a VC-4 frame boundary.

4. ATM cell mapping to other size VCs is also defined in the same way.

1. This figure shows seven multiplexing steps from VC-12 to STM-1.

2. Byte interleave multiplexing is performed in each step.

3. When TUG-3 carries TUG-2s, i.e. VC-12s, the bytes at the first to the third rows of the first column

becomes NPI (Null Pointer Indication).

When it carries TU-3, i.e. VC-3, they are TU-3 pointer location. By checking if they are valid value for TU-3

pointer or not, a receiver can decide the TUG-3 is carrying TU-3 (VC-3) or TU-12s (VC-12s).

4. The drawing also shows that all TU-12 pointers are gathered at the fixed (but different from TU-3 pointers)

location of a VC-4. This means that without going through step-by-step procedure tributary signals can be

accessed directly and easily.

Note : Word NPI was used by early recommendation but vanished recently.

65

1. Figure above shows how virtual containers of VC-12 are byte inter-leave multiplexed into a VC-4.

2. Transmission of complete VC-12 requires a four consecutive frame called into multiframe structure

(125s x 4 = 500s). Four 35-byte-subunits of the VC-12 (35x4=140bytes/ 500s), a one step gap is

introduced to each subunit to permit insertion of TU-12 pointer bytes.

3. The phase relationship between the VC-12 and the TU-12 is not fixed and the first byte of the VC-12

(V5) is indicated by the (V1 and V2) pointer value.

4. The first VC-4 frame of the 500s multiframe that carries the first TU-12 subunit (V1 byte) is shown

by the VC-4 POHs H4 byte.

1. The drawing shows multiplex procedure of VC-3 (34M) to STM-1.

2. All TU-3 pointers are gathered at the fixed (but different from TU-12 pointers) location of a VC-4.

3. You will find that TU-3 pointer location corresponds to NPI position of the last drawing.

4. When the receiver detect the valid pointer value, it can decide corresponding TU-3 is carrying VC-

3(34Mb/s) . Otherwise (i.e. NPI), it is carrying VC-12 (2Mb/s).

1. For the stable timing extraction at a receiver, line signals must have sufficient and uniform data

transition, avoiding long sequence of 1 and 0. To meet this requirement, scrambling is applied to

the STM-N line signal and statistically long sequence of 1 and 0 is suppressed.

2. The scrambler is a frame synchronous type with sequence length of 127 (27-1) and the PN pulse

generator restart at every STM-N frame. The scrambling is not applied to the first row of RSOH.

3. Also the scrambler keeps the mark density of line signal nearly 50%. This ensures stability of laser

diode output level.

1. This block diagram shows the major steps of demapping/demultiplexing an STM-1 signal into 63x C-

12. For example, STM-1AUGAU-4VC-4TUG-3TUG-2TU-12VC-12C-122.084Mbit/s .

1.1 At the receiving side the A1, A2synchronization byte (pattern) is detected in line signal to identify the start of the STM-1 frame.

1 .2 RSOH and MSOH in STM-1 frame are terminated and VC-4 is extracted by the AU-4 pointers location address.

1.3 From the VC-4 frame, 3 x TUG-3s are demultiplexed and demapped. From each TUG-3 frame,

7 x TUG-2s are demultiplexed and demapped From each TUG-2 frame, 3 x TU-12s are

demultiplexed and demapped

1.4 From each TU-12 pointer values of V1 and V2 specify, the starting point of V5, the first byte of

the VC-12.

1.5 From the VC-12, the C-12 is extracted of the V5, J2, N2 and K4 bytes are terminated.

1.6 From C-12, the 2.048Mbit/s PDH information is extracted after removing the stuffing bits..

1. Two methods for concatenation are defined: contiguous and virtual concatenation.

2. Both methods provide concatenated bandwidth of X times Container-N at the path termination. The

difference is the transport between the path termination.

3. Contiguous concatenation maintains the contiguous bandwidth through out the whole transport, and

requires concatenation functionality at each network element.

4. While virtual concatenation breaks the contiguous bandwidth into individual VCs, transports the

individual VCs and recombines these VCs to a contiguous bandwidth at the end point of the

transmission, and. virtual concatenation requires concatenation functionality only at the path

termination equipment

5. Figure above AU-4-4c is passed through a Node B lower order STM-1s. In this case, the AU-4-4c is split up in four VC-4 s, and each VC-4 is switched independently using virtual concatenation.

If the input signal is greater the specify the container, the VC concatenation is used.

Virtual Container

Total of byte

35

765

2349

2.240

48.960

150.336

34

756

2340

PDH bit rate(Mbit/s)

2.176

48.384

149.760

Level

1

3

4

Bit rate (Mbit/s) Total of byte Bit rate (Mbit/s)

Container

2.048

34.368

139.264

1. There are two types of SDH concatenated signal . There are contiguous concatenation and virtual

concatenation.

2. It is known that an AU-4 is designed to carry a C-4 container that has a capacity of 149.76Mbit/s. If

there are services that required a capacity greater than 149.76Mbit/s. one needs a data to transport

the payload of these services. AU-4-Xc is designed for this purpose.

1. AU-4 has a nine-byte pointer. These nine bytes is shown Figure above.

2. An AU-4 Xc signal has 9X bytes of AU-4 pointer. AU-4-X signal , there X sets of nine-byte pointers,

(H1, H2).

3. The first nine AU-4 pointer has its normal function. The seconds, third and Xth AU-4 pointers are used as the concatenation indications as shown in Figure c.

Virtual concatenation of X VC-3/4s (VC-3/4-Xv, X = 1 ... 256)

1. A VC-3/4-Xv provides a contiguous payload area of X Container-3/4 (VC-3/4-Xc) with a payload capacity

is following equation .

1.1VC-3-Xv capacity = X x 48.384(84 bytes x 9rows x 64 kbit/s)Mbit/s

1.2VC-4-Xv capacity = X x 149. 760 (260bytes x 9rows x64 kbit/s)Mbit/s

2. The container is mapped in X individual VC-3/4s which form the VC-3/4-Xv.. The H4 POH byte is used for

the virtual concatenation specific sequence and multiframe indication

3. Each VC-3/4 of the VC-3/4-Xv is transported individually through the network. Due to different propagation

delay of the VC-3/4s, a differential delay will occur between the individual VC-3/4s. This differential delay

has to be compensated and the individual VC-3/4s have to be realigned for access to the contiguous

payload area. The realignment process has to cover at least a differential delay of 125 s.

1. A two-stage 512 ms multiframe is introduced to cover differential delays of 125 ms and above (up to

256 ms). The first stage uses H4, bits 5-8 for the 4-bit multiframe indicator (MFI1). MFI1 is

incremented every basic frame and counts from 0 to 15. For the 8-bit multiframe indicator of the

second stage (MFI2), H4, bits 1-4 in frame 0 (MFI2 bits 1-4) and 1 (MFI2 bits 5-8) of the first

multiframe are used

1. The sequence indicator SQ identifies the sequence/order in which the individual VC-3/4s of the

VC?3/4-Xv are combined to form the contiguous container VC-3/4-Xc as shown in Figure above.

2. Each VC-3/4 of a VC-3/4-Xv has a fixed unique sequence number in the range of 0 to (X-1). The VC-

3/4 transporting the first time slot of the VC-3/4-Xc has the sequence number 0, the VC-3/4

transporting the second time slot the sequence number 1 and so on up to the VC-3/4 transporting

time slot X of the VC-3/4-Xc with the sequence number (X-1).

3. For applications requiring fixed bandwidth the sequence number is fixed assigned and not

configurable. This allows the constitution of the VC-3/4-Xv to be checked without using the trace.

4. The 8-bit sequence number (which supports values of X up to 256) is transported in bits 1 to 4 of the

H4 bytes, using frame 14 (SQ bits 1-4) and 15 (SQ bits 5-8) of the first multiframe stage as shown in

Table 11-1.

Concatenation of X VC-12

1. A VC-12-Xv provides a payload area of X Container-12 as shown in Figures above. The container is

mapped in X individual VC-12 which form the VC-12. Each VC12 has its own POH.

2. Each VC-12 of the VC-12-Xv is transported individually through the network. Due to this a differential

delay will occur between the individual VC-12s and therefore the order and the alignment of the VC-

12s will change. At the termination the individual VC-12s have to be rearranged and realigned in

order to re-establish the contiguous concatenated container. The realignment process has to cover at

least a differential delay of 125 s.

1. Payload capacities are shown in Table above for VC-12Xv.

Automatic Protection Switching

These bits are allocated for APS Signalling for protection at the lower order path level.

Bit 5 to 7 of K4 are reserved for an optional use.In this Option these bits shall be set to 000 or 111 a receiver is required to be able to ignore the contents of these bits.

If 000 means no remote defect

001 means no remote defect

011 means no remote defect

010 Remote payload defect

100 Remote Defect

79

1. The VC-12 virtual concatenation frame count is contained in bits 1 to 5. The VC-12 virtual

concatenation sequence indicator is contained in bits 6 to 11. The remaining 21 bits are reserved for

future standardization, should be set to all "0"s and should be ignored by the receiver.

2. The VC-12 virtual concatenation frame count provides a measure of the differential delay up to 512

ms in 32 steps of 16 ms that is the length of the multiframe (32 x16 ms = 512 ms).

3. The VC-12 virtual concatenation sequence indicator identifies the sequence/order in which the

individual VC-12s of the VC-12-Xv are combined to form the contiguous container VC-12-Xc as

shown in Figures

4. Each VC-12 of a VC-12-Xv has a fixed unique sequence number in the range of 0 to (X-1). The VC-

12 transporting the first time slot of the VC-12-Xc has the sequence number 0, the VC-1/2

transporting the second time slot the sequence number 1 and so on up to the VC-12 transporting time

slot X of the VC-12-Xc with the sequence number (X-1). For applications requiring fixed bandwidth

the sequence number is fixed assigned and not configurable. This allows the constitution of the VC-

12-Xv to be checked without using the trace.

The overall capacity of the SOH is 4.608 Mbit/s (9x8x64kbit/s), of which 30 bytes (1.920 Mbit/s) have

fixed definitions. The remaining 64kbit/s channels are not specified. Six are reserved for national use.

Although six bytes are reserved for medium dependent functions (e.g. radio link systems). The columns

1,4 and 7 corresponds also to the STS-1 frame.

A number of functions are defined in the overhead channels to ensure proper transport of the payload.

The Section Overhead (SOH)

The overall capacity of the SOH is 4.608 Mbit/s (9x8x64kbit/s), of which 30 bytes (1.920 Mbit/s)

have fixed definitions. The remaining 64kbit/s channels are not specified. Six are reserved for

national use. Although six bytes are reserved for medium dependent functions (e.g. radio link

systems). The columns 1,4 and 7 corresponds also to the STS-1 frame.

Functions of the SOH:

Contains maintenance, monitoring and operational functions

Each byte refers to a 64kbit/s channel

Splitted into RSOH and MSOH

Protect the connection from point of STM-1 assembly to point of disassembly.

The Path Overhead (POH)

The POH of VC-4/VC-3 consists of 9 bytes and the POH of the VC-11/VC-12 and VC-2 consists

of 4 bytes.

The RSOH is reformed (terminated) by each regenerator. Each regenerator section passes the MSOH

transparently.

1. Section overheads (SOHs) of STM-1 are depicted by the shaded parts in the above drawing.

1.1 Regenerator SOH (RSOH), 3 rows by 9 columns, can be accessed at terminating points of a

regenerator section (RS), at both regenerators and multiplexers.

1.2 Multiplex SOH (MSOH),5 rows by 9 columns, , can be accessed at multiplex section (MS)

terminating points, i.e.at multiplexers only. It passes through regenerators transparently.

1.3 Information carried by RSOH and MSOH is mainly used for administration of RS and MS

layer,respectively .

2. Marked bytes are already defined. Unmarked bytes are reserved for future use.

3. bytes are defined as Media-dependent. If necessary. (For SDH radio it is defined in ITU-R F.750)

4. Bytes marked are assigned for national use. Each country can define their function differently but the

definition is valid within the country, not international.

5. Column number of STM-N is 9 x n and same byte assignment is applied but byte number of A1, A2, B2,

and are increased accordingly.

6. For STM-16, 64 and 256, using some of unmarked bytes FEC (Forward Error Correction) is

implemented.

83

The MSOH is reformed (terminated) by each multiplexer and cross connect . A1, A2 : Frame Alignment

Signal (FAS)

1.1 A1: 11110110 A2: 00101000

1.2 A receiver finds the STM-N frame by detecting fixed A1....A2 .... pattern which appears

periodically at 125s interval. (Remember VC-n does not have any FAS, its frame is found by

using pointer.)

J0 : Regenerator Section Trace

2.1 For verification of Regenerator Section connection

2.2 A transmitter can set an identifier (name) to STM-N signal, maximum 15 characters using J0, and

a receiver compares the received ID (J0 value) to the expected J0 value, which is preset in the

receiver, to verify the connection.

2.3 To carry 15 characters 16 multiframe is formed, the first J0 for FAS and error detection and 15 J0s

for ID.

2.4 (Early recommendation defined this byte as C1 (STM identifier) that shows the unique order

number of STM-1s in STM-N to assist demultiplexing process.)

B1, B2 : Error Monitoring

3.1 BIP-X (Bit Interleaved Parity-X) detects error occurrence.

3.2 B1: For Regenerator Section error detection by BIP-8.

B2: For Multiplex Section error detection by BIP-24N (N; STM level). Detail of BIP-X will be explained latter.

84

The Path Overhead is evaluated at the end point of the transmission system where the unpacking takes place.

The SDH system monitors transmission quality using a method called

Bit Interleaved Parity (BIP).

A number of BIP types are used in SDH:

BIP-24 for B2 bytes is formed for every STM-1 frame w.o. RSOH.

BIP-8 for B1 byte for STM-N frame after scrambling and

for B3 byte for the VC-3 and VC-4.

BIP-2 for the V5 byte for VC-11, VC-12 and VC-2.

The Pointer indicates the phase shift of the first VC byte (J1, V5) within the payload or the container.

For the mapping of 2Mbit/s signals into SDH, two pointer levels are used. The first level - the AU-4

pointer - identifies the start of the VC-4 relative to the basic STM-1 frame. The second level - the TU-12

pointers - identifies the start of the VC-12 relative to the VC-4 for each of the 63 VC-12s.

The use of the pointer decouples the information channels (VC) from the transport medium (STM signal).

The fixed phase relationships of older systems are avoided in this manner.

It is also possible to multiplex and demultiplex signals in a single device across all levels. The byte

position of a subsignal is easy to compute.

1. Layered network administration structure is adopted in SDH, and they are :

1.1 Path 1.2 Tandem Connection (TC) (optional layer)1.3 Multiplex Section (MS) 1.4 Regenerator Section (RS)

2. For administration of each layer, dedicated overhead bites are assigned.

2.1 Path overhead (POH), MUX section overhead (MSOH) and

2.1 REG section overhead (RSOH). TC uses a part of POH.

3. Regenerator section

3.1 Section between adjacent repeaters or between a multiplexer and an adjacent regenerator.

3.2 Or section between points where RSOH is generated and terminated.

4. Multiplex section

3.3 Section between adjacent multiplexers, may contain multiple RSs.

3.4 Or section between points where MSOH is generated and terminated.

5. When no regenerator, one physical section becomes MS and RS at the same time, but they are independent layers.

6. Path

6.1 Connection between service transmission input/output points to/from SDH network.

6.2 Or connection between points where a VC is assembled and disassembled.

6.3 Or connection between points where a POH is generated and terminated.

1. Path has nothing to do with a connection route in the SDH network.

2. Tandem Connection is a part of a path. The TC is optional and its length is determined by a network operator. Its

administration is carried out using a part of POH.

3. RS and MS are physical connection and Path and TC are logical connection

88

. It regenerate the clock and amplitude of incoming distorted and attenuated signal.

It derive the clock signal from the incoming data stream

The terminal multiplexer is used to multiplex local tributaries (low rate) to the STM-n (high rate)

aggregate. The terminal is used in the chain topology as an end element. The regenerator is used to

regenerate the (high rate) STM-n in case that thedistance between two sites is longer than the

transmitter can carry.

ADM makes possibilities of :

The synchronous digital cross connect receives several (high rate) STM-n and switches any of their (low

rate) tributaries between them. It is used to connect between several topologies.

Extraction from & insertion into high speed SDH bit streams of Plesiochronous and lower

bit rate synchronous signal.

Ring structure of network which provides the advantage of automatic back-up path

switching in the event of fault.

SDH Cross connect: Involves cross connection of electrical signals

DWDM Cross connect:Involves cross connection of optical signals(channels)

Optical cross connects are of two types:

All Optical

Optical/Electrical/Optical(O/E/O)

An optical cross connect is an element used for making interconnection between different channels

either temporarily or permanently

It contains a Space-Switch which allows any wavelength on any input fiber to be routed to any

wavelength on any output fiber,given that wavelength is free to be used

It contains mux/demux and/or switching arrangement

An Agg to Agg connection, a trib to aggregate connection and a tributary to tributary connection is also

possible in case of a Digital Cross Connect

The linear bus (chain) topology used when there is no need for protection and the demography of the

sites is linear.

The ring topology is the most common and known topology of SDH, which allows great network flexibility

and protection.

DWDM networks could be in linear configuration or ring configuration Typically in metro networks due to

the short link lengths DCMs and regenerators may not be used. Some cases amplifiers are also not

used.

ILAs provide 1R regeneration as against 3R regeneration of SONET regenerators

Due to ASE (Amplifier Spontaneous Emission) signal becomes increasingly noisy as it is amplified by

many EDFAs

As per ITU-T G. 692, DWDM systems should be capable of transmitting signals without regeneration for

8 spans of 22dB

If Regeneration is required in all the signals, two back to back terminals may be used or else an OADM

may be used

The ring topology is the most common and known topology of SDH, which allows great network flexibility and protection.

1. Ring systems are classified into five types based on employed switching method combination (unidirectional or bidirectional switch

and path or line switch), routing of two-way traffic (unidirectional or bidirectional ring) and fiber number (2 or 4 fibers).

2. Theoretically any combination between switching and routing direction is possible. But in the ring system, above uni-uni and bi-bi

combination is used.

3. SNCP-ring (Unidirectional)

3.1 Also called 2-fiber Unidirectional Path protection Switch Ring (2F-UPSR)

3.2 No switching protocol is required. This is a simple and fast switching scheme.

4. MS Dedicated Protection Ring

4.1 2-fiber Unidirectional Line protection Switch Ring (2F-ULSR)

4.2 Protocol by K1 and K2 in MSOH is required and it is not standardized yet by ITU-T.

5. SNCP-ring (Bidirectional)

5.1 2-fiber Bidirectional Path protection Switch Ring (2F-BPSR)

5.2 Ring must be controlled at a path level and protocol by K3 or K4 in POH is required. It is not standardized yet by ITU-T.

6. 4F MS-SP ring

6.1 4-fiber Bidirectional Line protection Switch Ring (4F-BLSR)

6.2 Protocol by K1 and K2 in MSOH is required.

7. 2F MS-SP ring

7.1 2-fiber Bidirectional Line protection Switch Ring (2F-BLSR)

7.2 Protocol by K1 and K2 in MSOH is required.

1. There are two different algorithm in 4/2F MS-SP ring, the terrestrial application and the transoceanic application.

96

The SDH gives the ability to create topologies with protection for the data being

transmitted.

Following are some examples for protected ring topologies.

At this picture we can see Dual Unidirectional Ring. The normal data flow is

according to ring A . Ring B (black) carries unprotected data which is lost in

case of breakdown or it carries no data at all.

At this picture we can see Dual Unidirectional Ring. The normal data flow is

according to ring A . Ring B (black) carries unprotected data which is lost in

case of breakdown or it carries no data at all.

Error performance monitoring

Remote failure indications (RFI)

Remote Defect Indications ( RDI )

Signal Los

New Data flag indication

Synchronization source information

Pointer adjustment information

Path status

Path trace

Remote error indications (REI)

Aspecial synchronization network is set up to ensure that all of the elements in the communications

network are synchronous. The network is hierarchical distributed. A primary reference clock source

(PRS) controls the secondary clocks of stratum level 2 to 4 (SSU or ST2 to 4). This type of

synchronization signal distribution is also refered as Master/Slave synchronization. The actual

synchronization may take place via a separate , exclusive sub-network, or the communications signals

themselves may be utilized. Ring structures are also possible.

1. Highest-level clock in office used as SSU.

2. Basically, SSU works in a slave mode. (On the other hand PRC is an independent clock source with

high accuracy.)

3. SSU reference taken from another SSU or primary reference PRC.

4. SSU reference from source of equal or higher accuracy.

5. When the reference is lost, it works in a holdover mode. Holdover mode uses stored frequency and

phase data just before the reference loss.

SSUSynchronization Supply Unit

PRC: Primary Reference Clock

1. PRC : Primary Reference Clock

1.1 1 x 10-11 accuracy (atomic clock, GPS, LORAN-C). G.811

1.2 Usually, multiple PRCs are installed and one of them (primary) supplies network clock. During the

primary is normal the secondary is a stand-by and it slaves to the primary to avoid frequency and phase

jump at switching

2. SSU : Synchronization Supply Unit

2.1 1 x 10-9 /day maximum drift (under holdover) G.812-Transit

2.3 2 x 10-8 /day maximum drift (under holdover) G.812-Local

2.3 SSU has redundant synchronization routs to both primary and secondary.

3. SEC or SETS : SDH Equipment Clock or

Synchronous Equipment Timing Source

3.1 4.6 x 10-6 accuracy (under free run). G.813

3.2 This layer means clock circuit of each SDH equipment (multiplexer, regenerator etc.)

4. The latest G.812 dose not distinguish Transit and Local, and in G.707 they are mentioned as SSU-A and SSU-B.

5. Reference distribution between layers usually uses ordinary transmission line, extracting clock component of line signal.

114

Preferred Timing Method

1. The clock signals of network element (NE) is supplied by office clock equipment (PRC or SSU)

using the NEs external clock input port. The SSUs slave to the PRC and whole network is

synchronized to the PRC.

2. The PRC and SSU output one of following clock signal format.

2.1 Framed 2Mb/s (HDB3, Table 6 / G.703)

2.2 When the PRC or SSU is installed at remote location, this format is used to check the

transmission quality using CRC or HDB3 violation.

2.3 2MHz (Continuous signal, Table 10 / G.703)

3. External reference controls all outgoing STM-Ns (both aggregate and tributary lines).

4. Above shows the most desirable configuration but not realistic and most of NEs in a network

uses the line clock method (next slide).

5. Use of GPS (global Positioning Satellite) system receivers might make this quite feasible today

by providing an inexpensive SSU.

115

Useful when SSU availability is limited

1. The line clock method uses an extracted clock component of a line signal as the reference source.

It is possible to use either aggregate lines or tributary lines. 2 Mb/s tributary is also possible if it is

a synchronous signal.

2. In this configuration, one node must be a master using the external clock method (PRC or SSU)

or internal clock (next slide) and the other nodes become slave nodes using line clock.

3. All aggregate and tributary outgoing STM-N are timed to the incoming line chosen for

synchronization.

4. Provisioning must be done carefully to avoid improper timing with fiber failures. Especially for a

ring system, loop timing must be avoided.

Least Desirable Method of Timing

1. In internal clock mode, the clock circuit of each NE becomes independent. It slaves neither to lines

nor to external (PRC or SSU). In the free-run, the oscillator works without references and in the

holdover, it uses data stored before the loss of references.

2. Normally, this method is the last-option of the failure scenario.

3. Against a failure, the NE can be provisioned to enter the holdover, which attempts to maintain the

quality of the original reference.

4. If a system is timed this way, one node using its internal free-running clock becomes the master.

All other nodes in the line must be slaved to the master node using line clock.

5. This configuration is used for an SDH island, the area isolated from the synchronous network.

Used Only at Regenerators

1. Each direction timed differently.

2. Incoming STM-N sets the timing for outgoing signal in the same direction.

3. Opposite direction also derives timing from its incoming STM-N.

1. In the actual SDH network, External, Line, Internal and Through clock methods are combined to

construct the best clock distribution network and also counter measures against failures (redundancy,

reference source switching, etc.) are included.

2. Repetition of line clock accumulates impairment (jitter, wander, etc.) in clock component of the line

signal (STM-N). When it reaches to the limit, the clock signal must be refined. NE supplies degraded

extracted clock component to the SSU and the SSU suppresses the impairment using high

performance phase locked loop (PLL). Then give clean clock signal back to the NE. The SSU

supplies clock signal to other NEs in the office.

3. Maximum number of intermediate line clock nodes is determined by the performance of SSU and

NEs.

4. SDH system at remote area where synchronization reference is not available (SDH island), one of

SDH NE becomes a master node using internal clock (free run) and other NEs slave to it using line

clock configuration.

1. The clock circuit of NE is a PLL (Phase Locked Loop) and it can select a reference from line signals (STM-N, aggregate and tributary sides), external signals connected to PRC or SSU and PDH 2M (synchronous) tributary signals.

When the PLL loses a reference, it goes into hold-over (internal clock), keeping the same operation condition (frequency and phase) as before the loss.

When it does not have a reference from the beginning, it operates as a free-running oscillator (completely independent internal clock).

2. Line Clock: Clock component of STM-N is extracted and divided to appropriate low frequency. Its quality (origin) level is indicated by SSM (Synchronization Status Message), i.e. S1 of STM-N.

External Clock: 2.048 MHz or 2.048 Mbit/s framed bipolar from PRC or SSU. In case of 2 Mbit/s, it carries SSM when the PRC or SSU supports the function. When the SSM is not supported by SSU or NE, the quality level is provisioned manually.

PDH 2M: When it is generated by a synchronous equipment, e.g. EES, its 2.048 MHz clock component is possible to be used as a reference. Since it does not have SSM, its quality level must be set manually at each NE.

Internal: There are two modes. Hold-over uses memorized frequency and phase data of the last reference. Free-run operates without any reference. Quality level must be assigned and it is lower than any other references.

3. Each NE has different availability of above reference sources. Some of available sources might not be used according to the synchronization distribution network design. To all selected reference candidates

priority order is assigned.

4. Selection is carried out using the quality level and the priority order.

120

1. SDH NE can output a reference signal to an SSU or other synchronous equipment to give them

synchronization information from PRC or higher level SSU.

2. Possible output is one of the Line Clocks and PDH 2Ms. Those extracted clock component is directly

output without going through the PLL, after proper conversion to 2.048 MHz. This is generally called

Line Clock against Equipment Clock (below).

3. The output interface is 2.048 MHz (clause 10/ G.703) or 2.048 Mbit/s (clause 6/G.703). The 2.048

Mbit/s carries SSM if the NE is so designed.

4. The PLL output also can be selected as this output. This case is called Equipment Clock.

5. NE should not supply Equipment Clock to SSU. SSU installation at the node means that the clock

component of line signal has degradation and refining is required. And Equipment Clock supply

means its STM-N is generated by the same clock, not form the SSU, and the clock degradation

propagates to the next section.

6. Equipment Clock is used for the synchronization supply to other NE at stations where SSU is not

available.

S1 Synchronization Status Byte

1. Provided in MSOH (Multiplex Section Overhead).

2. Indicates quality of clock used to generate the STM-N

1. The recommendation dose not define Quality Level indication (1~6). Here, it is used for

explanation simplicity.

2. The latest G.812 does not distinguish Transit and Local. And the latest G.707 says SSU-A

and SSU-B respectively.

3. When the equipment generates STM-N by internal clock (holdover or free-run), S1 should be SEC.

4. DNU (Do not use for synchronization) is used when the equipment fails. Under the line clock state,

DNU is set to S1 of backward direction line (see following explanation).

5. Quality Unknown is used when the network uses an existing clock source that might not follow

G.811 or G.812.

1. Above drawing is a simple model of SDH line. Node A and Node C are clocked by PRC and SSU. Node

C, Node D and other nodes between B and C use line clock configuration.

2. SSM (S1) of line A1 is set to Q=1 automatically because its clock component is traceable to G.811.

When PRC and/or NE-A dose not support SSM, external-in port of NE must be provisioned to Q=1.

3. NE-B is not directly connected to PRC but since clock in line B1 is traceable to PRC, S1 of line B1 is set

to Q=1. This is done by reflecting S1 in A1 to B1. Same procedure is applied to all line clock nodes

before Node C.

4. Clock in line B2 is also traceable to PRC, but it is set to Q=6 (Do not use ...) intentionally and

automatically. B2 is clocked by A1 and from a view point of the direction of clock signal flow it is

backward. S1 of backward signal is always set to Q=6, regardless its actual quality in order to avoid

clock loop. If B2 is set to other than Q=6, there is a possibility to make a clock loop (A-A1-B-B2-A) when

PRC is lost.

5. At Node C, extracted clock from B1 is supplied to SSU to be refined and clean clock is given to the NE-

C. In this case, clock in line C1 is traceable to SSU and its S1becomes Q=3.

6. Direction of line C2 is same as B2. But it is not backward but forward, because it is not clocked by B1

but by SSU. Therefore, its S1 should be Q=3 (SSU).

7. It is not shown here, but when NE-A and -B have STM-N tributary lines their S1s are Q=1and NE-C and -D case Q=3.

124

Highest Quality, Highest Priority

1. First, checks for highest quality.

2. If two or more references are the same highest quality, then checks priority.

3. Finally, result of above checks is chosen.

4. Quality read from SSM, if supported, or as provisioned.

5. Priority must be provisioned by operator at system setup.

6. Quality of a failed line signal must be considered as Do not use for synchronization, even if SSM is

readable.

7. SSM of a backward signal must be set to Do not use synchronization.

1. The Node A is a master node and has a G.811 PRC.

2. At the Node C, synchronous 2M tributary signals are possible reference sources. Against a failure in the PRC, Node C will take over the master function, using one of 2Ms. B and D are simple slave nodes.

3. The settings are arranged to distributed clock clockwise direction ( A -> B -> C ->D).

At Node A :

Between two highest quality sources (Q=1, EXT 1 and 2), EXT 1 with higher priority order is selected as the reference.

It generates STM-N signals, to the east and west directions, setting their S1 bytes to Q=1.

To avoid a timing loop, the signal from the west direction is set to unused.At Node B :

From three available references (west, east and internal), the source of highest quality (west) is selected. This node sets the S1 to the east (forward) to Q=1 and the S1 to the west (backward) to Q=6.At Node C :

Although this node has tributary 2M signals as the reference source, since their quality level defined by the NE (Q=3, TRIB 1 and 2) are lower than the S1 indication of the receiving west, it selects the west as the reference.

At Node D :

1. S1 indications of line signals (west and east) are the same (Q=1) and higher than the internal. The node selects the west that has higher priority order.

It is assumed that a line signal failure has occurred on the clockwise signal between the Node A and

B. Then, clock reference changes will take place in the ring network with the following procedure.

At Node B :

1. Because of detection of the signal failure in the receiving west, which has been the

reference source, the node decides the quality level of the reference as Q=6, regardless

its S1 indication.

2. The Node B stops using the west signal and switches to the internal. It cannot use the

east, as its S1 indication is Q=6 at this moment. The NE sends out S1=Q=5, which is the

quality level of new reference, to east and west directions, automatically changing from

previous Q=1 and Q=6 respectively.

At Node C :

Detecting the change in the S1 of the receiving west signal, Q=1 to Q=5, the node starts

comparison between its available sources. They are west, east, TRIB 1, TRIB2 and internal.

Then, it selects the TRIB 1 with the highest Q, since the TRIB 2 has the same level Q but lower

priority order. The NE sends out S1=Q=3 to east and west directions, changing from previous

Q=1 and Q=6 respectively.

At Node B :

Now the receiving east has higher quality (Q=3) than the current reference, internal (Q=5).

As a result, the node selects the east sending out S1=Q=3 to the west direction and S1=Q=6 to the east direction.

At Node D :

After comparing qualities of the receiving east (Q=1), the receiving west (Q=3) and the internal

(Q=5), it selects the east having the highest Q. This node sets the S1 to the west (forward) to

Q=1 and the S1 to the east (backward) to Q=6.

At Node C :

As the receiving east has higher Q (=1) than the present reference TRIB 1 (Q=3), its source

is changed to the east from the TRIB 1. It sends Q=1 to the west and Q=6 to the east.

At Node B :

There is no change for the reference selection. But the S1 indication to the west direction is

altered to Q=1, because, by the change at the station C, this nodes clock source is now traceable back to the G.811 PRC at the station A. This change is done by using the S1

value in the receiving east signal.

1. The final settlement of the clock distribution is changed to counter clockwise direction ( A -> D -> C ->B).

2. The final result is not important in this explanation. It is important to understand how selection rules

are applied and how SSM (S1) is controlled.

1. Another example of reference source switching is a failure in both EXT 1 and 2 at the Node A. Failure

of the PRC itself is highly improbable, but here let us assume cable cut.

2. Although no detailed switching process will be explained, taking similar process shown above, the

clock source of the network will be changed to the sub-master (Node C). In this case, the final clock

distribution will become D -> C -> B -> A. It is recommended to trace the switching process by

yourself, referring previous explanations.

1. To maintain the synchronization of NE, a PLL circuit with holdover is provided in NE..

2. The graph shows the holdover and free-run characteristic curves of PLL circuit.

3. During the clock circuit is being operated in a slave mode, frequency and phase are memorized in

holdover circuit. When the circuit loses the reference source for example by line failure, those

stored data are used for continuous and seamless operation. But due to the thermal noise of the

PLL looped circuit, the accuracy of VCXO is degraded with time as shown in No. 2. The holdover

function is effective within 24 hours. More than 24 hours pass, the VCXO becomes the free-run

status as shown in No 2. The transmission disturbances caused by abrupt change of frequency and

phase can be avoid by holdover function.

4. If there is no reference source supply, the VCXO is free-run state without holdover as shown in No. 1.

5. If the reference clock is recovery during the holdover state, the NE become in slave state again as

shown in No. 3

PH COMP: Phase comparator, A/D: Analogue/Digital converter

D/A: Digital/Analogue converter

VCXO: Voltage Control Crystal Oscillator

135

1. The original three network node interface (NNI) recommendations (G.707, G.708, and G.709) were

integrated into G.707 in 1996.

2. A distinctive features of SDH recommendations, that cannot be found in PDH recommendations, are :

2.1 Recommendations for OAM&P (Operation, Administration, Maintenance and Provisioning), i.e.

NMS (Network Management System), are defined.

2.2 Protocol suits for NMS connection are defined.

2.3 Functional configuration of equipment is described in detail.

2.4 Optical interface is standardized.

3. They are essential for realization of multi-vender environment.

Enterprise Systems Connection :It is an IBM standardized protocol for the interconnection of IT

equipment. Bit rate=200Mbps .Marketing name for a set of IBM & vendor products that interconnect

S/390 computers with each other & with attached storage , locally attached work stations & other devices

using optical fiber technology

GFP Provides an elegant framing procedure with low overhead and support for both packet services and storage services

Virtual Concatenation Improves on current models of contiguous concatenation by supporting much finer granularity of circuit provisioning and management from the edge of the network. Right-sized pipes for packet services (Ethe

fundamental of sdh technology

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