future directions in > 100 ghz devices · 2020-04-22 · 0.2 0.3 0 10 20 30 40 ev nm 6 nm er...
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Future Directions in > 100 GHz Devices
Mark Rodwell, Yihao Fang, Brian Markman, Hsin-Ying TsengUniversity of California, Santa [email protected]
This work was supported in part by the Semiconductor Research Corporation (SRC), DARPA, and the NSF
2019 IEEE SISC Conference, December 13, San Diego
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Future Directions in > 100 GHz Devices
Mark Rodwell, Yihao Fang, Brian Markman, Hsin-Ying TsengUniversity of California, Santa [email protected]
This work was supported in part by the Semiconductor Research Corporation (SRC), DARPA, and the NSF
2019 IEEE SISC Conference, December 13, San Diego
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Transistor design and materials requirements
Transistors for VLSILarge Ion, small Ioff, low VDD, small footprint… hard ! MOSFETs, TFETs.
Transistors for wirelessHigh (ft,fmax) , low noise, high power, high efficiency.InP HBTs, InP MOS-HEMTs, (GaN HEMTs, SiGe HBTs)
Transistors for power switching: high speed, high voltage, high current, GaN, SiC, Si LDMOS…not my field.
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nm FETs: MOS and TFETs
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MOSFETs for VLSI
Goals: large Ion, small Ioff, low VDD, small footprintMinimum Lg set by minimum equivalent oxide thickness. ZrxHf1-xO2 ?Minimum contact size set by contact resistivity (<0.3 W-mm2)Ballistic Ion set by band structure: EOT, m*, # valleysIoff is degraded by low bandgapIdeal: m*=0.1me, 2-3 valleys, Eg>1eV, grades to small-Eg contact layers
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.01 0.1 1
K1
m*/mo
g=2
EET=1.0 nm
0.6 nm
0.4 nm
g=1
EET=Tox
SiO2/ox+T
channelSiO2/2
channel
In(Ga)As thin {100} Si3/2
1
84mA
m 1V
gs thV VJ K
m
-
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High-current triple-heterojunction TFETs for VLSI
TFETs: steep SS , low Ion; ✘Triple-HJ TFET: steep SS , high Ion;
Materials needs:Direct bandgap, large band offsets, small tunnel barrier, low m*Low Dit for N & P materials. (N-InAs , N-InP , P-GaAsSb ?, P-InGaAs ?)small dielectric EOT, low r contacts
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0 10 20 30 40
eV
nm
6 nmbarrier
< 2nm barrier
Simu
lation
s: M. Po
volo
ski, Pu
rdu
e
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High-Frequency Transistors
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Beyond-5G Wireless: 100-300GHz 10Gb mobile communications:
Unlimited information, anywhere.Capacity well beyond 5G.
TV-resolution wireless imaging:See, fly, drive perfectly in any conditions.
Debdeep Jena, Alyosha Molnar, Christoph Studer, Huili Xing: Cornell University
Dina Katabi: MIT
Sundeep Rangan: New York University
Amin Arbabian, Srabanti Chowdhury: Stanford
Elad Alon, Ali Niknejad, Borivoje Nikolic, Vladimir Stojanovic: University of California, Berkeley
Gabriel Rebeiz: University of California, San Diego
Jim Buckwalter, Upamanyu Madhow, Umesh Mishra, Mark Rodwell: University of California, Santa Barbara
Andreas Molisch, Hossein Hashemi: University of Southern California
Harish Krishnaswamy: Columbia University
Kenneth O: University of Texas, Dallas
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Target applicationsMIMO hub: 140GHz, 128 beams/face, 10Gb/s/user, 100m
Point-point MIMO: 240GHz, 340GHz: 640Gb/s, 250-500m
Hardware-efficient imaging: 240GHz, 340 GHz, 300m, 512×64 image, 60Hz, 15dB SNR
/N L
2 /N L R
/ L 5 Tb/s !
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A few high-frequency ICs
570 GHz fundamentaloscillator;InP HBT
Vout
VEE VBB
Vtune
Vout
VEE VBB
Vtune
M. Seo, TSC / UCSBJSSC, 2011
600 GHz IntegratedTransmitter;InP HBTPLL + Mixer+AmplifierM. Seo TSC2012 IMS
204 GHz static frequency divider(ECL master-slave latch);InP HBTZ. Griffith, TSC / UCSBCSIC 2010
1.0 THz Amplifier;InP HEMTMei et al, Northrop-GrummanEDL, 2015
220 GHz 180 mWpower amplifier;InP HBT
T. Reed, UCSBZ. Griffith, TSCCSICS 2013
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Transistor development for 100-300GHz systems
THz InP HBTs:Efficient 100-650GHz powermore fmax: more efficient, higher frequenciesbase regrowth: better contacts→ higher fmax.status: working DC devices; moving to THz
0
3
6
9
12
15
0 0.5 1 1.5 2
I C (
mA
)
VCE
(V)
THz InP HBTs:Sensitive 100-650GHz low-noise amplifiersmore ft: lower noise, higher frequencieshigh-K gate dielectric → higher ft.status: process modules
InGaN and GaN HEMTs:High power from 100-340GHz GaN: superior power density at all frequenciesUCSB/Mishra: InGaN for increased mobilityCornell/Xing: AlN/GaN/AlN
0.1
1
10
100
1000
1 10 100
GaNGaAsInP
Pou
t(W)
Frequency (GHz)
N-polar GaN: Mishra, UCSB
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Transistor scaling laws: ( V,I,R,C,t ) vs. geometry
AR contact /r
Bulk and Contact Resistances
Depletion Layers
T
AC
v
T
2t
2
max)(4
T
Vv
A
I applsat
Thermal Resistance
Fringing Capacitances
~/ LC finging~/ LC finging
contact terms
dominate
escapacitanc fringing FET )1
escapacitancct interconne IC )2
W
L
LK
PT
th
ln~transistor
LK
PT
th
ICIC
Available quantum states to carry current
→ capacitance, transconductancecontact resistance
L
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Degenerate State Density (Ballistic) Limits
Fermi Energy Fermi Energy
Band edge Band edgeCharge = ( ) Current = ( ) ( )q n E dE q v E n E dE
*( ) ( )sheet dos gs th f wellc V V m E Er - -1/2 3/2
2
( )
not ( / )( )
sheet f well
ox g gs th
J m E E
c L V Vm
-
-
2 2*( ) *( )
not ~ exp( / )
f c be
be
J m E E m V
qV kT
- -
2/3
2/3 2
1 8
3cn q
r
Contacts
"ballistic limit"
"state density capacitance"
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Frequency Limits and Scaling Laws of (most) Electron Devices
width
lengthlog
length
power
thicknessarea /
length
width
4area
area/
thickness/area
thickness
2
limit-charge-space max,
T
I
R
R
C
sheetcontactbottom
contacttop
rr
r
t
To double bandwidth:Reduce thicknesses 2:1Improve contacts 4:1Reduce width 4:1, Keep constant lengthIncrease current density 4:1
topR
bottomR
PIN photodiode
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THz Bipolar Transistors
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Bipolar Transistor Design: Scaling
nbb DT 22t
satcc vT 2t
cccb /TAC
eex AR /contactr
2
through-punchce,operatingce,max cesatc TVVAvI /)(,
contacts
contactsheet
612 AL
W
L
WR
e
bc
e
ebb
rr
e
e
E W
L
L
PT ln1
eW
bcWbT
ELlength emitter
cT
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Bipolar Transistor Scaling Laws
Narrow junctions.
Thin layers
High current density
Ultra low resistivity contacts
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InP HBTs: 1.07 THz @200nm
?
Rode et al., IEEE TED, Aug. 2015
0
5
10
15
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25
30
109
1010
1011
1012
Un
ilate
ral P
ow
er
Ga
in, d
B
Frequency, Hz
parallel elements outside
series elements outside
fit: 1.06 THz fmax
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Challenges at the 64nm/2THz & 32nm/3THz Nodes
1018
1019
1020
1021
P-InGaAs
10-10
10-9
10-8
10-7
10-6
10-5
Hole Concentration, cm-3
B=0.8 eV
0.6 eV0.4 eV0.2 eV
step-barrierLandauer
Co
nta
ct
Re
sis
tiv
ity
, W
-cm
2
3THz target
Baraskar et a
l, Jou
rnal o
f Ap
plied
Ph
ysics, 20
13
Need high base contact doping>1020/cm3 for good contactshigh Auger recombinationvery low b.
Need moderate contact penetrationPd or Pt contactsreact with 3++ nm of basepenetrate surface contaminantstoo deep for thin base
Solution: base regrowth:thin, moderately-doped intrinsic base
InGaAs or GaAsSb @ 1019-1020/cm3
thick, heavily-doped extrinsic baseP-GaAs, ~1021/cm3
Rode et al., IEEE TED, Aug. 2015
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Regrown-Base InP HBTs: Images
Cross-sections
Dry-etchedTiW emitter contact
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Regrown-Base InP HBTs: Status
Excellent base contacts; but hydrogen base passivation0.4 W-mm2 resistivity for GaAs/metal contact290 W sheet resistivity for regrown base 0.60W-mm2 resistivity for InGaAs/GaAs contact✘1940W/ sheet resistivity for intrinsic base ✘
0
3
6
9
12
15
0 0.5 1 1.5 2
I C (
mA
)
VCE
(V)
IB,Step
=120µA
10-3
10-2
10-1
100
101
0
2
4
6
8
10
12
14
16
0.3 0.4 0.5 0.6 0.7 0.8 0.9
I B ,
IC (
mA
)
b
VBE
(V)
Solid: VCB
= 0V
Dashed: VCB
= 1V
IB
IC
b
Good DC data: even given regrowthrefractory Mo/W/TiW emitter contactmaintains low rc.
Current process runs: GaAsSb intrinsic baseresistant to hydrogen passivation of carbon base dopant(current reference sample: GaAsSb base, no regrowth)→→
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Materials for Improved THz HBTsContacts: existing materials are sufficient.
N-InAs for emitter, regrown ~1021 cm-3 GaAs for base
Base transit time is no problem: regrowth permits very thin base
Desire: improved voltage at a given bandwidth 1.4eV bandgap→ 30V/mm breakdownBut: increased transit time at high Vce:
G-(L,X) scattering, E-k dispersion
Is there a better collector material ?: Larger bandgapLarger G-(L,X) energy separationLow optical phonon scattering rates (GaN suffers here).High thermal conductivity.
-2
-1
0
1
2
0 100 200 300 400
eV
nm
G
L
Pro
f. Jasprit Sin
gh; eecs3
20
no
tes, Un
iv Mich
igan;
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THz Field-Effect Transistors
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FETs (HEMTs): key for low noise
2:1 to 4:1 increase in ft :improved noiseless required transmit powersmaller PAs, less DC power
or higher-frequency systems
0
2
4
6
8
10
1010
1011
1012
No
ise
fig
ure
, d
Bfrequency, Hz
ft=300GHz
600GHz
1200GHz
2400GHz
1
)(2
)(21
2
min
G
G
G
t
t
f
fRRRg
f
fRRRgF
igsm
igsm
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High-Frequency FET Scaling
To double ft , reduce Lg 2:1, but this is not enough
Must also reduce Cgsx/gm , Cgd/gm time constants 2:1
→ gm/Wg must be doubled
Must also thin dielectric and channel by 2:1 (gmRds)
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FET Current and Transconductance
inversiondepth /Tc
oxc
)( thgs VV -
2*2 2/ gmqcdos
qEE wellf /)( -
channel charge
* 2Fermi velocity from ( ) / 2f well fE E m v-
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.01 0.1 1
K1
m*/mo
g=2
EET=1.0 nm
0.6 nm
0.4 nm
g=1
EET=Tox
SiO2/ox+T
channelSiO2/2
channel
In(Ga)As thin {100} Si
3/2
1 (84mA/ m) ( ) /1Vgs thJ K V Vm -
current Fermi velocity charge
1/2
1 ( )m gs thg K V V -
To increase gm:thin the oxide & channeland increase K1 (mass, # valleys)…hardor increase (Vgs-Vth)…also hard
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FET Scaling Laws (these now broken)
FET parameter change
gate length decrease 2:1
current density (mA/mm) increase 2:1
specific transconductance (mS/mm) increase 2:1
transport mass constant
2DEG electron density increase 2:1
gate-channel capacitance density increase 2:1
dielectric equivalent thickness decrease 2:1
channel thickness decrease 2:1
either (channel state density) increase 2:1
or (Vgs-Vth) increase 4:1
contact resistivities decrease 4:1
Gate dielectric can't be much further scaled.Not in CMOS VLSI, not in mm-wave HEMTs
gm/Wg (mS/mm) hard to increase→ Cend / gm prevents ft scaling.
Shorter gate lengths degrade electrostatics→ reduced gm /Gds → reduced fmax , ft
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Towards faster HEMTs: InAs MOS-HEMTs
Scaling limit: gate insulator thicknessHEMT: InAlAs barrier: tunneling, thermionic leakagesolution: replace InAlAs with high-K dielectric2nm ZrO2 (r=25): adequately low leakage
Scaling limit: source access resistanceHEMT: InAlAs barrier is under N+ source/drainsolution: regrowth, place N+ layer on InAs channel
Target ~10nm node~0.3nm EOT, 3nm thick channel1.2 to 1.5 THz ft.
8/2019: process working: 470GHz ft. @ ~28nm Lg.fmax very low, ft high but not high enough.Now fixing obvious process problems.
1st MOS-HEMT demonstration: Fraunhofer IAF
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Device Images
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More Device Images
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Increasing FET transconductanceFor 1-2 THz ft , seek gmi= 4-8 mS/mm.
thin the oxide, thin the well→ increased eigenstate energy→ loss of confinement at large (Vgs-Vth)→ constrains maximum transconductance: gm∝(Vgs-Vth)1/2
→ maximum achievable gm.
Need high barrier energiesInAs/InAlAs vs InAs/AlAsSbInP/AlAsSb ????
Huang, JAP, 2014B. Markman, to be published
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mm-Wave CMOS also won't scale much further
High-frequency Si MOSFET design follows the same principles as high-frequency III-V FET design.Same physics, so same limits. But, the carrier velocities are lower
Difficult to further thin the gate dielectric (increased gate leakage)→ gm can't increase
Shorter gates don't significantly reduce the capacitance: dominated by ends; ~1fF/mm total
Maximum gm, minimum C→ upper limit on ft.about 350-400 GHz. At the *bottom* of the wiring stack
Usable bandwidth is lower than thishigh-frequency circuits need controlled-impedance Zo=50W interconnects
microstrip lines with signal lines at top of wiring stack.high-frequency transistors must interface to ~50 Ohm external impedances
~20-30 FET fingers must be tied in parallel to bring device port impedances close to 50W.The necessary wiring further reduces ft, fmax: c.a. 300GHz in leading CMOS technologies.
The best CMOS node for mm-wave is 65nm.45nm SOI, 22nm SOI are close to this performanceIntel's RF-optimized 22nm finFET is also close to this performance
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.01 0.1 1
K1
m*/mo
g=2
EET=1.0 nm
0.6 nm
0.4 nm
g=1
EET=Tox
SiO2/ox+T
channelSiO2/2
channel
In(Ga)As thin {100} Si
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Materials for THz (MOS) HEMTsLow resistance in source-gate access region:
moderate to high mobility
High transconductancesufficient mobility to reach ballistic current.m*≈ 0.08·mo to 0.16·mo high ballistic vinj
desirable/hard: multiple band minima (large ns)large band offsets for large (Ef-Ec)→ large (Vgs-Vth)
Low S/D access resistancesS/D materials with high doping, low barriers. Grade heterointerfaces
High velocities and high breakdown fields in gate-drain drift regionm* need not be particularly lowlow phonon scattering rateslarge intervalley energy separationwide bandgap
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Closing
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Materials Requirements for Future Transistors
VLSI (MOSFETs, TFETs): It's mostly about the interfaces: gate dielectrics, S/D contactsThe channel also matters: high ballistic Ion, sufficient Eg for low Ioff
MOS-HEMTs for mm-wave ICs, 50-500GHz low-noise amplifiersSame as VLSI MOSFETs: gate dielectrics, S/D contactsLarge ballistic Ion.How to increase gm ? Large (Vgs-Vth)→ large (Ebarrier-Ewell)
HBTs for mm-wave ICs, 50-500 GHz powerContacts are critically important…and achievable Breakdown vs. transit time: ballistic overshoot matters.Large intervalley separation, low scattering rates
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In case of questions
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FET Design: Scaling
g
DSWL
RRS/D
contactr
, 0gd gs f r gC C W
)/( gchgm LvCg -
0/ ( )DS g g rR L W v
)density state /well(2// 2
wellwell qTT
WLC
oxox
gg
chg
-
masstransport
1
capacitors threeabove the
between ratiodivision voltage2/1
-
v
gW width gate