gps/glonass/galileo/compass single-chip receiver …€¦ · the galileo and compass as well as...

GPS/GLONASS/GALILEO/COMPASS

SINGLE-CHIP RECEIVER

NV08C-MCM

Datasheet Version 2.7

TITLE: NV08C-MCM DATASHEET V2.7 ENG, February 2, 2011 of 30

CONFIDENTIAL. The information contained herein is the exclusive property of NVS Technologies AG and shall not be disclosed, distributed or reproduced in whole or in part without prior written permission of NVS Technology AG.

Revision History

Revision ID Date Description

1.0 Jan 23, 2010 Initial release

2.0 April 07, 2010 First complete version

2.1 May 3, 2010 First version for distribution

2.2 June 3, 2010 Table 10 modified, few minor modifications

2.3 October 13, 2010 Multiple modifications concerning difference between engineering samples and production parts. To ease modifications tracking the modifications are highlighted by blue color

2.4 October 14, 2010 GLONASS only option excluded from power consumption specification

2.5 November 8, 2010 Few minor modifications

2.6 December 1, 2010 Select active/passive antenna option in Chapter 1.3 and Table 23. SPI FLASH/EEPROM description in Chapter 3.4. LDO-SHDN signal name changed to RF-Flag.

2.7 February 2, 2011 Chapter 2.5.2 modified. Active antenna connection circuitry added to Chapter 2.5.3. Table 4 modified.



Contents

1. Overview ............................................................................................................................................... 4

1.1. Introduction .................................................................................................................................. 4

1.2. Navigation Features ...................................................................................................................... 6

1.3. RF Functionality ............................................................................................................................. 6

1.4. Environmental Data ...................................................................................................................... 8

1.5. Data Interface ................................................................................................................................ 8

1.6. Electrical Parameters .................................................................................................................... 8

2. Hardware Reference ............................................................................................................................. 9

2.1. Signals Specification ...................................................................................................................... 9

2.2. Package........................................................................................................................................ 11

2.3. NV08C-MCM Pinout .................................................................................................................... 12

2.4. Electrical Specification ................................................................................................................ 14

2.4.1. Absolute Maximum Ratings ................................................................................................ 14

2.4.2. Recommended Operating Conditions ................................................................................. 14

2.4.3. DC Characteristics................................................................................................................ 15

2.4.4. Power Consumption ............................................................................................................ 16

2.4.5. Digital IO AC Characteristics ................................................................................................ 16

2.5. Hardware Integration Guide ....................................................................................................... 17

2.5.1. Power supply ....................................................................................................................... 17

2.5.2. Reset .................................................................................................................................... 21

2.5.3. Antenna ............................................................................................................................... 21

2.5.4. RTC clock ............................................................................................................................. 24

2.5.5. Digital I/O Interfaces ........................................................................................................... 25

3. Software and Protocols Reference ...................................................................................................... 27

3.1. Data protocol and configuration ................................................................................................. 27

3.2. Low power battery mode ............................................................................................................ 27

3.3. Assisted GNSS .............................................................................................................................. 28

3.4. Extension of the basic functionality, Patch technology .............................................................. 28

3.5. Dead reckoning ........................................................................................................................... 29

APPENDIX 1 ................................................................................................................................................. 30



1. Overview

1.1. Introduction

The NV08C-MCM is an integrated satellite navigation receiver. The device’s key feature is its ability to

work with both global navigation satellite systems (GNSS) that have been deployed so far in the world –

GPS and GLONASS. The GALILEO and COMPASS as well as SBAS systems are also fully supported.

The NV08C-MCM device was developed for use in high volume applications demanding low cost, low

power consumption and uncompromised performance such as:

in-car and handheld personal navigation

asset and personal tracking

anti theft systems

surveillance and security systems

as well as other mobile applications.

The NV08C-MCM offers high sensitivity and high performance of GNSS signal acquisition and tracking

combined with low power consumption and small size. The assisted GPS/GLONASS/GALILEO and

advanced power saving modes are supported.

Multiple satellites available from GNSS constellations ensure higher availability of navigation signal in

urban canyons compared to any single constellation solution.

For system integrator the NV08C-MCM provides a variety of interfaces, flexible power supply options,

power supply for optional active antenna. A very compact and complete GNSS receiver can be

integrated on a low cost 2 or 4-layer PCB with a minimal number of external passive parts.

The block diagram of NV08C-MCM engineering samples (marked R2.2) is shown on the Fig. 1 while the

block diagram of Production Parts (marked R4.1 or higher) is shown on the Fig. 2. There are three major

distinctions between engineering samples and production parts. The following modifications are

introduced for the production parts:

SPI interface between RF IC and Baseband ASIC is equipped with a bus buffer/line driver, which

requires external power supply

Active antenna power supply inside the module (on RF_IN input) is excluded, which requires

external circuitry to apply voltage for active antenna

The active level of Reset signal is LOW in opposite to Engineering Samples which accept HIGH

level of Reset signal.

It is recommended to design the module integration board in a way to accommodate both versions of

NV08C-MCM.



RF Supply

LDO

1.2V

BB core

1.8..3.3V

Ext I/O

2.85V

RF

3.0..5.5V

RF Supply

Active

Antenna

Power

Supply

Output

2.8V

RF I/O

1.2V

BB core

Passive

Antenna

Input

Ext Reset

2.85V

RF2.8V

RF I/O

NV08C-MCM

Vbat, 1.2V(optional)

Baseband (NV08CD)

SRAM

ROM

ARM7TDMI

GPS/

GALILEO/

GLONASS

Engine

Backup RAMRTC

Inte

rfa

ce

s

OTPSAW

RF Front-End

TCXO

RF

GLONASS

RF

GPS/

GALILEO

SPI

SPI

RTC XTAL

(optional)

2x UART

2x SPI

TWI (I2C

compatible)

1PPS

Digital Supply

LDO LDO

Active

Antenna

Input

3.0..5.5V

Digital Supply

Fig. 1. NV08C-MCM Engineering samples Block Diagram

RF Supply

LDO

1.2V

BB core

1.8..3.3V

Ext I/O

2.85V

RF

3.0..5.5V

RF Supply

Active

Antenna

Power

Supply

Output

2.8V

RF I/O

1.2V

BB core

Passive

Antenna

Input

Ext Reset

2.85V

RF2.8V

RF I/O

NV08C-MCM

Vbat, 1.2V(optional)

Baseband (NV08CD)

SRAM

ROM

ARM7TDMI

GPS/

GALILEO/

GLONASS

Engine

Backup RAMRTC

Inte

rfa

ce

s

OTPSAW

RF Front-End

TCXO

RF

GLONASS

RF

GPS/

GALILEO

SPI

RTC XTAL

(optional)

2x UART

2x SPI

TWI (I2C

compatible)

1PPS

Digital Supply

LDO LDO

Active

Antenna

Input

3.0..5.5V

Digital Supply

SPI

BU

F

2.8V/1.8V

Vbuf Fig. 2. NV08C-MCM Production Parts Block Diagram



1.2. Navigation Features

Parameter Description

Supported GNSS signals

L1 GLONASS СТ

L1 GPS/SBAS C/A

L1 GALILEO/COMPASS OS Data+Pilot

Number of channels 32 channels, each is capable to receive any supported signal

Time to first fix

Cold star: 30s(average)

Warm start: 30s (average)

Hot start 3s (average)

Sensitivity

Cold star: – 143dBm

With A-GNSS: – 160dBm

Tracking mode: – 160dBm

Accuracy

Autonomous mode : 2.5m

Differential mode SBAS : 2m

Differential mode DGNSS: 1m

Height: 3.0m

Velocity: 0.05m/s

Assisted GNSS Supported

1PPS time accuracy 25 ns

Update rate Up to 10Hz

Limitations

Velocity: less than 500 m/s

Acceleration: less than 5 g

Height : less than 18,000 m

1.3. RF Functionality

There are 2 inputs in NV08C-MCM for connecting the active and passive antennas. By default the active

antenna input is selected. If automatic input selection is activated by configuration setting (see PIO 14

settings in see Table 23) the input is selected automatically depending on the active antenna supply

current. If there is no current flowing to the active antenna then the passive antenna input is selected by

activating corresponding LNA, otherwise (if IANTBIAS > 1.1mА) the active antenna input is used. The

antenna input selection option may be overridden by a command from the user’s system.

A passive antenna is connected to the LNA_IN input, while an active antenna to the RF_IN input. The

active antenna supply voltage 2.65V is available at V_ANT pin of the module. (See chapter 2.5.3).

Note: Engineering samples of NV08C-MCM also provide internal connection of V_ANT pin (2.65V) to

RF_IN input pin via a galvanic isolation. This connection is excluded for production parts.

A shortcut protection circuit limits active antenna supply current provided to the pin V_ANT (and RF_IN

for engineering samples) at 57 mA max.

The parameters of NV08C-MCM for active and passive antenna inputs are presented in the Table 1.



Table 1. Parameters of NV08C-MCM RF inputs

Active antenna, RF_IN

1dB Compression Point -9 dBm

Input Return Loss -11 dB

Total Noise Figure of the analog path at the RF_IN input 5.2 dB

Passive antenna, LNA_IN

Compression Point at 1dB -11 dBm

Input Return Loss -8 dB

Total Noise Figure of the analog path at the LNA_IN input 1.9 dB

Note – the Table 1 shows estimated values of parameters. The actual values may differ as a result of

production process tolerance.

The signal from the LNA output drives a wideband GLONASS & GPS filter that ensures high attenuation

of out of band noise. The parameters of the filter are shown in the Table 2.

Table 2. RF filter parameters

Parameter Value

Bandpass at 1dB level 1560…1620 MHz

Group delay mismatch within GPS bandpass 2 ns (typical)

Group delay mismatch within GLONASS bandpass 4 ns (typical)

Group delay difference between GPS and GLONASS bandpasses 3 ns (typical)

Out of band attenuation:

< 1450 MHz

1450.0 ... 1525.0 MHz

1640.0 ... 1700.0 MHz

> 1700 MHz

> 45 dB

> 35 dB

> 40 dB

> 50 dB

The signal from the RF filter is further processed by two independent analog Ics that provide two

receiver channels:

GPS/GALILEO/COMPASS/SBAS L1 (1575.42MHz @ 4MHz)

GLONASS L1 (1601.5MHz @ 8MHz).

In each channel the satellite signal is down-converted into the IF band around 4…5MHz, gets filtered by

polyphase filters having bandwidth 4MHz for GPS and 8MHz for GLONASS and passes a variable gain

amplifier combined with automatic gain control. The analog ICs include 2-bit ADC that converts the

signal to a digital code for processing in the digital baseband IC.

Normally both channels are enabled and the NV08C-MCM receives all supported navigation signals at

the same time. For power saving each channel may be individually disabled by software.

In order to decrease the power consumption a Time-to-Time Fix (TTTF) mode is provided. In this periodic

mode the power for analog part of the device is only supplied for a short time interval that is just

enough to re-capture the signal and evaluate its parameters. Then the power for analog part and active



antenna (if present) is turned off, the digital baseband calculates the position data, transfer this data to

the external user’s system and enters a power saving mode as well. The period of TTTF mode is

programmable by user.

In order to facilitate a fast acquisition of low level signals in poor reception areas the NV08C-MCM

contains a 26MHz generator (TCXO) with high temperature stability (±0.5 ppm).

1.4. Environmental Data

Operating Temperature from -30 °C to +85 °C.

Maximum relative humidity 98% at +40 °C.

Note: The device remains fully functional for operating temperature up to -40 °C. However the accuracy

of estimated navigation parameters may deteriorate.

1.5. Data Interface

Data update/output rate: 1, 2, 5, 10 Hz

Data output rate in TTTF mode: (1-60 s)-1

Supported protocols: IEC1162 (NMEA 0183)

BINR (proprietary)

RTCM SC 104.

Host data interface:

Two UART (up to 230’400 bit/s)

Two SPI

TWI (I2C compatible)

1PPS output / external synchronization pulse (input).

Data exchange rate up to 230’400 bit/s

1.6. Electrical Parameters

The NV08C-MCM device requires the following power supply voltages:

Digital I/O supply - 1.8V … 3.3V

All other circuits supply - Either a single voltage power supply 3.0V … 5.5V

Or a dual voltage power supply 1.2V and 3.0V … 5.5V.

With the dual voltage supply option the power consumption is less by 30-40% compared to the single

voltage power supply (see chapter 2.5.1.4).



The power consumption with the dual voltage supply option is as follows:

TTTF Mode (@ 1c):

- GPS/GALILEO only 16 mW*

- GNSS (GPS/GLONASS/GALILEO) 20 mW*.

Continuous tracking mode:

- GPS/GALILEO only 100 mW*

- GNSS (GPS/GLONASS/GALILEO) 150 mW*.

Sleep mode:

- 4 µA @ 1.2V.

* average value.

The sleep mode is supported by on-chip real-time clock and a static RAM, which are used to keep the

time and other information while main power is off. With this information the start time of receiver

before getting the first valid navigation data is shorter. In order to use the sleep mode it is necessary to

connect an external crystal 32,768Hz and provide an additional backup voltage 1.2V to the VBAT pin

(see chapter 2.5.4).

2. Hardware Reference

2.1. Signals Specification

The Table 3 below lists all the pins types of the NV08C-MCM device. For each pin, the signal name, ball

number, pin type, and a description are given. The Table 4 defines different pin types.

Table 3. Signal Type Definitions

Pin Type Definition

I Input Only

O Output Only

I/O Input or Output

AN Analog

PWR Power

GND Ground

Table 4. Pin list

Pin Name Ball

Number Pin

Type Description

Clock signals

XTAL1 D9 AN External crystal 32.768KHz shall be connected to these pins. Alternatively, the XTAL1 input may be driven by external generator

with digital CMOS levels (ref. chapter 2.5.4). XTAL2 C9 AN

Reset signal

RESET_n A6 I Asynchronous reset input. Active level is low. Note – In some of prototype samples active level is high.

RF input signals



Pin Name Ball

Number Pin

Type Description

LNA_IN K1 AN Passive antenna input

RF_IN G1 AN Active antenna input

Programmable I/O signals

P15 C2 I/O PIO pin 15

P14 B1 I/O PIO pin 14

P13 F2 I/O PIO pin 13

P12 F1 I/O PIO pin 12

P11 E1 I/O PIO pin 11

P10 A3 I/O PIO pin 10

P9 A2 I/O PIO pin 9

P8 A4 I/O PIO pin 8

P7 A5 I/O PIO pin 7

P6 C1 I/O PIO pin 6

P5 D1 I/O PIO pin 5

P4 B2 I/O PIO pin 4

P3 B5 I/O PIO pin 3

P2 B4 I/O PIO pin 2

P1 B6 I/O PIO pin 1

P0 F9 I/O PIO pin 0 (ANTFLAG – Antenna current flag. “1” at this output to informs users about the presence of the current flow to active antenna (1.1mA - 57 mA).

Power management signals

Sleep_Flag G9 O “0” at this output to inform users of low power consumption module and the absence of signal reception.

EN_RF G8 I Enable signal for LDOA

EN_BCC B7 I Enable signal for LDOD

Power Supply and GND pins

VIN_A L9 PWR Input supply for LDOA

VIN_D A9 PWR Input supply voltage for LDOD

VCC_RF K9 PWR Output 1 of LDOA

VCC_RFIO B9 PWR Output 1 of LDOD

VCC_BBC A8 PWR Output 2 of LDOD

VIN_BBC A7 PWR BB core supply

VIN_BBIO A1 PWR BB IO supply

VBAT E9 PWR BB battery supply

V_ANT J1 PWR Active antenna supply

Vbuf C6 PWR Bus buffer/line driver Supply Voltage

GND, 9 pins

B3, B8, D2,

G2, H1, H2,

J2, K2, L8

GND Ground

Production test signals

TP2 E8 Test

Test Mode select inputs.

All pins shall be tied to GND in user’s system.

TP1 E2 Test

TP0 F8 Test

TPE D8 Test

TPB C8 Test



2.2. Package

The NV08C-MCM device uses FBGA (Fine-Pitch Ball Grid Array) package with 99 balls.

E

D

E1

D1

e

TOP BOTTOM

b

e

NV08C-MCM

RX

X.X

X.X

XX

X

A1

Dimensions (mm)

Min Typical Max

D 12

E 9.0

D1 10.0

E1 8.0

e 1.0

b 0.43 0.48 0.53

Height – 2.4 ± 0.1 mm

Weight – less than 1 gram

Fig. 3. Drawing and dimensions of the module.

The detailed package drawing is shown in Appendix 1.



2.3. NV08C-MCM Pinout

1 2 3 4 5 6 7 8 9

A VIN_BBIO

P9

UARTA RX

GPIO9

P10

UARTA TX

GPIO10

P8

UARTB TX

GPIO8

P7

UARTB RX

GPIO7

#RESET VIN_BBC VCC_BBC VIN_D

B

P14

SPIA_CS0

GPIO14

P4

SPIB_CLK

GPIO4

GND

P2

SPIB_MO

GPIO2

P3

SPIB_CS

GPIO3

P1

SPIB_MI

GPIO1

EN_BCC GND VCC_RFIO

C

P6

TimeMark

TW_SCL

P15

SPIA_CLK Reserved Reserved Reserved Reserved Reserved TPB XTAL2

D

P5

PPS

TW_SDA

GND Reserved Reserved Reserved Reserved Reserved TPE XTAL1

E

P11

SPIA_CS1

GPIO11

TP1 Reserved Reserved Reserved Reserved Reserved TP2 VBAT

F

P12

SPIA_MI

GPIO12

P13

SPIA_MO

GPIO13

Reserved Reserved Reserved Reserved Reserved TP0 P0

ANTFLAG

G RF_IN

LNA2 GND Reserved Reserved Reserved Reserved Reserved EN_RF Sleep_Flag

H GND GND Reserved Reserved Reserved Reserved Reserved Reserved Reserved

J V_ANT

ANTBIAS GND Reserved Reserved Reserved Reserved Reserved Reserved Reserved

K LNA_IN

LNA1 GND Reserved Reserved Reserved Reserved Reserved Reserved VCC_RF

L Reserved Reserved Reserved Reserved Reserved Reserved Reserved GND VIN_A

Fig. 4. NV08-MCM Ball Map. Top View on customer’s PCB. Engineering Samples.

Note – The reserved pins must be left unconnected in the user system.



1 2 3 4 5 6 7 8 9

A VIN_BBIO

P9

UARTA RX

GPIO9

P10

UARTA TX

GPIO10

P8

UARTB TX

GPIO8

P7

UARTB RX

GPIO7

#RESET VIN_BBC VCC_BBC VIN_D

B

P14

SPIA_CS0

GPIO14

P4

SPIB_CLK

GPIO4

GND

P2

SPIB_MO

GPIO2

P3

SPIB_CS

GPIO3

P1

SPIB_MI

GPIO1

EN_BCC GND VCC_RFIO

C

P6

TimeMark

TW_SCL

P15

SPIA_CLK Reserved Reserved Reserved Vbuf Reserved TPB XTAL2

D

P5

PPS

TW_SDA

GND Reserved Reserved Reserved Reserved Reserved TPE XTAL1

E

P11

SPIA_CS1

GPIO11

TP1 Reserved Reserved Reserved Reserved Reserved TP2 VBAT

F

P12

SPIA_MI

GPIO12

P13

SPIA_MO

GPIO13

Reserved Reserved Reserved Reserved Reserved TP0 P0

ANTFLAG

G RF_IN

LNA2 GND Reserved Reserved Reserved Reserved Reserved EN_RF Sleep_Flag

H GND GND Reserved Reserved Reserved Reserved Reserved Reserved Reserved

J V_ANT

ANTBIAS GND Reserved Reserved Reserved Reserved Reserved Reserved Reserved

K LNA_IN

LNA1 GND Reserved Reserved Reserved Reserved Reserved Reserved VCC_RF

L Reserved Reserved Reserved Reserved Reserved Reserved Reserved GND VIN_A

Fig. 5. NV08-MCM Ball Map. Top View on customer’s PCB. Production Parts.

Note – The reserved pins must be left unconnected in the user system.



2.4. Electrical Specification

2.4.1. Absolute Maximum Ratings

The Table 5 lists the absolute maximum ratings of the NV8CD device. Operation at or beyond these maximum ratings may cause permanent damage to the device. These are stress ratings only.

Table 5. Absolute Maximum Ratings

Symbol Parameter Minimum Maximum Unit

Ts Storage Ambient Temperature -55 125 °C

VCC_IN_A Supply Voltage for LDOA -0.3 6 V

VCC_IN_D Supply Voltage for LDOD -0.3 6 V

VCC_BBC_IN BB Core Supply Voltage -0.5 1.8 V

VCC_BBIO BB IO Supply Voltage -0.5 4.6 V

Vbuf Bus buffer/line driver Supply Voltage -0.5 6.5 V

VBAT BB Battery Supply Voltage -0.5 1.8 V

VEN EN_LDOA Voltage -0.3 VCC_IN_A V

VEN EN_LDOD Voltage -0.3 VCC_IN_D V

PRF RF_IN, LNA_IN Power 10 dBm

VIO P15 – P0, RESET_n -0.5 VCC_BBIO+0.5 (<4.6) V

VXTAL XTAL1, XTAL2 -0.5 VBAT +0.5 (<1.8) V

2.4.2. Recommended Operating Conditions

Recommended operating conditions are values that guarantee correct device operation. As long as the

device is used within the ranges, electrical DC and AC characteristics are guaranteed.

2.4.2.1. Ambient Temperature


Tj Operating Ambient Temperature -30 85 °C

2.4.2.2. Power Supply Voltage

Table 6. Power Supply Voltage

Symbol Parameter Minimum Typical Maximum Unit

VCC_IN_A Supply Voltage for LDOA 3.0 5.5 V

VCC_IN_D Supply Voltage for LDOD 2.95 5.5 V

VCC_BBC_IN BB Core Supply Voltage 1.1 1.2 1.3 V

VCC_BBIO BB IO Supply Voltage 1.65 1.8/2.5/3.3 3.6 V

VBAT BB Battery Supply Voltage 1.1 1.2 1.3 V

Table 7. Active antenna power supply


V_ANT Voltage active antenna 2.5 2.65 2.8 V

I_ANT Current consumption of active 57 mA




antenna

2.4.2.3. Input Voltage

Table 8. Input Voltage for P15 – P0

Symbol Parameter IO Power Supply

Voltage VCC_BBIO Minimum Maximum Unit

VIH High Level Input Voltage

3.3V 2.0 VCC_BBIO + 0.3 V 2.5V 1.7 VCC_BBIO + 0.3

1.8V 0.65 x VCC_BBIO VCC_BBIO + 0.3

VIL Low Level Input Voltage

3.3V -0.3 0.8 VV 2.5V -0.3 0.7

1.8V -0.3 0.35 x VCC_BBIO

Table 9. Input Voltage for RESET_n

Symbol Parameter IO Power Supply

Voltage VCC_BBIO Minimum Maximum Unit

VIH High Level Input Voltage

3.3V 2.1 VCC_BBIO + 0.3

V 2.5V 1.7 VCC_BBIO + 0.3



VIL Low Level Input Voltage

3.3V -0.3 0.7

V 2.5V -0.3 0.7

1.8V -0.3 0.3 x VCC_BBIO

1.2V -0.3 0.3 x VCC_BBIO

Table 10. Input Voltage for EN_RF, EN_BCC


VIH High Level 1.2 V

VIL Low Level 0.2 V

2.4.3. DC Characteristics

Table 11. DC Characteristics

Symbol Parameter IO Power

Supply Voltage VCC_BBIO

Conditions Minimum Maximum Unit

VOH High Level Output Voltage

3.3V IOH = -100uA VCC_BBIO -0.2 -

V

IOH = -4mA VCC_BBIO -0.4 -

2.5V IOH = -100uA VCC_BBIO -0.2 -


1.8V IOH = -100uA VCC_BBIO -0.2 -


VOL Low Level Output Voltage

3.3V IOL = 100uA - 0.2

V IOL = 4mA - 0.35



Symbol Parameter IO Power

Supply Voltage VCC_BBIO

Conditions Minimum Maximum Unit

2.5V IOL = 100uA - 0.2

IOL = 4mA - 0.4

1.8V IOL = 100uA - 0.2

IOL = 3mA - 0.45

IL1 Input Leak - - ±4 uA

Note 1: Input Leak value shown for a case when Pull-Up and Pull-Down resistors are OFF and IO Power

Supply Voltage is 3.3V.

2.4.4. Power Consumption

Table 12. Current Consumptions


IVCC_IN Total supply current through pins VCC_IN_A and VCC_IN_B

421 mA

IVCC_BBC_IN BB Core Supply Current 65 mA

IVCC_BBC_IN_STBY BB Core Supply Standby Current2 100 uA

IVBAT BB Battery Supply Current 0.13 mA

IVBAT_STBY BB Battery Supply Standby Current 4 uA

IVCC_BBIO BB IO Supply Current 904 mA

IVCC_BBIO_STBY BB IO Supply Standby Current2 20 uA

Notes:

1. Current shown for a case when there is no current through VCC_BBC_OUT.

2. EN_LDOA=L and EN_LDOB=L; BB in the power save mode S2.

3. BRAM access rate less than 1M/s.

4. Current shown for a case when output current through each of pins P15 – P0, Sleep_Flag is 4mA.

2.4.5. Digital IO AC Characteristics

2.4.5.1. XTAL1 Signal

Table 13. AC parameters of signal XTAL1


F Frequency 32’768 Hz

Thi High time 50 - ns

Tlo Low time 50 - ns

2.4.5.2. SPI Interface

Table 14. AC parameters of P15-P12, P4 – P1 interface signals when P is programmed as SPI interface


F Frequency of P15, P4 20 MHz

Td_mst SPI Clock to Data Valid in SPI Master mode: P4 to P2 Valid. P15 to P13 Valid.

15 ns



Td_slv SPI Clock to Data Valid in SPI Slave mode: P15 to P12 Valid.

15 ns

Tsu_mst SPI Data to SPI Clock setup in SPI Master mode: P1 to P4 setup. P12 to P15 setup.

15 ns

Tsu_slv SPI Data to SPI Clock setup in SPI Slave mode: P13 to P15 setup.

15 ns

Th_mst SPI Data after SPI Clock hold in SPI Master mode: P1 after P4 hold. P12 after P15 hold.

1 ns

Th_slv SPI Data after SPI Clock hold in SPI Slave mode: P13 after P15 hold.

1 ns

2.5. Hardware Integration Guide

2.5.1. Power supply

2.5.1.1. Wiring the module to the external power supply

Fig. 6 shows the power connection diagramm of NV08C-MCM.

LDOAIN

EN OUT

LDOD

IN

EN2

OUT1

EN1

OUT2

RF FE

VRF I/O (2.8V)

VRF (2.85V)

BB

VI/O (1.8...3.3V)

Vbat (1.2V)

Vcore (1.2V)

VRF I/O (2.8V)

VIN_BBIO

VBAT

VIN_BBC

VCC_BBC

EN_RF

EN_BBC

VIN_D

VIN_A

NV08C-MCM

LDO_SHDN

Sleep_Flag

Fig. 6. Power connection diagramm

For maximum flexibility in system integration the module has five supply inputs:

1. RF-core power supply (LDO A) ........................................................... VIN_A, 3.0…5.5 V

2. Digital core power supply (LDO D) .................................................... VIN_D, 3.0…5.5 V

3. BB digital core power supply .............................................................. VIN_BBC, 1.2 V

4. Backup power supply ......................................................................... VBAT, 1.2 V

5. I/O power supply ................................................................................ VIN_BBIO, 1.8…3.3 V.



Shown above are the nominal values of supply voltages. Please refer to the Table 6 for actual allowable

ranges.

Power for the RF front-end part is provided by integrated linear regulators LDOA and LDOD. The LDOA

provides clean analog supply voltage for RF while the LDOD is a voltage regulator for digital circuits.

Input power supply for LDOA and LDOD (V_IN_A and V_IN_D) may have voltage anywhere in the range

3.0 – 5.5V.

The digital baseband requires 1.2V as the core voltage (VCC_BBC_IN), IO voltage in range 1.8…3.3V

(VCC_BBIO), separate IO voltage 2.8V for IO signals to RF FE and a back-up supply 1.2V (VBAT) for a real-

time clock and backup RAM.

The RF front-end requires 2.8V for the analog core and 2.8V for digital IO signals.

In the user’s systems the power to NV08C-MCM may be provided in a number of different ways

depending on its specifics and availability of voltage supplies. Some of the most common cases are

described in the following sections.

2.5.1.2. Single voltage power supply

The external power supply has to be connected to the pins V_IN_A, V_IN_D, VCC_BBIO. The pin

VCC_BBC_OUT (which is the regulated 1.2V from LDOD) has to be connected to the pins VCC_BBC_IN

and VBAT.

Table 15. Voltage of external power supply

Power Supply Voltage (V)

Min Max

V_IN 3.0 3.6

Fig. 7. Power connections with single voltage power supply

LDOAIN

EN OUT

LDOD

IN

EN2

OUT1

EN1

OUT2

RF FE

VRF I/O (2.8V)

VRF (2.85V)

BB

VI/O (1.8...3.3V)

Vbat (1.2V)

Vcore (1.2V)

VRF I/O (2.8V)

VIN_BBIO

VBAT

VIN_BBC

VCC_BBC

EN_RF

EN_BBC

VIN_D

VIN_A

NV08C-MCM

LDO_SHDN

Sleep_Flag

V_IN



2.5.1.3. External power supply for digital I/O

Often the voltage of digital IO signals in the user’s system is different than V_IN. It’s convenient to have

the same digital IO voltage levels in NV08C-MCM as in the rest of the user’s system. In this case the IO

voltage supply from the user’s system shall be connected to VCC_BBIO instead of V_IN.



Min Max

V_IN 3.0 5.5

V_IO 1.65 3.6

Fig. 8. Power connections with external power supply for digital I/O

2.5.1.4. External power supply for baseband’s core

Lower power consumption may be achieved if 1.2V for the baseband is provided from an external power

supply instead of LDOD in NV08C-MCM. As 1.2V is quite common supply voltage for the core logic in

digital Ics, there is a good chance that user system has a power supply for this voltage anyway. Since

LDOD is a linear regulator the power efficiency of the power supply in the user system may be much

higher if it is a switching regulator.



Min Max

V_IN1 3.0 3.6

V_IN2 3.0 5.5

V_CORE 1.1 1.3

V_IO2 1.65 3.6

Note: 1 For case when VIN_BBIO connected to V_IN

2 For case when VIN_BBIO connected to V_IO

Fig. 9. Power connections with external power supply for baseband core

2.5.1.5. Backup power supply

The baseband contains a backup power island that is powered via the pin VBAT. The power island

contains a real-time counter and 8K backup RAM. If a backup power supply is implemented in the user

LDOAIN

EN OUT

LDOD

IN

EN2

OUT1

EN1

OUT2

RF FE

VRF I/O (2.8V)

VRF (2.85V)

BB

VI/O (1.8...3.3V)

Vbat (1.2V)

Vcore (1.2V)

VRF I/O (2.8V)

VIN_BBIO

VBAT

VIN_BBC

VCC_BBC

EN_RF

EN_BBC

VIN_D

VIN_A

NV08C-MCM

LDO_SHDN

Sleep_Flag

V_IN

V_IO

LDOAIN

EN OUT

LDOD

IN

EN2

OUT1

EN1

OUT2

RF FE

VRF I/O (2.8V)

VRF (2.85V)

BB

VI/O (1.8...3.3V)

Vbat (1.2V)

Vcore (1.2V)

VRF I/O (2.8V)

VIN_BBIO

VBAT

VIN_BBC

VCC_BBC

EN_RF

EN_BBC

VIN_D

VIN_A

NV08C-MCM

LDO_SHDN

Sleep_Flag

V_IN

V_IO

V_CORE



system, then the power for VBAT shall be provided from the backup supply. In this case when main

power supply goes off, the RTC and backup RAM remain powered providing necessary data for faster

start of receiver on power on.

The drawing 8 shows the power connections for the case when the supply voltages for baseband core,

backup and IO are provided by user’s system.



Min Max

V_IN1 3.0 3.6

V_IN2 3.0 5.5

V_CORE 1.1 1.3

V_IO2 1.65 3.6

V_BU 1.1 1.3

Note: 1 For case when VIN_BBIO connected to V_IN.

2 For case when VIN_BBIO connected to V_IO.

Fig. 10. Power connections with external power

supplies for baseband core, IO and backup

2.5.1.6. Vbuf Power Supply

Vbuf supply voltage should be chosen in accordance to VIN_BBIO. Refer to the Table 19 to find

recommended connection of Vbuf power supply for different VIN_BBIO values.

Table 19. Connecting Vbuf

VIN_BBIO voltage value Recommended Vbuf connection

3.3V Connect to VCC_RFIO

2.5V Connect to VCC_RFIO or VIN_BBIO

1.8V Connect to VIN_BBIO

2.5.1.7. Decoupling capacitors

External decoupling capacitors must be connected to pins of NV08C-MCM according to the Table 20.

Table 20. Connecting external capacitors

Pin Recommended

Capacitors Note

VIN_A 1 uF ceramic

VIN_D 1 uF ceramic

VСС_RF 1 uF ceramic

VCC_RFIO 1 uF ceramic

VCC_BBC 1 uF ceramic In case if LDO D is used for baseband power supply

VIN_BBC 1 uF ceramic

LDOAIN

EN OUT

LDOD

IN

EN2

OUT1

EN1

OUT2

RF FE

VRF I/O (2.8V)

VRF (2.85V)

BB

VI/O (1.8...3.3V)

Vbat (1.2V)

Vcore (1.2V)

VRF I/O (2.8V)

VIN_BBIO

VBAT

VIN_BBC

VCC_BBC

EN_RF

EN_BBC

VIN_D

VIN_A

NV08C-MCM

LDO_SHDN

Sleep_Flag

V_IN

V_IO

V_CORE

V_BU



Pin Recommended

Capacitors Note

VIN_BBIO 1 uF ceramic

VBAT 1 uF ceramic

2.5.1.8. Typical power consumption

The table below shows the average consumption of the module in continues tracking and Time-to-Time-

Fix modes. Two power connection options are compared – the single voltage power supply (refer to Fig.

7) and two voltage power supply (refer to Fig. 9). Note that in both cases VCC_BBIO may be either

connected to V_IN or to external supply V_IO. The power consumption via VCC_BBIO is typically small

compared to consumption by RF FE and baseband core.

Table 21. The average consumption of the module in a mode Time-to-Time-Fix

Mode Power supply options

Single voltage 3.3V Two voltages, 3.3V and 1.2V

Time-to-time fix @1s, GPS/GALILEO only 26 mW 16 mW

Time-to-time fix @1s, GPS/GLONASS/GALILEO

36 mW 20 mW

Tracking&navigation, GPS/GALILEO only < 180 mW < 100 mW

Tracking&navigation, GPS/GLONASS/GALILEO

< 250 mW < 150 mW

2.5.2. Reset

The Reset_n pin of NV08C-MCM must be driven by user system. The NV08C-MCM may only be released

from Reset state at least after 1 ms after all power supply voltage values are within ranges specified in

Table 15 – Table 18. Vbat power supply is optional and may not be under control of reset electronics.

NOTE: The active level of Reset signal is HIGH for Engineering Samples while Production parts accept

LOW level of Reset signal.

2.5.3. Antenna

The module has two inputs for connecting external antennas:

RF_IN for connecting an active antenna

LNA_IN for connecting a passive antenna.

By default the active antenna input is selected and active antenna power supply voltage 2.65 V is

applied to the active antenna input. If automatic input selection is activated by configuration setting

(see PIO 14 settings in Table 23) an antenna input is selected automatically depending on the active

antenna supply current. If there is no current flowing to the active antenna then the passive antenna

input is selected by activating corresponding LNA, otherwise (if IANTBIAS > 1.1mА) the active antenna input

(pin RF_IN ) is activated.

The antenna input selection configuration may be overridden by a command from the user’s system.



The figures below show antenna connection options. The option A does not require any additional parts

in the user system. The option B is recommended for the user applications, in which an interference

with out of band noise is possible – for example for cases where the antenna is located close the

transmitting antennas of GSM, CDMA, WiFi, WiMAX, Bluetooth and others. In such case the additional

RF filter is recommended between the antenna and the module.

NV08C-MCM

RF_IN

LNA_IN

VANT

A.

0402, 47nH

0201,

22pF

B.

NV08С-MCM

RF_IN

LNA_IN

VANT

0201,

22pF

0402, 47nH

Fig. 11. Antenna connecting options

In some cases (depending on the parameters of the antenna) additional impedance matching elements

may be required in the path from the antenna to the module. The user is advised to follow the antenna

producer recommendations in such cases.

It’s very important to choose a proper antenna. The active antenna with high gain and wide passband

may reduce the quality of the signal reception due to interference with in-band and out of band noise. A

passive antenna, especially the one with a linear polarization, having low gain or poorly matched with

the input of module may decrease the sensitivity.

The recommended parameters of active antenna are the following:

GPS / GLONASS L1, bandwidth 35 MHz @ fc = 1590 MHz

Gain including the attenuation in the cables 20±2 dB

Antenna noise factor <2 dB

Suppression of out-of-band signals: at least 35dB @ fc ± 70 MHz.

If an active antenna requires input voltage higher than 2.65 V an external power supply circuitry may be

implemented as shown on Fig. 12. However this connection will not allow the internal automatic

antenna input selection as well as shortcut protection to work properly.



NV08C-MCM

C1

100 nF

RF_IN

22 pF

RF_ING1

L1

47 nH

VANT (3...12) V

RFC2

Fig. 12. Active antenna connection to external power supply



2.5.4. RTC clock

A 32,768Hz clock is required for operation of the real-time clock in baseband. This clock signal is also

needed for some of power saving modes. The 32,768Hz clock may be generated with external crystal

oscillator connected to pins XTAL1 and XTAL2 of NV08C-MCM. The other way is to drive the pin XTAL1

with externally generated 32,768Hz clock signal.

The input clock signal 32,768Hz is optional. However, it is recommended to provide this signal for the

module if the hot start and/or the periodic mode (Time-to-Time Fix) are required.

Fig. 13 shows the schematics for connecting external crystal oscillator 32,768Hz.

XTAL1 XTAL2

Rf

C1 C2

Fig. 13. Circuit for connecting crystal oscillator 32,768Hz

The recommended values for crystal oscillators DT-26/DT-38 of DAISHINKU CORP are the following: C1=10pF, C2=10pF, Rf=10MΩ. The values are not matching constants. For matching constants, request the oscillator maker to perform matching check. The oscillator is running on fundamental wave. Fig. 14 shows the schematics for connecting external generator 32,768Hz.

Fig. 14. Circuit for connecting external generator 32,768Hz

Digital signal from generator

Rf=10M

XTAL1 XTAL2



2.5.5. Digital I/O Interfaces

The NV08C-MCM provides two UART interfaces, two SPI interfaces, two-wire interface (I2C compatible)

and GPIO interface.

IO interfaces in NV8CD are connected to external devices via 16 pins P15 – P0. Use of P15-P0 is

programmable (see the protocol description).

Table 22. Default configuration for pins P15 – P0

Pin Pull Up / Pull Down on

reset Description

P15 PU

Configuration Pins (See Table 23) P14 PU

P13 PD

P12 PD

P11 PD

P10 PU UARTA_TXD. UART serial data output, port A

P9 PD UARTA_RXD. UART serial data input, port A

P8 PU UARTB_TXD. UART serial data output, port B

P7 PD UARTB_RXD. UART serial data input, port B

P6 PU TimeMark. External time synchronization input

P5 PU 1 PPS output

P4 PU SPIB_CK. SPI clock, port B

P3 PU SPIB_CS2. SPI chip select 2, port B

P2 PD SPIB_MO. SPI data output, port B

P1 PD SPIB_MI. SPI data input, port B

P0 PU ANTFLAG

Notes:

1. The pins not used in the user’s system for interfaces UART, SPI, PPS, TimeMark can be programmed as GPIO.

2. Pins P6, P5 can be used as a two-wire interface (I2C compatible). In this case, the pins will be

configured as shown in the table below:

P6 PU TW_SCL. Two-wire interface, the synchronization

P5 PU TW_SDA. Two-wire interface, data

3. Pin P6 in Engineering Samples is used as GPIO at power start. If P6 is LOW after power start then it is

expected that a FW Patch is going to be downloaded to the module within 0.5 sec. If FW Patch is not

being received within 0.5 sec then the module tries to download the FW Patch via SPI and only then

starts initialization procedure from internal MaskROM. After initialization the P6 pin is converted to as

TimeMark or TW_SCL as specified in the Table above.



Table 23. P11-P15 Configuration settings

GPIO Function PIO value Description

P15 Settings saving in

BRAM

P15 = 1 (default) Save settings

P15 = 0 Do not save settings

P14

FW Patch download

via SPI A

And selection of

Antenna input

P14 = 1 (default)

P15, P13, P12, P11 used only for

configuration purpose

Only active antenna input is

selected

P14 = 0

P15, P13, P12, P11 are configured

as SPI and will be used for FW

Patch download from external SPI-

FLASH

Automatic antenna input selection

activated (see 1.3)

PIO13,

PIO12,

PIO11

UART port

configuration

P13 = 0 (default)

P12 = 0 (default)

P11 = 0 (default)

UART A – 115200 NMEA

UART B – 115200 BINR

P13 = 0

P12 = 0

P11 = 1



P13 = 0

P12 = 1

P11 = 0



P13 = 0

P12 = 1

P11 = 1



P13 = 1

P12 = 0

P11 = 0



P13 = 1

P12 = 0

P11 = 1


UART B – 4800 RТСМ

NMEA_time_sym = 2

P13 = 1

P12 = 1

P11 = 0


UART B – 4800 RТСМ

NMEA_time_sym = 2

P13 = 1

P12 = 1

P11 = 1





3. Software and Protocols Reference

3.1. Data protocol and configuration

The module supports the exchange with an external Host-processor through the following protocols:

BINR (own binary protocol)

NMEA 0183

RTCM 104.

By default, the module is configured to exchange:

UART A: Protocol NMEA, 115’200 bps

UART B: Protocol BINR, 115’200 bps.

Note – Any port may be configured for receiving differential corrections data in RTCM format. In

this case it is still possible to control the module by adding of NMEA-commands to RTCM stream

since the module SW is able to sort out these data types.

Other basic settings of the module:

navigation mode: GLONASS / GPS

SBAS data: accounted automatically

RAIM: automatic

Assisted data: accounted automatically

issuing navigation data rate: 1 Hz

NMEA messages: GSA, RMC, GGA, GSV, GBS.

The basic settings may be changed by any of the following means:

choosing one of the preset configurations by a certain code on GPIO inputs (refer to Table 23)

protocol commands via ports

downloading a software patch (see 3.4) via SPI or UART (the patch shall be developed by the

product support services)

at the hardware level: by programming a one-time programmable during the module production

(only available when ordering large quantities of modules).

3.2. Low power battery mode

The module has a sophisticated system to reduce the power consumption. Some of supported energy

saving methods are the following:

automatic clock gating of currently unused subsystems (such as the fast search unit, unused

correlation channels, the interface blocks)

possibility to completely turn off the power for one of the analog channels

the Time-to-Time Fix cyclical mode providing an automatic transition to a very low power sleep

mode (300 – 400uA) once the navigation solution is obtained and automatic "wake up" at user-

defined time period



the Push-to-Fix mode, which provides an automatic "fall asleep" once the navigation solution is

obtained with a "wake up" by a signal from the user system.

WARNING! Time-to-Time Fix and Push-to-Fix modes require the external crystal 32,768 Hz and backup

supply on VBAT pin.

3.3. Assisted GNSS

The module supports the use of external assisted data for quick navigation solutions on power up. Such

data can be extracted by the user system from GSM, CDMA or the Internet and loaded into the module

via the BINR or NMEA protocols. The assisted data in a compact form (as a ready binary data file) is

available for download on the support site.

3.4. Extension of the basic functionality, Patch technology

It is possible to extend the basic functionality of the module by downloading new codes from an

external device into a reserved area.

The Patch may be downloaded through the following external devices:

SPI Flash Memory (or SPI Serial EEPROM) connected via SPI A or SPI B interfaces.

Host-system sending the Patch Code via UART or SPI (emulation of SPI Flash).

The users cannot develop the Path by themselves. Please contact the technical support if there is a need

to expand the base functionality of the module due to requirements of specific applications.

The drawing below shows how the SPI Flash memory shall be connected to the module for the Patch

download. There are 2 options – connect it to the SPA A or SPI B interfaces.

NV08C-MCM

VIN_BBIO

P15

P13

P12

P11

SPI-FLASH

Vcc

CLK

SI

SO

CS

V_IO

SP

I A

P14

NV08C-MCM

VIN_BBIO

P4

P2

P1

P3

SPI-FLASH

Vcc

CLK

SI

SO

CS

V_IO

SP

I B

Fig. 15. Options for connecting the module to the SPI-FLASH

If SPI Flash is connected to the module then it is also possible to store in it user settings and other data

including the navigation track records and raw data. The settings may be activated automatically on

power up and the data can be read from FLASH memory at any time.

SPI-FLASH must be at least 512-Kbit and must support JEDEC Standard Manufacturer and Device ID Read

command (f.e., Atmel AT25F512B; ST M25P05; Numonix M25P05). SPI Serial EEPROM must be at least

512-Kbit, 16-bit address (f.e., Atmel AT25512; ST m95512-DR).

The PatchCode can be downloaded via UART port (see Fig. 16). To activate the transaction the following

message should be sent to the device in NMEA or BINR format:



NMEA: $POPRL,B*3F\r\n

BINR: 0х10 0х01 0х52 0х45 0х4С 0x4F 0x41 0x44 0x5F 0x42 0x10 0x03

As a reply to this message the module will turn to a programming mode and will continuously output

symbols 0x43 (symbol “C” in ASCII format). The user system has to download the PatchCode binary code

by X-modem protocol. As soon as the whole PatchCode is received the module will store the PatchCode

in ROM and restart to activate the upgraded FW.

NV08C-MCM

TX

RX

USER

System

RX

TX

UA

RT

A /

UA

RT

B

Fig. 16. Connecting the module to a User system for PatchCode downloading

3.5. Dead reckoning

The module supports the Dead Reckoning mode by extending the basic functionality by using the Patch

technology. Please contact technical support for more information.



APPENDIX 1

gps/glonass/galileo/compass single-chip receiver …€¦ · the galileo and compass as well as...

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