grinding induced subsurface cracks in silicon wafers mtm edited by dean/pei... · grinding induced...

International Journal of Machine Tools & Manufacture 39 (1999) 1103–1116

Grinding induced subsurface cracks in silicon wafers

Z.J. Pei*, S.R. Billingsley, S. MiuraMEMC Electronic Materials, Inc., St Peters, MO 63376, USA

Received 26 August 1998

Abstract

Silicon wafers are used for production of most microchips. Various processes are needed to transfer asilicon crystal ingot into wafers. To ensure high surface quality, the damage layer generated by each ofthe machining processes (such as lapping and grinding) has to be removed by its subsequent processes.Therefore it is essential to assess the subsurface damage for each machining process. This paper presentsthe observation of subsurface cracks in silicon wafers machined by surface grinding process. Based oncross-sectional microscopy methods, several crack configurations are identified. Samples taken from differ-ent locations on the wafers are examined to investigate the effects of sample location on crack depth. Theeffects of grinding parameters such as feedrate and wheel rotational speed on the depth of subsurface crackhave been studied by a set of factorial design experiments. Furthermore, the relation between the depth ofsubsurface crack and the wheel grit size is experimentally determined. 1999 Elsevier Science Ltd. Allrights reserved.

Keywords:Ceramic machining; Ductile regime grinding; Grinding damage; Material removal; Semiconductormaterials; Silicon

1. Introduction

Single crystal silicon, the most important building block of semiconductors, is found in everytype of microelectronic application, including computer systems, telecommunications equipment,automobiles, consumer electronics products, industrial automation and control systems, and ana-lytical and defense systems. Single crystal silicon wafers, used as substrate materials for

* Corresponding author. Present address: Parametrics, Inc., PCI R&D Division, 221 Crescent St., Waltham, MA02453, USA. Tel.:1 1-781-899-2719; fax:1 1-781-894-5785; e-mail: [email protected]

0890-6955/99/$ - see front matter 1999 Elsevier Science Ltd. All rights reserved.PII: S0890-6955(98)00079-0

1104 Z.J. Pei et al. / International Journal of Machine Tools & Manufacture 39 (1999) 1103–1116

microelectronic chips, must satisfy stringent requirements for flatness, surface integrity and con-tamination control.

The process of turning single crystal silicon ingot into wafers is referred to wafering. As shownin Fig. 1, a typical wafering process flow consists of (1) slicing, to slice single crystal siliconingot into wafers of thin disk shape; (2) edge profiling, or chamfering, to chamfer the peripheraledge portion of the wafer; (3) flattening (lapping or grinding), to flatten the surface of the wafer;(4) etching, to chemically remove processing damage of the wafer without introducing furthermechanical damage; (5) rough polishing, to obtain a mirror surface on the wafer; (6) fine polishing,to obtain final mirror surface; and (7) cleaning, to remove the polishing agent or dust particlesfrom the wafer surface [1–3].

In each of the wafering processes, one major concern is to obtain the wafer surface withoutresidual damage or with certain damage which can be removed by subsequent processes. There-fore, it is very important to assess the damage left by each wafering process.

Numerous methods have been used by various investigators to measure the surface/subsurfacedamage in machining of brittle materials. These methods include angle polishing and step etching[4], “dimpling” [5], bonded-interface technique [6,7], cross-sectional microscopy [8–10], scanningelectron microscopy [11], ultrasonic measurement [12], optical scattering method [13] and X-ray topography [4]. Some of these techniques with additional ones are reported in three reviewpapers [14,15,22].

Several techniques have been used to observe/measure the machining induced subsurface cracksin silicon wafers: angle-polishing [16,17], step-polishing [18], X-ray diffraction [19], step etchingplus scanning infrared depolarization [20], SEM photograph [21] and etching method [22]. How-ever, it is very difficult for these techniques to provide information about subsurface crack con-figurations. Cross-sectional transmission electron microscopy investigations were conducted to

Fig. 1. Typical wafering process flow.

1105Z.J. Pei et al. / International Journal of Machine Tools & Manufacture 39 (1999) 1103–1116

reveal the subsurface cracks [16,23,24] but the full spectrum of subsurface crack configurationswas not provided by their reports.

In order to assess the depth and nature of grinding induced subsurface cracks in silicon wafers,it is desirable to categorize all the possible crack configurations. This knowledge may help todevelop models that can explain the formation of different subsurface cracks. However, to ourbest knowledge, the full range of crack configurations are not available in the current literature.

The objectives of this study include (1) to obtain the full spectrum of the subsurface crackconfigurations in ground single crystal silicon wafers based on cross-sectional optical microscopymethods; and (2) to investigate the effects on the depth of subsurface cracks of grinding parameterssuch as feedrate, wheel rotational speed and wheel grit size.

The paper is organized into four sections. The first section is this introduction. In Section 2,the experimental procedure is described and Section 3 presents and discusses the results withconclusions being drawn in Section 4.

2. Experimental procedure

2.1. Surface grinding of silicon wafers

Fig. 2 illustrates the surface grinding process. Grinding wheels are resin-bond diamond cupwheels. The workpiece (wafer) is held by the porous ceramic chuck using vacuum. The axis ofrotation for the grinding wheel is offset a distance of the wheel radius relative to the axis ofrotation for the wafer. During grinding, the grinding wheel and the wafer rotate about its ownaxis of rotation simultaneously, and the wheel is fed towards the wafer along its axis.

The shape of the ceramic chuck can be dressed to a conic shape with a very small angle (see

Fig. 2. Illustration of wafer surface grinding.


Fig. 3). When the wafer is held on the chuck, it elastically deforms to the chuck’s conic shape,thus ensuring that the grinding wheel only contacts half of the wafer at any given instant.

By adjusting the angle between the wheel axis of rotation and the wafer axis of rotation, theshape of the ground wafer can be controlled. With a larger angle, the wafer tends to have a convexshape. With a smaller angle, the wafer tends to have a concave shape. This is also illustrated inFig. 3.

Single crystal silicon wafers of 150, 200 and 300 mm in diameter, with (100) plane as majorsurface are used for this investigation. Resin bonded diamond grinding wheels with different gritsize (mesh #360, #1200, #2000, #4000) are used. The surface grinders used include Disco surfacegrinder (DFG840, Disco Corporation, Tokyo, Japan) and G&N surface grinder (Nanogrinder,Grinding Machines Nuernberg, Inc., Erlangen, Germany).

2.2. Sample preparation

The sample preparation consists of four general steps. Cleaving, sanding, polishing and etching.A rectangular sample with size of 20 mm3 30 mm is taken from the ground wafer. If cleaving

along the (110) plane, the resulting cross-section is generally straight, flat and perpendicular tothe ground surface (see Fig. 4).

The surface of the cleaved sample is then wet-sanded on a succession of silicon carbide abrasivepapers with #240, #360, #400 and #600 mesh sizes. Enough material needs to be removed fromthe interested cross-section to ensure that any damage incurred during cleaving is removed.

The test surface is then further refined by polishing on fixed diamond abrasive films with gritsize of 15, 6, 3, 1 and 0.5mm. The polishing is accomplished by fixing the sample to a jig (TripodPolisher SEM X-Sectioning Kit, model #590, South Bay Technology, San Clemento, California)so that the polished surface will maintain flat and perpendicular to the ground surface.

The test surface is placed into the “Yang” solution [25] (H2O:HF49%:Cr2O3 5 500 ml:500ml:75 g) for 5 s at room temperature. This will make the subsurface cracks more discernable for

Fig. 3. Wafer shape controlling in wafer surface grinding.


Fig. 4. Cleaving a sample from the wafer.

microscopy observation. The “Yang” solution has been used by other investigators in preparingsilicon samples [22,3,17]. The etched sample is immediately flushed with water to stop the reac-tion.

The sample preparation process is very critical to obtain the true signal. The sample preparationprocess itself can generate cracks if not properly done. The characteristics of these cracks include:(1) they are not randomly distributed in the sample; (2) they can be seen on samples preparedfrom non-ground wafers like etched or polished wafers (these wafers are crack-free); and (3) ifthe samples are polished with minimum down force and enough removal these types of crackswill disappear whereas the grinding induced subsurface cracks continue to be revealed.

2.3. Microscopy observation

After the sample is prepared, it is ready for observation under optical microscope (Carl Zeissmicroscope, Dynamit Nobel Silicon, Sunnyvale, CA) with an image analysis system (Encodermodel VIA-100K and VIA Controller model KS-30, Boeckeler Instruments, Inc., Tucson, AZ).Some samples are also observed under Nomarski microscope (Optiphot 300, Nikon Inc., Melville,NY) and AFM (Atomic Force Microscope) (Dimension 5000, Digital Instruments, Santa Bar-bara, CA).

A cross-section picture of a sample is shown in Fig. 5. The ground surface is on the top ofthe photograph. Below the ground surface subsurface cracks can be seen. The left-hand side ofthe photograph is the bulk silicon material which is crack-free.

3. Results and discussion

3.1. Subsurface crack configurations

Fig. 6 shows different configurations of subsurface cracks observed in ground silicon wafers.Median, radial and lateral cracks have been reported as the major crack types when machining

brittle materials [26–28] as shown in Fig. 7. In the cross-section pictures shown in Fig. 6, the


Fig. 5. Unground surface vs ground surface.

median and lateral cracks (a and b) are observable. The “umbrella” cracks (c) can be consideredconsisting of two lateral cracks and one median crack. However, the radial cracks are not observ-able by this method. This is because the samples are taken in such a way that the observed surfaceis perpendicular to the grinding direction while the radial cracks are also perpendicular to thegrinding direction.

The “chevron”, “branch” and “fork” cracks, shown in Figs. 6(d), (e), (f) and 8, are specific to(100) single crystal silicon wafers. They do not exist for polycrystalline materials. For (100)silicon wafers, (111) planes form about 45° with the ground surface. The atomic density of siliconin the (111) plane is the highest and (111) planes are the planes of lowest fracture energy. There-fore, it is easier for the cracks to propagate along (111) planes.

Observations have also been made on the as-ground surfaces. Figs. 9 and 10 are microscopypictures taken on AFM (Atomic Force Microscope) and Nomarski microscope. These surfaceslook “fracture-free” or “ductile”. However, cross-sectional microscopy methods still reveal subsur-face cracks. This is a very important observation. It points out that when machining brittlematerials like silicon, whether the machining is in ductile regime can not be judged by onlyobserving the machined surface.

3.2. Effects of sample location

Crystal orientation dependence of subsurface damage for single diamond tool machined siliconwafers has been reported by Blake and Scattergood [21], Blackley and Scattergood [29] andMchedlidze et al. [23]. For (100) single crystal wafers, the damage is more severe when cuttingdirection is neark110l [21,29]. However, at the starting region where the diamond tool is deepen-ing into the surface, the larger damage fork100l directions is observed [23].


Fig. 6. Various crack configurations.

This section is to answer the following question: on a ground silicon wafer, is the damageuniform across the whole wafer? If the damage is not uniform, the location with deepest damageneeds to be found and the sample should be taken from this location for the test wafer.

For this test, samples are taken from 11 slices of ground wafers. The wafers used are 300 mmin diameter. To ensure that no other possible factors affect the measured depth of crack, all the


Fig. 7. Grinding-induced crack system.

Fig. 8. AFM picture of a “Fork” crack.

test wafers have been lapped with 7mm Al3O2 abrasive slurry, removing 50mm from each sideof the wafers.

The grinding wheel has #1200 mesh. Only one side of the wafers is ground and the grindingremoval is 15mm. During grinding, deionized (purified) water is being used for cooling thegrinding wheel and the wafer surface. The other grinding parameters are shown in Table 1.


Fig. 9. AFM picture of ground surface (#2000 mesh wheel).

Fig. 10. Nomarski microscopy picture of ground surface (#2000 mesh wheel) (| 500 3 ).


Table 1Effects of location on depth of subsurface crack

Wheel speed Chuck speed Feedrate Depth of subsurface crack (mm)(rev s−1) (rev s−1) (mm s−1)

Location 1 Location 2 Location 3 Location 4

25.00 0.33 0.25 7.22 6.28 6.28 6.5525.00 0.33 0.25 5.47 7.63 6.82 5.1656.67 0.33 0.25 7.63 6.55 6.15 7.0925.00 1.33 0.25 8.84 7.63 5.61 6.2856.67 1.33 0.25 6.15 7.42 8.17 7.7625.00 0.33 0.58 6.95 6.82 8.44 5.8825.00 0.33 0.58 9.52 8.44 9.11 7.4956.67 0.33 0.58 6.82 6.82 8.57 8.5725.00 1.33 0.58 8.17 8.30 6.55 6.4256.67 1.33 0.58 5.74 6.95 6.69 6.4240.83 0.83 0.42 5.88 5.07 6.06 6.01

Fig. 11. Four samples from four different locations.

Four samples are taken from each of the 11 wafers at four different locations (Fig. 11). Foreach sample, the deepest subsurface crack is measured and the data is recorded in Table 1.

Pairedt-tests [30] are conducted for each pair of these four locations. The result is shown inTable 2. At the significance levela 5 0.2, the hypothesis that there is no difference between the

Table 2P-values for the pairedt-tests on effects of location

P-value

Location 2 Location 3 Location 4

Location 1 0.90 0.99 0.33Location 2 0.90 0.34Location 3 0.20


locations can not be rejected. In other words, the differences between these four locations arenot significant.

There can be at lest two explanations for the result:

1. The depth of grinding induced subsurface cracks has no crystal orientation dependence, sincesurface grinding of silicon wafers is different from single diamond tool machining.

2. The depth of grinding induced subsurface cracks has crystal orientation dependence, but thedifference signal is too small for the cross-sectional microscopy method to pick up.

Therefore a sample can be taken from any location on the wafer and the subsurface crack depthmeasurement on this sample is representative of this wafer. This finding is the basis for the testsdescribed in the following two sub-sections.

3.3. Effects of grinding parameters

A set of full factorial design experiments are conducted to study the effects of grinding para-meters on the depth of crack. Under each condition, two wafers are ground. Samples are takenform location 1 for all the wafers. The grinding parameters under study are: wheel rotationalspeed, chuck rotational speed and feedrate. The values of the two levels for each factors areshown in Table 3. The other conditions are the same as in Section 3.2.

Again, the deepest subsurface crack on each sample is measured. The depth of crack data arepresented in Table 3.

Table 4 is the ANOVA (analysis of variance) table [30] for the experiment. At the significancelevel a 5 0.1, the critical value for each of theseF-ratios is f0.1, 1, 8 5 3.46. That is to say, atthe significance levela 5 0.1, none of the main effects neither of their interactions is significant.In other words, within the test range, the grinding parameters have no significant effects on thecrack depth.

Table 3Two-level three-factor factorial design experiments

Wheel speed Chuck speed Feedrate Subsurface crack depth (mm)(rev s−1) (rev s−1) (mm s−1)

Wafer 1 Wafer 2

25.00 0.33 0.25 7.22 5.4756.67 0.33 0.25 7.63 5.4725.00 1.33 0.25 8.84 6.5556.67 1.33 0.25 6.15 6.2825.00 0.33 0.58 5.74 9.5256.67 0.33 0.58 6.82 5.7425.00 1.33 0.58 8.17 7.9056.67 1.33 0.58 5.74 6.28


Table 4ANOVA table for factorial design experiments

Source of variance Sum of squares Degrees of freedom Mean square F-ratio

Wheel speed (A) 5.405 1 5.405 3.002Chuck speed (B) 0.330 1 0.330 0.183Feedrate (C) 0.330 1 0.330 0.183AB 1.392 1 1.392 0.773AC 1.102 1 1.102 0.612BC 0.193 1 0.193 0.107ABC 0.255 1 0.255 0.141Error 14.404 8 1.800Total 23.414 15

3.4. Relation between grit size and crack depth

The wheels with #360, #2000 and #4000 mesh are used on Disco DFG840 surface grinder togrind wafers with 150 and 200 mm in diameter. The wheel with #1200 mesh is used on G&Nsurface grinder to grind wafers with 300 mm in diameter. Based on the findings from previoustwo sections, sample locations and grinding parameters have no significant effects on subsurfacecrack depth. Therefore, it is viable to use wafers with different diameters to obtain the relationbetween grit size and crack depth.

Fig. 12 is the experimentally determined relation between the crack depth and the grit sizeused in the grinding wheel for silicon wafers. It can been seen that as the grit size increases, thedepth of subsurface crack increases. As the rule of thumb, the crack depth is approximately halfof the grit size.

Although this study is the first of the kind (measuring the depth of subsurface cracks from thecross-section), the measured relationship between the depth of grinding induced subsurface cracksin silicon wafers and the grit size of the grinding wheel is consistent with other researchers’observation via different approaches. Through X-ray topography, angle polishing and step pol-

Fig. 12. Relation between grit size and maximum depth of cracks.


ishing, Ohmori and Nakagawa [4] reported crack depths of 1.3 and 0.4mm for #2000 and #8000wheels respectively. Tonshoff et al. [17] used the method of taper polishing plus Yang-baseetching and reported that the subsurface damage increases with increasing grain size diameter.

4. Conclusions

To turn a silicon crystal ingot into wafers with satisfactory quality, a sequence of machiningprocesses will be needed. The subsurface damage induced by every machining process has to beremoved by its subsequent processes. Therefore, in order to develop a process flow for waferingprocess and to choose the material removal for each individual processes, it is very important toknow the subsurface damage induced by each machining process. Such knowledge for surfacegrinding of silicon wafers is provided by this study.

The conclusions of this study are:

1. For (100) silicon wafers, grinding induced subsurface cracks exhibit 6 configurations: median,lateral, “umbrella”, “chevron”, “branch” and “fork”.

2. Subsurface cracks may exist under those ground surfaces which look “fracture-free” bymicroscopy observation of ground surfaces.

3. The subsurface crack depth is independent on the location on the ground wafer.4. Within the tested range, the wheel rotational speed, chuck rotational speed and feedrate do not

have significant effects on the subsurface crack depth.5. The depth of subsurface crack on ground silicon wafers is approximately equal to half of the

diamond grit size used in the grinding wheel.

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