ibm capi：概要 (an overview of ibm capi)
TRANSCRIPT
IBM CAPI概要
http://openpowerfoundation.org/presentations/accelerator-for-power/
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Overview
http://www.nallatech.com/wp-content/uploads/IBM_CAPI_Users_Guide_1-2.pdf
一見すると、CPUとFPGAだがFPGAの中に
ある
PSLと
POWER8の中にある
CAPPが重要
IBM CAPIとは
Coherent Accelerator Processor Interface
The Coherent Accelerator Processor Interface (CAPI) is a general term for the infrastructure of attaching acoherent accelerator to an IBM POWER® system. The main application is executed on the host processorwith computation-heavy functions executing on the accelerator. The accelerator is a full peer to the hostprocessor, with direct communication with the application. The accelerator uses an unmodified effectiveaddress with full access to the real address space. It uses the processor’s page tables directly with pagefaults handled by system software.
Coherent Accelerator Processor Interface
http://www.nallatech.com/wp-content/uploads/IBM_CAPI_Users_Guide_1-2.pdf
POWER8(CPU)は、MMUで仮想アドレス => 物理アドレスにしてメモリにアクセス
POWER8とAcceleratorのメモリ共有
Acceleratorは、PSL/PCIe/CAPPで仮想アドレス => 物理アドレスにしてメモリにアクセス
http://openpowerfoundation.org/wp-content/uploads/2015/03/Finamore-Nick_OPFS2015_Altera_031215_final.pdf
Host Memory & Device Memory
Altera SDK for OpenCL
http://openpowerfoundation.org/wp-content/uploads/2015/03/Finamore-Nick_OPFS2015_Altera_031215_final.pdf
Coherent Memory
Xeon - QPI − FPGACCI-extended
コピー不要 &デバイスドライバ不要
メモリ移動 メモリ移動終了待ち起動
終了待ち起動
http://www.nallatech.com/wp-content/uploads/Ent2014-CAPI-on-Power8.pdf
Hardware
AFU
POWER8とFPGAの関係
CAPP
PCIe FPGA
PHB : PCIe Host BridgeCAPP : Coherently Attached Processor Proxy
PSL : Power Service LayerAFU : Accelerator Function Unit
PHB
CPU
POWER8
PSL
AFU
PSL : POWER Service Layer
CAPP
PCIe FPGA
PSLは、IBMが開発
CAPI対応FPGAボードベンダから提供される (IBMから供給)
PHB
CPU
POWER8
PSL
PSL : POWER Service Layer
The PSL provides the translation and interrupt services that the AFU needs.
This is what the kernel interacts with. For example, if the AFU needs to read a particular effective address, it sends that address to the PSL, the PSL then translates it, fetches the data from memory and returns it to the AFU. If the PSL has a translation miss, it interrupts the kernel and the kernel services the fault. The context to which this fault is serviced is based on who owns that acceleration function.
https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/plain/Documentation/powerpc/cxl.txt
AFU
AFU : Accelerator Function Unit
CAPP
PCIe FPGA
AFUは、ユーザが開発
HDL(Verilog HDL/VHDL)でなく、HLSなどを使ってC/C++でも可能
PHB
CPU
POWER8
PSL
Software
AFU
libcx
PCIe FPGA
Applicationは、libcxl (ユーザ空間) API =>Linux CXLデバイスドライバ経由でFPGAのAFUにアクセスする
FPGA(AFU)独自のデバイスドライバは不要
PSL
CXL
Application
POWER8
libcxl
Coherent Accelerator Interface
https://github.com/ibm-capi/libcxl
CXL : linux device driver https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/plain/Documentation/powerpc/cxl.txt
libcxl API
open : デバイスのオープン
ioctl : CXL_IOCTL_START_WORK
CXL_IOCTL_GET_PROCESS_ELEMENT
mmap : mmio空間へのアクセス
read : AFUからのイベントを読み込む
AFU
Application
PCIe FPGA
Applicationは、libcxl (ユーザ空間) API =>Linux CXLデバイスドライバ経由でFPGAのAFUにアクセスする
FPGA(AFU)独自のデバイスドライバは不要
PSL
CXL
Application
POWER8
libcxl
Applicationのテンプレートコード
// AFUの確認
struct cxl_afu_h *afu_h = cxl_afu_next(NULL);// AFUを獲得
afu_h = cxl_afu_open_h(afu_h,CXL_VIEW_DEDICATED);// AFUの起動
cxl_afu_attach(afu_h, (uint64_t) wed);// 必要ならMMIOをマップ
cxl_mmio_map(afu_h, CXL_MMIO_BIG_ENDIAN);
// ここで何かをやる
cxl_mmio_unmap(afu_h); // MMIOをアンマップ
cxl_afu_free(afu_h); // AFUを開放
CAPI Solution FLow
http://www.nallatech.com/wp-content/uploads/Ent2014-CAPI-on-Power8.pdf