ieee vlsi titles 2012 c
TRANSCRIPT
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S.NO PROJECT TITLE
Simulation Simulation
1. A Novel Technique for Improving Hardware Trojan Detection
and Reducing Trojan Activation Time.
Modelsim
&
Xilinx
Spartan 3E
2. High-Speed Low-Power Viterbi Decoder Design for TCM
Decoders.
Modelsim
&
Xilinx
Spartan 3E
3. Area-Efficient VLSI Implementation for Parallel Linear-Phase
FIR Digital Filters of Odd Length Based on Fast FIR
Algorithm.
Modelsim
&
Xilinx
Spartan 3E
4. A novel all-digital multichannel multimode RF Transmitter
using delta-sigma modulation
Modelsim
&
Xilinx
Spartan 3E
5. Highly scalable parallel arithmetic coding on Multi-core
processors using LDPC codes
Modelsim
&
Xilinx
Spartan 3E
6. Pipelined parallel FFT architectures via Folding transformation Modelsim
&
Xilinx
Spartan 3E
7. Robust secure scan design against scan-based Differential
cryptanalysis
Modelsim
&
Xilinx
Spartan 3E
8. Synchronous FPGA-based high-resolution Implementations of
digital pulse-width modulators
Modelsim
&
Xilinx
Spartan 3E
9. The LUT-SR family of uniform random Number generators
for FPGA architectures
Modelsim
&
Spartan 3E
Further more details visit : http://www.temasolution.com/downloads.html
send your request to : [email protected]
28,South Usman Road,, TNagar, Chennai-17. Ph : 044-43855940 Mobile : +91-9042085008 Web : www.temasolution.com email : [email protected]
Xilinx
10. VLSI architecture of arithmetic coder Used in SPIHT Modelsim
&
Xilinx
Spartan 3E
11. PAPR reduction by linear coding techniques for MIMO-
OFDM systems performance Improvement: simulation and
hardware implementation
Modelsim
&
Xilinx
Spartan 3E
12. Extending the effective throughput of NOCS with Distributed
shared-buffer routers
Modelsim
&
Xilinx
Spartan 3E
13. FPGA implementation of the multilayer neural Network for
the speed estimation of the Two-mass drive system
Modelsim
&
Xilinx
Spartan 3E
14. BIST using genetic algorithm for error detection and
correction
Modelsim
&
Xilinx
Spartan 3E
15. Low-Power and Area-Efficient Carry Select Adder Modelsim
&
Xilinx
Spartan 3E
16. Optimizing Floating Point Units in Hybrid FPGAs Modelsim
&
Xilinx
Spartan 3E
17. Optimizing Floating Point Units in Hybrid FPGAs Modelsim
&
Xilinx
Spartan 3E
18. Bayesian Equalization for LDPC Channel Decoding Modelsim
&
Xilinx
Spartan 3E
Further more details visit : http://www.temasolution.com/downloads.html
send your request to : [email protected]
28,South Usman Road,, TNagar, Chennai-17. Ph : 044-43855940 Mobile : +91-9042085008 Web : www.temasolution.com email : [email protected]
19. Low-Complexity Soft Decoding of Huffman Codes and
Iterative Joint Source Channel Decoding.
Modelsim
&
Xilinx
Spartan 3E
20. Human Gait Modeling Using a Genetic Fuzzy Finite State
Machine.
Modelsim
&
Xilinx
Spartan 3E
21. Accurate Analysis of Double-Weight Optical CDMA With
Power Control
Modelsim
&
Xilinx
Spartan 3E
22. Optimal Channel and Relay Assignment in OFDM-Based
Multi-Relay Multi-Pair Two-Way Communication Networks
Modelsim
&
Xilinx
Spartan 3E
23. Precision-Aware Self-Quantizing Hardware Architectures for
the Discrete Wavelet Transform
Modelsim
&
Xilinx
Spartan 3E
24. Parallel Searching-Based Sphere Detector for MIMO
Downlink OFDM Systems
Modelsim
&
Xilinx
Spartan 3E
25. Nonlinear Trellis Codes for Binary-Input Binary-Output
Multiple-Access Channels with Single-User Decoding
Modelsim
&
Xilinx
Spartan 3E
26. Low-Complexity Iterative Channel Estimation for Turbo
Receivers
Modelsim
&
Xilinx
Spartan 3E
27. A Low Complexity MMSE for OFDM Systems over
Frequency-Selective Fading Channels
Modelsim
&
Xilinx
Spartan 3E
Further more details visit : http://www.temasolution.com/downloads.html
send your request to : [email protected]
28,South Usman Road,, TNagar, Chennai-17. Ph : 044-43855940 Mobile : +91-9042085008 Web : www.temasolution.com email : [email protected]
28. A Row-Parallel 8×8 2-D DCT Architecture Using Algebraic
Integer-Based Exact Computation
Modelsim
&
Xilinx
Spartan 3E
29. A Fast Cryptography Pipelined Hardware developed in FPGA
with VHDL
Modelsim
&
Xilinx
Spartan 3E
30. A High Performance Video Transform Engine by Using
Space-Time Scheduling Strategy
Modelsim
&
Xilinx
Spartan 3E
31. Separable Reversible Data Hiding in Encrypted Image Modelsim
&
Xilinx
Spartan 3E
32. FPGA-Based Track Circuit for Railways Using Transmission
Encoding
Modelsim
&
Xilinx
Spartan 3E
33. Sub μW Noise Reduction for CIC Hearing Aids Modelsim
&
Xilinx
Spartan 3E
34. On Modulo 2n þ 1 Adder Design Modelsim
&
Xilinx
Spartan 3E
35. A Multi-Resolution Fast Filter Bank for Spectrum Sensing in
Military Radio Receivers.
Modelsim
&
Xilinx
Spartan 3E
36. VLSI Friendly ECG QRS Complex Detector for Body Sensor
Networks.
Modelsim
&
Xilinx
Spartan 3E
Further more details visit : http://www.temasolution.com/downloads.html
send your request to : [email protected]
28,South Usman Road,, TNagar, Chennai-17. Ph : 044-43855940 Mobile : +91-9042085008 Web : www.temasolution.com email : [email protected]
37. Accumulator Based 3-Weight Pattern Generation. Modelsim
&
Xilinx
Spartan 3E
38. High-Throughput Soft-Output MIMO Detector Based on Path-
Preserving Trellis-Search Algorithm.
Modelsim
&
Xilinx
Spartan 3E
39. Single Cycle Access Structure for Logic Test. Modelsim
&
Xilinx
Spartan 3E
40. Area and Power-Efficient Architecture for High-Throughput
Implementation of Lifting 2-DDWT.
Modelsim
&
Xilinx
Spartan 3E
41. VLSI design of memory efficient, high-speed baseline MQ
coder for JPEG 2000.
Modelsim
&
Xilinx
Spartan 3E