instruction set architecture - swarthmore collegebryce/cs31/f16/slides/w04... · 2016-09-22 ·...
TRANSCRIPT
InstructionSetArchitecture
9/20/16
Overview
• Howtodirectlyinteractwithhardware
• Instructionsetarchitecture(ISA)• InterfacebetweenprogrammerandCPU• Establishedinstructionformat(assemblylang)
• Assemblyprogramming(IA-32)
Abstraction
User/ProgrammerWantslowcomplexity
ApplicationsSpecificfunctionality
SoftwarelibraryReusablefunctionality
ComplexdevicesCompute&I/O
OperatingsystemManageresources
Abstraction
ApplicationsSpecificfunctionality
ComplexdevicesCompute&I/O
OperatingsystemManageresources
Lastweek:Circuits,HardwareImplementation
Thisweek:MachineInterface
CompilationSteps(.ctoa.out)text
executablebinary
Cprogram(p1.c)
Executablecode(a.out)
Usuallycompiletoa.out inasinglestep:gcc –m32p1.c
-m32tellsgcc tocompilefor32-bitIntelmachines
Compiler(gcc –m32)
Realityismorecomplex:thereareintermediatesteps!
CompilationSteps(.ctoa.out)text
text
executablebinary
Compiler(gcc –m32 -S)
Cprogram(p1.c)
Assemblyprogram(p1.s)
Executablecode(a.out)
Youcanseetheresultsofintermediatecompilationstepsusingdifferentgcc flagsCS75
AssemblyCodeHuman-readableformofCPUinstructions• Almosta1-to-1mappingtoMachineCode• Hidessomedetails:
• Registershavenamesratherthannumbers• Instructionshavenamesratherthanvariable-sizecodes
We’regoingtouseIA32(x86)assembly• CSlabmachinesare64bitversionofthisISA,buttheycan
alsorunthe32-bitversion(IA32)• CancompileCtoIA32assemblyonoursystem:
gcc –m32 -S code.c #opencode.s invimtoview
CompilationSteps(.ctoa.out)text
text
binary
executablebinary
Compiler(gcc –m32 -S)
Assembler(gcc -c (oras))
Linker(gcc (or ld))
Cprogram(p1.c)
Assemblyprogram(p1.s)
Objectcode(p1.o)
Executablecode(a.out)
Libraryobj.code(libc.a)
Otherobjectfiles(p2.o, p3.o, …)
Youcanseetheresultsofintermediatecompilationstepsusingdifferentgcc flags
Object/Executable/MachineCode
Assemblypush %ebpmov %esp, %ebpsub $16, %espmovl $10, -8(%ebp)movl $20, -4(%ebp)movl -4(%ebp), $eaxaddl $eax, -8(%ebp)movl -8(%ebp), %eaxleave
MachineCode(Hexadecimal)5589 E583 EC 10C7 45 F8 0A 00 00 00C7 45 FC 14 00 00 008B 45 FC01 45 F8B8 45 F8C9
int main(){int a=10;int b=20;
a=a+b;
returna;}
CompilationSteps(.ctoa.out)text
text
binary
executablebinary
Compiler(gcc –m32 -S)
Assembler(gcc -c (oras))
Linker(gcc (or ld))
Cprogram(p1.c)
Assemblyprogram(p1.s)
Objectcode(p1.o)
Executablecode(a.out)
Libraryobj.code(libc.a)
Otherobjectfiles(p2.o, p3.o, …)
High-levellanguage
CPU-specificformat(011010…)
InterfaceforspeakingtoCPU
InstructionSetArchitecture(ISA)• ISA(orsimplyarchitecture):Interfacebetweenlowestsoftwarelevelandthehardware.
• DefinesspecificationofthelanguageforcontrollingCPUstate:• Providesasetofinstructions• MakesCPUregistersavailable• Allowsaccesstomainmemory• Exportscontrolflow(changewhatexecutesnext)
InstructionSetArchitecture(ISA)
• Theagreed-uponinterfacebetweenallsoftwarethatrunsonthemachineandthehardwarethatexecutesit.
I/OsystemCPU/Processor
CompilerOperating
System
Application/Program
DigitalCircuits
LogicGates
InstructionSetArchitecture
ISAExamples
• IntelIA-32(80x86)• ARM• MIPS• PowerPC• IBMCell• Motorola68k
• IntelIA-64(Itanium)• VAX• SPARC• Alpha• IBM360
Howmanyofthesehaveyouused?
ISACharacteristics
• AboveISA:High-levellanguage(C,Python,…)• HidesISAfromusers• Allowsaprogramtorunonanymachine(aftertranslationbyhumanand/orcompiler)
• BelowISA:HardwareimplementingISAcanchange(faster,smaller,…)• ISAislikeaCPU“family”
HardwareImplementation
High-levellanguageISA
InstructionTranslation
int sum(int x, int y){int res;res = x+y;return res;
}
sum.c (High-level C)
sum:pushl %ebpmovl %esp,%ebpsubl $24, %espmovl 12(%ebp),%eaxaddl 8(%ebp),%eaxmovl %eax, -12(%ebp)leaveret
sum.s (Assembly)
sum.s from sum.c:
gcc –m32 –S sum.c
Instructionstosetupthestackframeandgetargumentvalues
Anaddinstructiontocomputesum
Instructionstoreturnfromfunction
ISADesignQuestions
int sum(int x, int y){int res;res = x+y;return res;
}
sum.c (High-level C)
sum:pushl %ebpmovl %esp,%ebpsubl $24, %espmovl 12(%ebp),%eaxaddl 8(%ebp),%eaxmovl %eax, -12(%ebp)leaveret
sum.s (Assembly)
sum.s from sum.c:
gcc –m32 –S sum.c
Whatshouldtheseinstructionsdo?
Whatis/isn’tallowedbyhardware?
Howcomplexshouldtheybe?
Example:supportingmultiplication.
Cstatement:A=A*BSimpleinstructions:
LOAD A, eaxLOAD B, ebxPROD eax, ebxSTORE ebx, A
Powerfulinstructions:
MULT B, A
Translation:Loadthevalues‘A’and‘B’frommemoryintoregisters,computetheproduct,storetheresultinmemorywhere‘A’was.
WhichwouldyouuseifyouweredesigninganISAforyourCPU?(Why?)Simpleinstructions:
LOAD A, eaxLOAD B, ebxPROD eax, ebxSTORE ebx, A
Powerfulinstructions:
MULT B, A
A. SimpleB. PowerfulC. Somethingelse
RISCversusCISC(Historically)
• ComplexInstructionSetComputing(CISC)• Large,richinstructionset• Morecomplicatedinstructionsbuiltintohardware• Multipleclockcyclesperinstruction• Easierforhumanstoreasonabout
• ReducedInstructionSetComputing(RISC)• Small,highlyoptimizedsetofinstructions• Memoryaccessesarespecificinstructions• Oneinstructionperclockcycle• Compiler:morework,morepotentialoptimization
So...WhichSystem“Won”?• MostISAs(aftermid/late1980’s)areRISC
• TheubiquitousIntelx86isCISC• Tabletsandsmartphones(ARM)takingover?
• x86breaksdownCISCassemblyintomultiple,RISC-like,machinelanguageinstructions
• DistinctionbetweenRISCandCISCislessclear• SomeRISCinstructionsetshavemoreinstructionsthansomeCISCsets
Intelx86Family(IA-32)
Inteli386(1985)• 12MHz- 40MHz• ~300,000transistors• Componentsize:1.5µm
IntelCorei74770k(2013)• 3,500MHz• ~1,400,000,000transistors• Componentsize:22nm
EverythinginthisfamilyusesthesameISA(Sameinstructions)!
AssemblyProgrammer’sViewofStateCPU
Memory
Addresses
Data
Instructions
Registers:PC:Programcounter(%eip)Conditioncodes(%EFLAGS)GeneralPurpose(%eax - %ebp)
Memory:• Byteaddressablearray• Programcodeanddata• Executionstack
name value%eax
%ecx
%edx
%ebx
%esi
%edi
%esp
%ebp
%eip next instraddr (PC)
%EFLAGS cond. codes
address value
0x00000000
0x00000001
…
Program:datainstrsstack
0xffffffff
32-bitRegisters
BUS
ProcessorStateinRegisters
• Informationaboutcurrentlyexecutingprogram• Temporarydata(%eax - %edi )
• Locationofruntimestack(%ebp,%esp )
• Locationofcurrentcodecontrolpoint(%eip,…)
• Statusofrecenttests%EFLAGS(CF,ZF,SF,OF )
%eip
Generalpurposeregisters
Currentstacktop
Currentstackframe
Instructionpointer(PC)
CF ZF SF OF Conditioncodes
%eax
%ecx
%edx
%ebx
%esi
%edi
%esp
%ebp
GeneralpurposeRegisters• RemainingSixareforinstructionoperands• Canstore4bytedataoraddressvalue(ex.3+5)
Registername
Registervalue
%eax 3
%ecx 5
%edx 8
%ebx
%esi
%edi%esp
%ebp
%eip
%EFLAGS
Thelow-order2bytesandtwolow-order1bytesofsomeofthesecanbenamed.
%ax isthelow-order16bitsof%eax%al isthelow-order8bitsof%eax
Mayseetheiruseinopsinvolvingshortsorchars31 16 15 8 7 0
%eax %ax %ah %al
%ecx %cx %ch %cl
%edx %dx %dh %dl
%ebx %bx %bh %bl
%esi %si
%edi %di
%esp %sp
%ebp %bp
TypesofIA32Instructions
• Datamovement• Movevaluesbetweenregistersandmemory• example:movl
• Arithmetic• UsesALUtocomputeavalue• example: addl
• Control• ChangePCbasedonALUconditioncodestate• example: jmp
DataMovement
32-bitRegister#0WEDatain
32-bitRegister#1WEDatain
32-bitRegister#2WEDatain
32-bitRegister#3WEDatain
…
MUX
MUX
RegisterFile
ALU
ProgramCounter(PC): Memoryaddressofnextinstr 0:
1:
2:
3:
4:
…
N-1:
(Memory)
InstructionRegister(IR): Instruction contents(bits)
Movevaluesbetweenmemoryandregistersorbetweentworegisters.
Arithmetic
32-bitRegister#0WEDatain
32-bitRegister#1WEDatain
32-bitRegister#2WEDatain
32-bitRegister#3WEDatain
…
MUX
MUX
RegisterFile
ALU
ProgramCounter(PC): Memoryaddressofnextinstr 0:
1:
2:
3:
4:
…
N-1:
(Memory)
InstructionRegister(IR): Instruction contents(bits)
UseALUtocomputeavalue,storeresultinregister/memory.
Control
32-bitRegister#0WEDatain
32-bitRegister#1WEDatain
32-bitRegister#2WEDatain
32-bitRegister#3WEDatain
…
MUX
MUX
RegisterFile
ALU
ProgramCounter(PC): Memoryaddressofnextinstr 0:
1:
2:
3:
4:
…
N-1:
(Memory)
InstructionRegister(IR): Instruction contents(bits)
ChangePCbasedonALUconditioncodestate.
TypesofIA32Instructions
• Datamovement• Movevaluesbetweenregistersandmemory
• Arithmetic• UsesALUtocomputeavalue
• Control• ChangePCbasedonALUconditioncodestate
• Stack/Functioncall(We’llcovertheseindetaillater)• Shortcutinstructionsforcommonoperations
AddressingModes
• Datamovementandarithmeticinstructions:• MusttellCPUwheretofindoperands,storeresult
• Youcanrefertoaregisterbyusing%:• %eax
• addl %ecx, %eax• Addthecontentsofregistersecx andeax,storeresultinregistereax.
AddressingMode:Immediate
• Referstoaconstantvalue,startswith$
• movl $10, %eax• Puttheconstantvalue10 inregistereax.
AddressingMode:Memory
• Accessingmemoryrequiresyoutospecifywhichaddressyouwant.• Putaddressinaregister.• Accesswith()aroundregistername.
• movl (%ecx), %eax• Usetheaddressin registerecx toaccessmemory,storeresultinregistereax
AddressingMode:Memory
• movl (%ecx), %eax• Usetheaddressinregisterecx toaccessmemory,storeresultinregistereax
(Memory)
name value
%eax 0
%ecx 0x1A68
…
CPURegisters0x0:
0x4:
0x8:
0xC:
…
0x1A64
0x1A68 42
0x1A6C
0x1A70
…
0xFFFFFFFF:
AddressingMode:Memory
• movl (%ecx), %eax• Usetheaddressinregisterecx toaccessmemory,storeresultinregistereax
name value
%eax 0
%ecx 0x1A68
…
CPURegisters0x0:
0x4:
0x8:
0xC:
…
0x1A64
0x1A68 42
0x1A6C
0x1A70
…
0xFFFFFFFF:
(Memory)
1.Indexintomemoryusingtheaddressinecx.
0x0:
0x4:
0x8:
0xC:
…
0x1A64
0x1A68 42
0x1A6C
0x1A70
…
0xFFFFFFFF:
AddressingMode:Memory
• movl (%ecx), %eax• Usetheaddressinregisterecx toaccessmemory,storeresultinregistereax
name value
%eax 42
%ecx 0x1A68
…
CPURegisters (Memory)
1.Indexintomemoryusingtheaddressinecx.
2.Copyvalueatthataddresstoeax.
AddressingMode:Displacement
• Likememorymode,butwithconstantoffset• Offsetisoftennegative,relativeto%ebp
• movl -12(%ebp), %eax• Taketheaddressinebp,subtract12 fromit,indexintomemoryandstoretheresultineax
AddressingMode:Displacement
• movl -12(%ebp), %eax• Taketheaddressinebp,subtract12 fromit,indexintomemoryandstoretheresultineax
(Memory)
name value
%eax 0
%ecx 0x1A68
%ebp 0x1A70
…
CPURegisters
1.Accessaddress:0x1A70 – 12 = 0x1A64
0x0:
0x4:
0x8:
0xC:
…
0x1A64 11
0x1A68 42
0x1A6C
0x1A70
…
0xFFFFFFFF:
0x0:
0x4:
0x8:
0xC:
…
0x1A64 11
0x1A68 42
0x1A6C
0x1A70 Notthis!
…
0xFFFFFFFF:
AddressingMode:Displacement
• movl -12(%ebp), %eax• Taketheaddressinebp,subtract12 fromit,indexintomemoryandstoretheresultineax
(Memory)
name value
%eax 11
%ecx 0x1A68
%ebp 0x1A70
…
CPURegisters
1.Accessaddress:0x1A70 – 12 = 0x1A64
2.Copyvalueatthataddresstoeax.
Let’stryafewexamples...
Whatwillmemorylooklikeaftertheseinstructions?xis 2at%ebp-8, yis 3at%ebp-12, zis 2at%ebp-16
movl -16(%ebp),%eax
sall $3, %eax
imull $3, %eax
movl -12(%ebp), %edx
addl -8(%ebp), %edx
addl %edx, %eax
movl %eax, -8(%ebp)
name value
%eax ?
%edx ?
%ebp 0x1270
address value
0x1260 2
0x1264 3
0x1268 2
0x126c
0x1270
…
RegistersMemory
Whatwillmemorylooklikeaftertheseinstructions?xis 2at%ebp-8, yis 3at%ebp-12, zis 2at%ebp-16
movl -16(%ebp),%eax
sall $3, %eax
imull $3, %eax
movl -12(%ebp), %edx
addl -8(%ebp), %edx
addl %edx, %eax
movl %eax, -8(%ebp) address value
0x1260 53
0x1264 3
0x1268 24
0x126c
0x1270
…
address value
0x1260 53
0x1264 3
0x1268 2
0x126c
0x1270
…
address value
0x1260 2
0x1264 16
0x1268 24
0x126c
0x1270
…
address value
0x1260 2
0x1264 3
0x1268 53
0x126c
0x1270
…
A: B: C:
D:
Solutionxis 2at%ebp-8, yis 3at%ebp-12, zis 2at%ebp-16
movl -16(%ebp), %eax
sall $3, %eax
imull $3, %eax
movl -12(%ebp), %edx
addl -8(%ebp), %edx
addl %edx, %eax
movl %eax, -8(%ebp)
EquivalentCcode:
x = z*24 + y + x;
name value
%eax
%edx
%ebp 0x1270
0x1260 2
0x1264 3
0x1268 2
0x126c
0x1270
Solutionxis 2at%ebp-8, yis 3at%ebp-12, zis 2at%ebp-16
movl -16(%ebp), %eax # R[%eax] ß z (2)
sall $3, %eax # R[%eax] ß z<<3 (16)
imull $3, %eax # R[%eax] ß 16*3 (48)
movl -12(%ebp), %edx # R[%edx] ß y (3)
addl -8(%ebp), %edx # R[%edx] ß y + x (5)
addl %edx, %eax # R[%eax] ß 48+5 (53)
movl %eax, -8(%ebp) # M[R[%ebp]+8]ß5 (x=53)
EquivalentCcode:
x = z*24 + y + x;
name value
%eax
%edx
%ebp 0x1270
0x1260 2 z
0x1264 3 y
0x1268 2 x
0x126c
0x1270
Z*24
Whatwillthemachinestatebeafterexecutingtheseinstructions?movl %ebp, %ecx
subl $16, %ecx
movl (%ecx), %eax
orl %eax, -8(%ebp)
negl %eax
movl %eax, 4(%ecx)
name value
%eax ?
%ecx ?
%ebp 0x456C
address value
0x455C 7
0x4560 11
0x4564 5
0x4568 3
0x456C…
Solution
movl %ebp, %ecx # %ecx = 0x456c
subl $16, %ecx # %ecx = 0x455c
movl (%ecx), %eax # %eax = 7
orl %eax, -8(%ebp) # (4564) = 111 | 101
negl %eax # %eax = -7
movl %eax, 4(%ecx) # (4560) = -7
name value
%eax ?
%ecx ?
%ebp 0x456C
address value
0x455C 7
0x4560 11
0x4564 5
0x4568 3
0x456C