introduction computer architecture design...

Czech Technical University in Prague – Faculty of Electrical Engineering

Microprocessors for Power Systems

Ver.1.00

Introduction

Computer Architecture

Design Process

J. Zděnek 2016

AE1B14MIS Microprocessors for Power Systems - 1 2

Course Structure

• Digital computer, structure, building blocks, interconnection

• Logical circuits, description methods,• Combinatorial circuits, design and implementation using gates

• Sequential circuits, design and implementation

• Typical combinatorial circuits used in digital computers, implementation (adders, coders, multiplexers, registers, counters, …)

• Data representation notation and processing• Computer system structure

• Processor

• Memories• Interrupt system

• Communication peripherals

• Dedicated peripherals (for power systems)• Microprocessor programming techniques (IDE, “C“ language)

• Microprocessor program debugging techniques


Course Objective

• Computer architecture global overview, computer technique development,

historic context

• Course focused on to using computers in power systems

• Course labs use programmable devices (FPGAs, microprocessors)

• Course introduces up-to-date CAD software tools (Computer-aided design)

• Course features digital circuits design methods including design verification in hardware


Credit and Exam Requirements

• Course AE1B14MIS: 2+2 hours per week, credit, exam

• Exercises – labs only• Credit – points from lab exercises and two mid-term tests:

• Max 65 points, to get credit min 32 points necessary

• 16 points – four working laboratory excercises• 6 points – Combinational logic (COM block)

• 6 points – Sequential logic (SEQ block)

• 6 points – Electronic drive application 1 (EDA1 block)• 6 points – Electronic drive application 2 (EDA2 block)

• 36 points – end-term test

• 5 points – activity during the lab• Exam:

• If min 55 points from labs = exam Excellent (A), no additional exam test

• else labs points + written exam test (max 35 points, min 16)• Possibility: +verbal exam (minus 10 points, possible to get max 20 points)


Labs Schedule

• Blocks COM and SEQ are designed using Xilinx ISEWebpack CAD tool and design is implemented in FPGA Spartan

• Blocks EDA1 and EDA2 are designed using Microchip IDE MPLAB and uPpic18F

• ISEWebpack and MPLAB tools can be downloaded from wed free of charge. Course students will prepare their lab exercises using home computers.

• Successful lab exercises solution assumes course lectures participation and serious home preparation.

Ungraded assessmentUA14.Electric drive application 1EDA17.

Late tasks submissionEXT13.Introduction to MPLAB-6.

Wednesday (schedule shift)-12.Sequential circuitsSEQ5.

TestTEST11.Sequential circuitsSEQ4.

Electric drive application 2EDA210.Combinational circuitsCOM3.

Electric drive application 2EDA29.Combinational circuitsCOM2.

Electric drive application 1EDA18.Introduction to ISE-1.

ProgramBlockWeekProgramBlockWeek


Information Resources

• AE1B14MIS course lectures• AE1B14MIS course web

• http://motor.feld.cvut.cz• Examples (including solution) in course web• Lab evaluation-boards manuals in course web• CAD Xilinx ISEWebpack downloading and installation manual in course web • IDE Microchip MPLAB downloading and installation manual in course web• Evaluation-board Digilent and Microchip dedicated firm literature in course

web• On line help v ISEWebpack• On line help v MPLAB• Haskell, R.E.- Hanna, D.M.: Introduction to Digital Design Using Digilent

FPGA Boards, LBE Books, 2009 (web e-book)• Kernighan B.W.; Ritchie D.M.: “C” Programming Language. 2nd Edition,

Prentice Hall, 1988 (web e-book)


What term „Digital Computer“ means?

• Data representation

• Discrete (digital, non-continuous)• Continuous – analogue

• Computer• Digital – discrete data representation

• Analogue – continuous data representation

• Hybrid – both methods


Analog vs. Digital Signals

• Most natural quantities that we see are analog and vary continuously. Analog systems can generally handle higher power than digital systems.

• Digital systems can process, store, and transmit data more efficiently but can only assign discrete values to each point.

1

100

A .M .

95

90

85

80

75

2 3 4 5 6 7 8 9 10 11 12 1 2 3 4 5 6 7 8 9 10 11 12P.M.

Temperature(°F)

70

Time of day

Floyd, Digital Fundamentals, 2009

Discretization

Quantization


Technology – dramatic development

• Processors

• Logical capacity: + 30% per year• Clock frequency: + 20% per year

• Main memory• DRAM capacity: + 60% per year (4x every 3 years)

• Speed – access time: + 10% per year

• Cost per bit: - 25% per year

• Hard Disk

• Capacity: + 60% per year

• Computer networks

• Bandwidth: + 100% per year!

Moore’s law


Moore’s law


Moore’s law

Itanium

4004

8080A

1.000.000 x

40 years

Transistors per chip

8086

Pentium


Performace vs. years

Performance

100.000 x

40 years


History – development boundary-stones

• 3000 years B.C. – Babylon – Abacus developed

Ancient RomeContemporary model



• 1623 – W. Schickard – first mechanical calculator

• 1642 – B. Pascal – better mechanical calculator• 1834 – Ch. Babbage - logarithm calculator

• 1854 – G. Boole – mathematic basics of logic

• 1890 – H. Holleright – established TMC, 1924 transformed to IBM• 1936 – A. M. Turing – finite state automata theory (FSA, FSM)

• 1938 – K. Zuse – first binary electromechanical calculator

• 1943 – IBM & Harvard univ. – MARK 1 – big electromech. calculator• 1944 – Pennsylvania univ. – ENIAC – first functional electronic calculator

• 1947 – W. Schockley, W. Brattain, J. Bardeen – invention of transistor ! !

• 1951 – UNIVAC company – first commercial computer• 1953 – IBM company – successful IBM 701 electronic computer

• 1958 – Texas Instruments company – first integrated circuit

• 1959 – Fairchild – planar process – integr. circuit mass production basis•



• 1963 – DEC company – first minicomputer

• 1965 – G. Moore – „Moor’s law“ about intgration gradient speed• 1969 – IBM – programmable logic array (PLA) on the chip

• 1971 – Intel – first microprocessor (i4004)

• 1978 – Monolitc Memories – „Programmable Array Logic“ (PAL, later GAL)• 1981 – IBM – personal computer (PC)

• 1983 – Intermetrics, IBM, Texas Instruments – VHDL (Hardware DescriptionLanguage) – language for design and simulation of logic circuits

• 1984 – XILINX – FPGA „Field Programmable Gate Arrays) devices

• 1984 – GDA company – Verilog – language for design of logic circuits• 1987 – VHDL – accepted as the IEEE standard

• 1995 – Verilog – accepted as th IEEE standard

• up to 2011 – quick technology improvement (density, speed, power)


History – the near past - summary

• Today – more then 50 years from building up of the 1th multi-purpose electronic computer

• Througput of present PC is higher then computer produced in 1980 which cost millions.

• HW break-through: VLSI technology and microprocessors (70ty)

• SW break-through: multi-purpose and producer independent operating systems (UNIX) and migration from assembler language programming to higher level languages programming

• Ingoing of the RISC (Reduced Instruction Set Computer) - effect: • ILP (Instruction Level Parallelism)• Cache memory (cache) included in computer system

• Design break-through: development of quantitative method of design and analyzing of computers. (empirical observation, experiment and simulation)


Chronology - summary

• 60s: Large mainframe computers. Main applications:

• Financial data processing• Extensive scientific and technical computations

• 70s: Minicomputers – application in scientific labs

• 80s: Microprocessor based computes• Desk-top computers (personal computers and work stations)

• Servers and local networks for larger tasks (bigger memory and throughput)

• 90s: Internet a www technology

• The present: Computer market partition into 3 areas which are characterizedby different requirements, applications and computer technology:

• Personal desk-top computers, note books, net books

• Servers a powerful parallel computers and supercomputers• Embedded and control computers inside dedicated devices and facilities


Design Representations

• Behavioral (functional) representation:

• Represents functionality but not implementation• Black-box + outputs as function of inputs and time

• Structural representation:• Represents connectivity but not dimensionality. Implementation

descriptions, no functional description. Function implies from defined connection of blocks with known function.

• Black-box interior description

• Physical representation:• Represents dimensionality but not functionality

• Black-box physical quality description

• Black-box dimension, weight, power requirement, temperature rise, …)

What is function of it?

How is it connected?

How does it make?


Level of Abstraction

• Behavioral (functional), structural and physical representations can be used with different abstraction levels (granularity) based on object types used.

PCBs,Multichip modules (MSMs)

Processors, controllersMemories,ASICs

Executable spec.,Programs

Processor

Microchips,ASICs

Adders, comparators,registers, counters,register files, queues

Algorithms, Flowcharts Instruction sets,Generalized FSM

Register

Modules,Units

Gates,Flip-flops

Boolean equations,Finite-state machines(FSM, FSA)

Gate

Analog andDigital cells

Transistors,Resistors,Capacitors

Differential equationsCurrent-voltageDiagrams

Transistor

PhysicalObjects

Structural Components

BehavioralForms

Levels ofAbstraction


“Bottom-up” Computer Design Method


What is covered in „MIS“?

Covered in the MIS Course


“Top-down” vs. „Bottom-up” view

• „Electronic courses“

• Transistors, resistors, capacitors• Inner gate structure

• „Computer structure and architecture “How to store data• How to process data in machine code level

• What is the inner structure of data processing units

• How this units implement from gates

• „Programming courses“

• Algorithms• Data types and structures

• Program structures

Bottom-up

In between

Top-down


Computer Software

• Firmware

• BIOS (Basic Input Output System), address modes, instruction setarchitecture ( ISA), assembly language - assembler

• Operating system• Scheduler, executive (Dispatcher) – task switching, memory manager,

file structure, file manager, privileges and protection, peripheral devices manager, ….

• Development software

• Assembler, interpreters, compilers („C“, …), linkers, simulators, debugging utility (debugger), libraries, version control, ….

• Application

• Programming languages, control applications (ex. metro train, cars, jets, home appliances,…), editors, table calculators, browsers, games,….


Computer Hardware

• Processor architecture

• Processor architecture, instruction execution, data flow, control, branch prediction, ….

• Memory hierarchy

• Memory system administration, Cache, Virtual memory control (MMU –memory management unit), segmentation, paging,….

• System interface

• Interrupt system, DMA (Direct Memory Access), network communication devices (controllers), communication protocols, wi-fi, ….

• User’s interface• Display, keyboard, mouse, USB ports, web camera, audio interface,

• Control system dedicated units (ADC, PWM, Capture/Compare …


Computer Architecture Types

Two basic computer structures

„Von Neumann“ type

„Harvard“ type


Computer Architecture - Hardware

Computer basiccomponents

Processor

Computation part

Scratchpad memory

Control part(Controller)

Program and data

memory

Input and output

devicesOutside world

communication


„Von Neumann“ Type Architecture

Common data and program memory

address space

Instruction and data can not be transferred in parallel (common data

bus)


„Von Neumann“ Type Architecture

• Common instruction and data address space.

• Instruction and data can not be transferred in parallel (common bus) – lower speed

• Simpler interconnection of processor and memory• Linear memory address space (one-dimensional). Memory is partitioned into

equally big cells (words) which are addressed by integer numbers (in principle 0, 1, 2, 3, . . . ).

• Data and instruction are not explicitly marked.

• Different data types are not explicitly marked too.

• Instructions and data are represented by binary signals.• Instructions are executed sequentially (singly) in the order they are stored in

memory. Execution sequence can be changed using special instructions called „jumps“.

• Computer consist of : Processor (ALU – Arithmetic-logic unit), registers, control unit (controller), main memory (instructions and data), interrupt system, input and output devices (peripherals)


„Harvard“ Type Architecture

Instruction and data can be transferred in

parallel (separated busses)

Separated instruction memory and data

memory


„Harvard“ Type Architecture

• Separated instruction address space data address space.• Instruction and data can be transferred in parallel (separated busses) –

higher speed • Instruction bus width and data bus with can be different. (typically instruction

bus may be wider)• Complicated interconnection of processor with memories (vs „von Neumann“)• Data and instructions explicitly marked• Linear memory address space (one-dimensional). Memory is partitioned into

equally big cells (words) which are addressed by integer numbers (in principle 0, 1, 2, 3, . . . ) ( same as in „von Neuman“.

• Instructions and data are represented by binary signals.• Instructions are executed sequentially (singly) in the order they are stored in

memory. Execution sequence can be changed using special instructions called „jumps“.

• Computer consist of : Processor (ALU – Arithmetic-logic unit), registers, control unit (controller), main memory (instructions and data), interrupt system, input and output devices (peripherals)


Software development – abstraction levels


Main Memory Organization

• Main memory partitioned into cells (words). Each cell (word) has assigned positive integer number – called address

• • Cell information contents is world• word – size depends on processor type (e.g. 16b, 24b, 32b, 64b),

• b – bit (binary digit)

• B – byte, 8bits = 1byte, byte is ordered eight bits, usually 2 or more bytes makes word (e.g. Intel processors x86 family

1 word = 2 bytes = 16 bits.

• Cell contents in address adr is usually denominated <adr>


Memory Byte Structure

2. way1. way

12CD8004

34AB8003

AB348002

CD128001

Little-endianBig-endianAddr. Big-endian (IBM360, Motorola 6800)

Little-endian (Intel x86, DEC Alpha)

Both methods (Motorola 88110)

• Two utilized methods of byte storage ordering in memory

• Big Endian

• Little Endian• Example:

• 1 byte = 1B

• 1 word = 2B• 1 double word = 4B (i.e. 32 bits)

• Starting in address 8001 has to be stored double word 1234ABCD:

Highest byte first

Lowest byte first


Data Representation in Memory

• Numerical data – numbers:

• Fixed point• Integer numbers – integer format - byte, word, …

• Rational numbers - fraction format - byte, word, …

• Floating point, rational numbers,• Mantissa + characteristic (exponent) - double, float, …

• Data representation format:• Binary, ex. 10100011b

• Hexadecimal, ex. A3h or 0xA3

• Decimal), ex. 163d or 163

• Unsigned - byte, word, unsigned …

• Signed - integer, short int, signed …(two’s complement format)


Example 1

How to add???What ? Result format?


Example 1

How ? – binaryBinary numbersa, b

Binary number s = a + b


Example 1

???

a

b

s = a + b

Binary numbers a, b are single bit now

011101110000sba

s = a + b

1 + 1 = 2d = 10b

Where is carry to higher order?

1

Truth table


Example 1

∑

a

b

p

s

q

Carry from lower order Carry to higher order


Example 1

01101

10001

01110

10010

1

1

0

0

q

1

1

0

0

a

111

001

110

000

spb

pbapbapbapbas ........ +++=pbapbapbapbaq ........ +++=

Terms modificaton laterLogic functions


Implementation ???

ab

f1 f2ab

a f3

ab

ab

ab

f4 f5 f6

baf AND1= baf OR2= af NOT3=

baf NAND4= baf NOR5= baf XOR6=

Gate

Logicfunction

Logicoperator


Gate functions, Boolean algebra

111

001

010

000f1ba

111

101

110

000f2ba

01

10

f3a

ab

f1 f2ab

a f3

AND OR NOT

baf

aswritten

baf

.

:

1

1

=

= AND

baf

aswritten

baf

+=

=

2

2

:

OR

af

aswritten

af

=

=

3

3

:

NOT


Gate functions, Boolean algebra

ab

ab

ab

f4 f5 f6

011

101

110

100f4ba

011

001

010

100f5ba

NAND NOR

011

101

110

000f6ba

XOR

baf

aswritten

baf

.

:

4

4

=

= NAND

baf

aswritten

baf

+=

=

5

5

:

NOR

baf

aswritten

baf

⊕=

=

6

XOR6

:


Alternative gate symbols

Alternative symbols

1

1

=1

&

& 1

(circle) = negation


BASYS2

Software

Hardware

FPGA Device

MIS

–la

bora

tory

exer

cise

s(C

OM

, SE

Q)


Evaluation Board with FPGAS

AP

–la

bora

tory

exer

cise

s(K

OM

, SE

K)


Evaluation Board with FPGAM

IS–

labo

rato

ryex

erci

ses

(CO

M, S

EQ

)


CAD Xilinx ISE – Logic Circuit Design ToolM

IS–

labo

rato

ryex

erci

ses

(CO

M, S

EQ

)

Ver.1.00

Microprocessors for Power Systems

END

Czech Technical University in Prague – Faculty of Electrical Engineering

introduction computer architecture design...

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