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Introduction to VLSI Design © Steven P. Levitan 1998 Introduction Introduction Introduction to VLSI Design Instructor: Steven P. Levitan [email protected] TA: Jeremiah Cessna [email protected] Book: Digital Integrated Circuits: A Design Perspective; Jan Rabaey Lab Notes: at Copycat http://kona.ee.pitt.edu/steve/EE1192 http://infopad.EECS.Berkeley.EDU/ ~icdesign/

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Page 1: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

Introduction to VLSI Design

Instructor: Steven P. Levitan [email protected] TA: Jeremiah Cessna [email protected]

Book: Digital Integrated Circuits: A Design Perspective; Jan Rabaey

Lab Notes: at Copycat http://kona.ee.pitt.edu/steve/EE1192 http://infopad.EECS.Berkeley.EDU/~icdesign/

Page 2: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Jan M. Rabaey

Digital Integrated CircuitsA Design Perspective

Page 3: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

Course Outline (approximate)

– Introduction and Motivation– The VLSI Design Process– Details of the MOS Transistor– Device Fabrication– Design Rules– CMOS circuits– VLSI Structures– System Timing– Real Circuits and Performance

Page 4: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

Reference Books

– Principles of CMOS VLSI Design: Neil Weste and Kamran Eshraghian

– CMOS: Baker, Li, Boyce– Application Specific Integrated Circuits: Smith– The Design and Analysis of VLSI– Circuits: Lance Glasser and Daniel Dobberpuhl– Introduction to VLSI Systems: Carver Mead &

Lynn Conway– NewsGroups: comp.lsi, comp.lsi.cad

Page 5: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

Software– Magic

Unix Based Interactive Design Rule Checking Circuit Extraction Supported Technology files

– Spice Well known and disliked Spice 3 allows user models Good support/documentation Interface with Magic extraction

– Irsim Switch / Switched - Resistor level Fast functional validation Good interface with Magic

Page 6: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

The First Computer

The BabbageDifference Engine(1832)

25,000 partscost: £17,470

Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction

Page 7: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

ENIAC - The first electronic computer (1946)

Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction

Page 8: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Evolution in Complexity

Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction

Page 9: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

What is “CMOS VLSI”?– MOS = Metal Oxide Semiconductor (This used to

mean a Metal gate over Oxide insulation)

– Now we use polycrystalline silicon which is deposited on the surface of the chip as a gate. We call this “poly” or just “red stuff” to distinguish it from the body of the chip, the substrate, which is a single crystal of silicon.

– We do use metal (aluminum) for interconnection wires on the surface of the chip.

Page 10: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

CMOS:Complementary MOS

– Means we are using both N-channel and P-channel type enhancement mode Field Effect Transistors (FETs).

– Field Effect- NO current from the controlling electrode into the output FET is a voltage controlled current device BJT is a current controlled current device

– N/P Channel - doping of the substrate for increased carriers (electrons or holes)

Page 11: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

N-Channel Enhancement mode MOS FET

– Four Terminal Device - substrate bias

–The “self aligned gate” - key to CMOS

Page 12: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

VLSI:Very Large Scale Integration

Integration: Integrated Circuits» multiple devices on one substrate

How large is Very Large?– SSI (small scale integration)

7400 series, 10-100 transistors

– MSI (medium scale) 74000 series 100-1000

– LSI 1,000-10,000 transistors

– VLSI > 10,000 transistors

– ULSI/SLSI (some disagreement)

Page 13: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Intel 4004 Micro-Processor

Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction

Page 14: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Evolution in Transistor Count

Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction

Page 15: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

Scale Example

Consider a chip size of 20mm X 20mm Consider a transistor size of 2um X 2um

» With area for wires, etc. 1x108 transistors / chip Or - plot at 1 transistor : 1 mm

– 1 chip : 20 meter x 20 meter plot

Page 16: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Intel Pentium (II) microprocessor

Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction

Page 17: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

VLSI Design

– But the real issue is that VLSI is about designing systems on chips.

– The designs are complex, and we need to use structured design techniques and sophisticated design tools to manage the complexity of the design.

– We also accept the fact that any technology we learn the details of will be out of date soon.

– We are trying to develop and use techniques that will transcend the technology, but still respect it.

Page 18: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

The Process of VLSI Design:Consists of many different representations/Abstractions of the

system (chip) that is being designed.– System Level Design– Architecture / Algorithm Level Design– Digital System Level Design– Logical Level Design– Electrical Level Design– Layout Level Design– Semiconductor Level Design (possibly more)

Each abstraction/view is itself a Design Hierarchy of refinements which decompose the design.

Page 19: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Design Abstraction Levels

n+n+S

GD

+

DEVICE

CIRCUIT

GATE

MODULE

SYSTEM

Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction

Page 20: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

Help from Computer Aided Design tools

Tools» Editors» Simulators» Libraries» Module Synthesis» Place/Route» Chip Assemblers» Silicon Compilers

Experts» Logic design» Electronic/circuit

design» Device physics» Artwork» Applications - system

design» Architectures

Page 21: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

New Design Methodologies

Methodologies which are based on:» System Level Abstractions v.s. Device

Characteristic Abstractions– Logic structures and circuitry change slowly over

time trade-offs do change, but the choices do not

» Scalable Designs– Layout techniques also change slowly.

But the minimum feature size steadily decreases with time (also Voltage, Die Size, etc.)

Page 22: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

Design Approaches– Custom

full control of design best results, slowest design time.

– Semi-custom (std cell) use Cell libraries from vendor cad tools, faster design time

– Gate Array fastest design time worst speed/power/density best low volume (worst high volume)

– EPLA/EPLD - FPGA - electrically programmable (in the field) -

Page 23: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

Close up of Intel Chip?

Time Magazine, July 1998

Page 24: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Evolution in Speed/Performance

Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction

Page 25: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

Technologies– Bipolar (BJT)

TTL, Schottky ECL I^2 L

– Dual Junction, current controlled devices MOS (FET unipolar)

» NMOS, PMOS» CMOS <== our course

– Single Junction voltage controlled devices GaAs (typically JFET’s) OEIC’s - MQW’s, Integrated Lasers,?

Page 26: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Silicon in 2010

Die Area: 2.5x2.5 cmVoltage: 0.6 VTechnology: 0.07 m

Density Access Time(Gbits/cm2) (ns)

DRAM 8.5 10DRAM (Logic) 2.5 10SRAM (Cache) 0.3 1.5

Density Max. Ave. Power Clock Rate(Mgates/cm2) (W/cm2) (GHz)

Custom 25 54 3Std. Cell 10 27 1.5

Gate Array 5 18 1Single-Mask GA 2.5 12.5 0.7

FPGA 0.4 4.5 0.25

Digital Integrated Circuits © Prentice Hall 1995IntroductionIntroduction

Page 27: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

SIA -National Technology Roadmap for Semiconductors

Page 28: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

SIA -National Technology Roadmap for Semiconductors

8 inch

18 inch

Page 29: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

SIA -National Technology Roadmap for Semiconductors

Page 30: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

SIA -National Technology Roadmap for Semiconductors

Page 31: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

SIA -National Technology Roadmap for Semiconductors

Page 32: Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Introduction to VLSI Design l Instructor: Steven P. Levitan levitan@ee.pitt.edu l TA:

Introduction to VLSI Design © Steven P. Levitan 1998IntroductionIntroduction

SIA -National Technology Roadmap for Semiconductors


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Introduction to VLSI Design© Steven P. Levitan 1998 Introduction Properties of Complementary CMOS Gates

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